From nobody Thu Sep 11 20:57:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB411C25B48 for ; Fri, 27 Oct 2023 00:06:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345028AbjJ0AGK (ORCPT ); Thu, 26 Oct 2023 20:06:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229437AbjJ0AGF (ORCPT ); Thu, 26 Oct 2023 20:06:05 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66C96198 for ; Thu, 26 Oct 2023 17:06:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698365163; x=1729901163; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aoYQBrauiifaU79nYNLhVzpXpMzU9lIurHIq1aDxU9U=; b=Am/4FQ65f3/o01o6B/H4ExBLsUiEryYRbryVF1vkKNP3lYpimNA3xozt OySWGdKSpabIyp7epJr/Dql3znXSXm3ntb8NkNEAMeXsOa8h8DjT8xNxe XJ5PL4SFWiU2NBfVCSzEAmwotESJ3QSmiir+xbMMq4reNdEyrz/BPMkrp Ob+cImbhroV16kgziVEISqUyse8V/BdYLgsSpccqaOPJ60OUroobShFbO TjwO9ECFAQnOuaR3YESGETdSVhul6DYLWmhuoFIml7bxHqYPgZxy6D62Y GPazdVO+2TuzWZWG0RSHh8aqdgZWDOhwikAYb8zWdakQZRBXKcdTDlZmB g==; X-IronPort-AV: E=McAfee;i="6600,9927,10875"; a="390535921" X-IronPort-AV: E=Sophos;i="6.03,255,1694761200"; d="scan'208";a="390535921" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2023 17:06:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10875"; a="883017474" X-IronPort-AV: E=Sophos;i="6.03,255,1694761200"; d="scan'208";a="883017474" Received: from sqa-gate.sh.intel.com (HELO spr-2s5.tsp.org) ([10.239.48.212]) by orsmga004.jf.intel.com with ESMTP; 26 Oct 2023 17:05:59 -0700 From: Tina Zhang To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian , Nicolin Chen , Michael Shavit , Vasant Hegde , Jason Gunthorpe Subject: [PATCH v10 1/6] iommu: Change kconfig around IOMMU_SVA Date: Fri, 27 Oct 2023 08:05:20 +0800 Message-Id: <20231027000525.1278806-2-tina.zhang@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20231027000525.1278806-1-tina.zhang@intel.com> References: <20231027000525.1278806-1-tina.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Jason Gunthorpe Linus suggested that the kconfig here is confusing: https://lore.kernel.org/all/CAHk-=3DwgUiAtiszwseM1p2fCJ+sC4XWQ+YN4TanFhUgvU= qjr9Xw@mail.gmail.com/ Let's break it into three kconfigs controlling distinct things: - CONFIG_IOMMU_MM_DATA controls if the mm_struct has the additional fields for the IOMMU. Currently only PASID, but later patches store a struct iommu_mm_data * - CONFIG_ARCH_HAS_CPU_PASID controls if the arch needs the scheduling bit for keeping track of the ENQCMD instruction. x86 will select this if IOMMU_SVA is enabled - IOMMU_SVA controls if the IOMMU core compiles in the SVA support code for iommu driver use and the IOMMU exported API This way ARM will not enable CONFIG_ARCH_HAS_CPU_PASID Signed-off-by: Jason Gunthorpe --- arch/Kconfig | 5 +++++ arch/x86/Kconfig | 1 + arch/x86/kernel/traps.c | 2 +- drivers/iommu/Kconfig | 1 + include/linux/iommu.h | 2 +- include/linux/mm_types.h | 2 +- include/linux/sched.h | 2 +- kernel/fork.c | 2 +- mm/Kconfig | 3 +++ mm/init-mm.c | 2 +- 10 files changed, 16 insertions(+), 6 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 12d51495caec..35b9fd559bb6 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -301,6 +301,11 @@ config ARCH_HAS_DMA_CLEAR_UNCACHED config ARCH_HAS_CPU_FINALIZE_INIT bool =20 +# The architecture has a per-task state that includes the mm's PASID +config ARCH_HAS_CPU_PASID + bool + select IOMMU_MM_DATA + # Select if arch init_task must go in the __init_task_data section config ARCH_TASK_STRUCT_ON_STACK bool diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 66bfabae8814..afd9c2dc228b 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -72,6 +72,7 @@ config X86 select ARCH_HAS_CACHE_LINE_SIZE select ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION select ARCH_HAS_CPU_FINALIZE_INIT + select ARCH_HAS_CPU_PASID if IOMMU_SVA select ARCH_HAS_CURRENT_STACK_POINTER select ARCH_HAS_DEBUG_VIRTUAL select ARCH_HAS_DEBUG_VM_PGTABLE if !X86_PAE diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index c876f1d36a81..2b62dbb3396a 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -565,7 +565,7 @@ static bool fixup_iopl_exception(struct pt_regs *regs) */ static bool try_fixup_enqcmd_gp(void) { -#ifdef CONFIG_IOMMU_SVA +#ifdef CONFIG_ARCH_HAS_CPU_PASID u32 pasid; =20 /* diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index 3199fd54b462..52fa02f1b675 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -156,6 +156,7 @@ config IOMMU_DMA =20 # Shared Virtual Addressing config IOMMU_SVA + select IOMMU_MM_DATA bool =20 config FSL_PAMU diff --git a/include/linux/iommu.h b/include/linux/iommu.h index b5b254e205c6..c1f2b6f9a3d0 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -1189,7 +1189,7 @@ static inline bool tegra_dev_iommu_get_stream_id(stru= ct device *dev, u32 *stream return false; } =20 -#ifdef CONFIG_IOMMU_SVA +#ifdef CONFIG_IOMMU_MM_DATA static inline void mm_pasid_init(struct mm_struct *mm) { mm->pasid =3D IOMMU_PASID_INVALID; diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index 36c5b43999e6..330f3cd8d5ad 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -881,7 +881,7 @@ struct mm_struct { #endif struct work_struct async_put_work; =20 -#ifdef CONFIG_IOMMU_SVA +#ifdef CONFIG_IOMMU_MM_DATA u32 pasid; #endif #ifdef CONFIG_KSM diff --git a/include/linux/sched.h b/include/linux/sched.h index 77f01ac385f7..3ac8e8556c3d 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -949,7 +949,7 @@ struct task_struct { /* Recursion prevention for eventfd_signal() */ unsigned in_eventfd:1; #endif -#ifdef CONFIG_IOMMU_SVA +#ifdef CONFIG_ARCH_HAS_CPU_PASID unsigned pasid_activated:1; #endif #ifdef CONFIG_CPU_SUP_INTEL diff --git a/kernel/fork.c b/kernel/fork.c index 3b6d20dfb9a8..d28f0d4582dc 100644 --- a/kernel/fork.c +++ b/kernel/fork.c @@ -1179,7 +1179,7 @@ static struct task_struct *dup_task_struct(struct tas= k_struct *orig, int node) tsk->use_memdelay =3D 0; #endif =20 -#ifdef CONFIG_IOMMU_SVA +#ifdef CONFIG_ARCH_HAS_CPU_PASID tsk->pasid_activated =3D 0; #endif =20 diff --git a/mm/Kconfig b/mm/Kconfig index 264a2df5ecf5..fee4a15e444b 100644 --- a/mm/Kconfig +++ b/mm/Kconfig @@ -1258,6 +1258,9 @@ config LOCK_MM_AND_FIND_VMA bool depends on !STACK_GROWSUP =20 +config IOMMU_MM_DATA + bool + source "mm/damon/Kconfig" =20 endmenu diff --git a/mm/init-mm.c b/mm/init-mm.c index cfd367822cdd..c52dc2740a3d 100644 --- a/mm/init-mm.c +++ b/mm/init-mm.c @@ -44,7 +44,7 @@ struct mm_struct init_mm =3D { #endif .user_ns =3D &init_user_ns, .cpu_bitmap =3D CPU_BITS_NONE, -#ifdef CONFIG_IOMMU_SVA +#ifdef CONFIG_IOMMU_MM_DATA .pasid =3D IOMMU_PASID_INVALID, #endif INIT_MM_CONTEXT(init_mm) --=20 2.39.3 From nobody Thu Sep 11 20:57:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CFECC25B6E for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10875"; a="390535941" X-IronPort-AV: E=Sophos;i="6.03,255,1694761200"; d="scan'208";a="390535941" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2023 17:06:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10875"; a="883017483" X-IronPort-AV: E=Sophos;i="6.03,255,1694761200"; d="scan'208";a="883017483" Received: from sqa-gate.sh.intel.com (HELO spr-2s5.tsp.org) ([10.239.48.212]) by orsmga004.jf.intel.com with ESMTP; 26 Oct 2023 17:06:03 -0700 From: Tina Zhang To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian , Nicolin Chen , Michael Shavit , Vasant Hegde , Tina Zhang , Jason Gunthorpe Subject: [PATCH v10 2/6] iommu/vt-d: Remove mm->pasid in intel_sva_bind_mm() Date: Fri, 27 Oct 2023 08:05:21 +0800 Message-Id: <20231027000525.1278806-3-tina.zhang@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20231027000525.1278806-1-tina.zhang@intel.com> References: <20231027000525.1278806-1-tina.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The pasid is passed in as a parameter through .set_dev_pasid() callback. Thus, intel_sva_bind_mm() can directly use it instead of retrieving the pasid value from mm->pasid. Suggested-by: Lu Baolu Reviewed-by: Lu Baolu Reviewed-by: Jason Gunthorpe Signed-off-by: Tina Zhang Signed-off-by: Jason Gunthorpe --- drivers/iommu/intel/svm.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index 50a481c895b8..3c531af58658 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -290,21 +290,22 @@ static int pasid_to_svm_sdev(struct device *dev, unsi= gned int pasid, } =20 static int intel_svm_bind_mm(struct intel_iommu *iommu, struct device *dev, - struct mm_struct *mm) + struct iommu_domain *domain, ioasid_t pasid) { struct device_domain_info *info =3D dev_iommu_priv_get(dev); + struct mm_struct *mm =3D domain->mm; struct intel_svm_dev *sdev; struct intel_svm *svm; unsigned long sflags; int ret =3D 0; =20 - svm =3D pasid_private_find(mm->pasid); + svm =3D pasid_private_find(pasid); if (!svm) { svm =3D kzalloc(sizeof(*svm), GFP_KERNEL); if (!svm) return -ENOMEM; =20 - svm->pasid =3D mm->pasid; + svm->pasid =3D pasid; svm->mm =3D mm; INIT_LIST_HEAD_RCU(&svm->devs); =20 @@ -342,7 +343,7 @@ static int intel_svm_bind_mm(struct intel_iommu *iommu,= struct device *dev, =20 /* Setup the pasid table: */ sflags =3D cpu_feature_enabled(X86_FEATURE_LA57) ? PASID_FLAG_FL5LP : 0; - ret =3D intel_pasid_setup_first_level(iommu, dev, mm->pgd, mm->pasid, + ret =3D intel_pasid_setup_first_level(iommu, dev, mm->pgd, pasid, FLPT_DEFAULT_DID, sflags); if (ret) goto free_sdev; @@ -356,7 +357,7 @@ static int intel_svm_bind_mm(struct intel_iommu *iommu,= struct device *dev, free_svm: if (list_empty(&svm->devs)) { mmu_notifier_unregister(&svm->notifier, mm); - pasid_private_remove(mm->pasid); + pasid_private_remove(pasid); kfree(svm); } =20 @@ -796,9 +797,8 @@ static int intel_svm_set_dev_pasid(struct iommu_domain = *domain, { struct device_domain_info *info =3D dev_iommu_priv_get(dev); struct intel_iommu *iommu =3D info->iommu; - struct mm_struct *mm =3D domain->mm; =20 - return intel_svm_bind_mm(iommu, dev, mm); + return intel_svm_bind_mm(iommu, dev, domain, pasid); } =20 static void intel_svm_domain_free(struct iommu_domain *domain) --=20 2.39.3 From nobody Thu Sep 11 20:57:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 174CCC25B48 for ; Fri, 27 Oct 2023 00:06:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345100AbjJ0AGV (ORCPT ); Thu, 26 Oct 2023 20:06:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38130 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234957AbjJ0AGS (ORCPT ); Thu, 26 Oct 2023 20:06:18 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1464D4A for ; Thu, 26 Oct 2023 17:06:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698365171; x=1729901171; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8aGMn5/vfSADeWLQaTl9m/yanb3xXbgo+NKsYW7+mrI=; b=RgBnjMvBOVoIpOrLAdlUYEndDiNVpnXA756QOwXPr/SyvRqlUda9pZDz 0vQGQc/dqLfJIhLWEE07aKsjdwE1K0v4OF3rLUMTiJjlZxBsjYix2ryK/ Q54mOI8oQ34rfLNDVZHgQFxcluevIiNuNY8v4iC6m0MSlswgzkH0LqA/Z 18PWyz36FAAwki52xoB1PdtT3gKyFJRRs0ekFkPCygL0rcuJLskGSBLY9 KZMOM9jCDGAk4YYZD1lDHqrGMFqmbupbq7YVYdTH+nin7q8wBmUjPHMlo /wNst2xshLDFqcIDJSaxnzALEkgMuiPzkW/oiqS4CSVJoFyimd5JT5cVf w==; X-IronPort-AV: E=McAfee;i="6600,9927,10875"; a="390535962" X-IronPort-AV: E=Sophos;i="6.03,255,1694761200"; d="scan'208";a="390535962" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2023 17:06:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10875"; a="883017492" X-IronPort-AV: E=Sophos;i="6.03,255,1694761200"; d="scan'208";a="883017492" Received: from sqa-gate.sh.intel.com (HELO spr-2s5.tsp.org) ([10.239.48.212]) by orsmga004.jf.intel.com with ESMTP; 26 Oct 2023 17:06:06 -0700 From: Tina Zhang To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian , Nicolin Chen , Michael Shavit , Vasant Hegde , Tina Zhang , Jason Gunthorpe Subject: [PATCH v10 3/6] iommu: Add mm_get_enqcmd_pasid() helper function Date: Fri, 27 Oct 2023 08:05:22 +0800 Message-Id: <20231027000525.1278806-4-tina.zhang@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20231027000525.1278806-1-tina.zhang@intel.com> References: <20231027000525.1278806-1-tina.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" mm_get_enqcmd_pasid() should be used by architecture code and closely related to learn the PASID value that the x86 ENQCMD operation should use for the mm. For the moment SMMUv3 uses this without any connection to ENQCMD, it will be cleaned up similar to how the prior patch made VT-d use the PASID argument of set_dev_pasid(). The motivation is to replace mm->pasid with an iommu private data structure that is introduced in a later patch. Reviewed-by: Lu Baolu Reviewed-by: Jason Gunthorpe Tested-by: Nicolin Chen Signed-off-by: Tina Zhang Signed-off-by: Jason Gunthorpe --- arch/x86/kernel/traps.c | 2 +- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 23 ++++++++++++------- drivers/iommu/iommu-sva.c | 2 +- include/linux/iommu.h | 12 ++++++++++ 4 files changed, 29 insertions(+), 10 deletions(-) diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 2b62dbb3396a..5944d759afe7 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -591,7 +591,7 @@ static bool try_fixup_enqcmd_gp(void) if (!mm_valid_pasid(current->mm)) return false; =20 - pasid =3D current->mm->pasid; + pasid =3D mm_get_enqcmd_pasid(current->mm); =20 /* * Did this thread already have its PASID activated? diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iomm= u/arm/arm-smmu-v3/arm-smmu-v3-sva.c index 353248ab18e7..05722121f00e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -246,7 +246,8 @@ static void arm_smmu_mm_arch_invalidate_secondary_tlbs(= struct mmu_notifier *mn, smmu_domain); } =20 - arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, start, size); + arm_smmu_atc_inv_domain(smmu_domain, mm_get_enqcmd_pasid(mm), start, + size); } =20 static void arm_smmu_mm_release(struct mmu_notifier *mn, struct mm_struct = *mm) @@ -264,10 +265,11 @@ static void arm_smmu_mm_release(struct mmu_notifier *= mn, struct mm_struct *mm) * DMA may still be running. Keep the cd valid to avoid C_BAD_CD events, * but disable translation. */ - arm_smmu_update_ctx_desc_devices(smmu_domain, mm->pasid, &quiet_cd); + arm_smmu_update_ctx_desc_devices(smmu_domain, mm_get_enqcmd_pasid(mm), + &quiet_cd); =20 arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_mn->cd->asid); - arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, 0, 0); + arm_smmu_atc_inv_domain(smmu_domain, mm_get_enqcmd_pasid(mm), 0, 0); =20 smmu_mn->cleared =3D true; mutex_unlock(&sva_lock); @@ -325,10 +327,13 @@ arm_smmu_mmu_notifier_get(struct arm_smmu_domain *smm= u_domain, =20 spin_lock_irqsave(&smmu_domain->devices_lock, flags); list_for_each_entry(master, &smmu_domain->devices, domain_head) { - ret =3D arm_smmu_write_ctx_desc(master, mm->pasid, cd); + ret =3D arm_smmu_write_ctx_desc(master, mm_get_enqcmd_pasid(mm), + cd); if (ret) { - list_for_each_entry_from_reverse(master, &smmu_domain->devices, domain_= head) - arm_smmu_write_ctx_desc(master, mm->pasid, NULL); + list_for_each_entry_from_reverse( + master, &smmu_domain->devices, domain_head) + arm_smmu_write_ctx_desc( + master, mm_get_enqcmd_pasid(mm), NULL); break; } } @@ -358,7 +363,8 @@ static void arm_smmu_mmu_notifier_put(struct arm_smmu_m= mu_notifier *smmu_mn) =20 list_del(&smmu_mn->list); =20 - arm_smmu_update_ctx_desc_devices(smmu_domain, mm->pasid, NULL); + arm_smmu_update_ctx_desc_devices(smmu_domain, mm_get_enqcmd_pasid(mm), + NULL); =20 /* * If we went through clear(), we've already invalidated, and no @@ -366,7 +372,8 @@ static void arm_smmu_mmu_notifier_put(struct arm_smmu_m= mu_notifier *smmu_mn) */ if (!smmu_mn->cleared) { arm_smmu_tlb_inv_asid(smmu_domain->smmu, cd->asid); - arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, 0, 0); + arm_smmu_atc_inv_domain(smmu_domain, mm_get_enqcmd_pasid(mm), 0, + 0); } =20 /* Frees smmu_mn */ diff --git a/drivers/iommu/iommu-sva.c b/drivers/iommu/iommu-sva.c index b78671a8a914..4a2f5699747f 100644 --- a/drivers/iommu/iommu-sva.c +++ b/drivers/iommu/iommu-sva.c @@ -141,7 +141,7 @@ u32 iommu_sva_get_pasid(struct iommu_sva *handle) { struct iommu_domain *domain =3D handle->domain; =20 - return domain->mm->pasid; + return mm_get_enqcmd_pasid(domain->mm); } EXPORT_SYMBOL_GPL(iommu_sva_get_pasid); =20 diff --git a/include/linux/iommu.h b/include/linux/iommu.h index c1f2b6f9a3d0..95792bf42f96 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -1198,6 +1198,12 @@ static inline bool mm_valid_pasid(struct mm_struct *= mm) { return mm->pasid !=3D IOMMU_PASID_INVALID; } + +static inline u32 mm_get_enqcmd_pasid(struct mm_struct *mm) +{ + return mm->pasid; +} + void mm_pasid_drop(struct mm_struct *mm); struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm); @@ -1220,6 +1226,12 @@ static inline u32 iommu_sva_get_pasid(struct iommu_s= va *handle) } static inline void mm_pasid_init(struct mm_struct *mm) {} static inline bool mm_valid_pasid(struct mm_struct *mm) { return false; } + +static inline u32 mm_get_enqcmd_pasid(struct mm_struct *mm) +{ + return IOMMU_PASID_INVALID; +} + static inline void mm_pasid_drop(struct mm_struct *mm) {} #endif /* CONFIG_IOMMU_SVA */ =20 --=20 2.39.3 From nobody Thu Sep 11 20:57:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CD65C25B48 for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10875"; a="390535989" X-IronPort-AV: E=Sophos;i="6.03,255,1694761200"; d="scan'208";a="390535989" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2023 17:06:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10875"; a="883017504" X-IronPort-AV: E=Sophos;i="6.03,255,1694761200"; d="scan'208";a="883017504" Received: from sqa-gate.sh.intel.com (HELO spr-2s5.tsp.org) ([10.239.48.212]) by orsmga004.jf.intel.com with ESMTP; 26 Oct 2023 17:06:10 -0700 From: Tina Zhang To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian , Nicolin Chen , Michael Shavit , Vasant Hegde , Tina Zhang , Jason Gunthorpe Subject: [PATCH v10 4/6] mm: Add structure to keep sva information Date: Fri, 27 Oct 2023 08:05:23 +0800 Message-Id: <20231027000525.1278806-5-tina.zhang@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20231027000525.1278806-1-tina.zhang@intel.com> References: <20231027000525.1278806-1-tina.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Introduce iommu_mm_data structure to keep sva information (pasid and the related sva domains). Add iommu_mm pointer, pointing to an instance of iommu_mm_data structure, to mm. Reviewed-by: Vasant Hegde Reviewed-by: Lu Baolu Reviewed-by: Jason Gunthorpe Tested-by: Nicolin Chen Signed-off-by: Tina Zhang Signed-off-by: Jason Gunthorpe --- include/linux/iommu.h | 5 +++++ include/linux/mm_types.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 95792bf42f96..a807182c3d2e 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -679,6 +679,11 @@ struct iommu_sva { struct iommu_domain *domain; }; =20 +struct iommu_mm_data { + u32 pasid; + struct list_head sva_domains; +}; + int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwno= de, const struct iommu_ops *ops); void iommu_fwspec_free(struct device *dev); diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index 330f3cd8d5ad..2dbf18e26c5a 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -670,6 +670,7 @@ struct mm_cid { #endif =20 struct kioctx_table; +struct iommu_mm_data; struct mm_struct { struct { /* @@ -883,6 +884,7 @@ struct mm_struct { =20 #ifdef CONFIG_IOMMU_MM_DATA u32 pasid; + struct iommu_mm_data *iommu_mm; #endif #ifdef CONFIG_KSM /* --=20 2.39.3 From nobody Thu Sep 11 20:57:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11E05C25B6B for ; Fri, 27 Oct 2023 00:06:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345065AbjJ0AGg (ORCPT ); Thu, 26 Oct 2023 20:06:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38252 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345093AbjJ0AGZ (ORCPT ); Thu, 26 Oct 2023 20:06:25 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 940C110FD for ; Thu, 26 Oct 2023 17:06:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698365178; x=1729901178; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=L9eyFj95pKnzjt3LxhfE3TFhO0038AM7EKiLfkWLEes=; b=b0fRLztRCeTgUN8Fm8Xz0YgqDdMT4dnFBIv42iX00CBmUd1t9dQhjEFX qm7qUqz5AdUdIhcyiX+KIZeyD3k6hbr7QoQ3kjDD5eEu69+9cluUOgAEQ utZ1YmaFTpHo7OX0oUptCbolWriG8IewfuM43ioBkGqhgXDUnKXJnjMsf NTEGXGmA5N52m3Qwby0V36kpvQnDWqCebRn5cug8vIed5Eby8kEaXLZ7J 6oXqrAXZ8d86jJlflLvez3JBoKdjQwlUseK7UEAMiUM99bS+Nv6NNgjpe 8Ar/dfs2+R8oZmusmeNRRB8uHL8oP+dGwp+qtfBvYObGvxUk6QofbAUc1 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10875"; a="390536030" X-IronPort-AV: E=Sophos;i="6.03,255,1694761200"; d="scan'208";a="390536030" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2023 17:06:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10875"; a="883017517" X-IronPort-AV: E=Sophos;i="6.03,255,1694761200"; d="scan'208";a="883017517" Received: from sqa-gate.sh.intel.com (HELO spr-2s5.tsp.org) ([10.239.48.212]) by orsmga004.jf.intel.com with ESMTP; 26 Oct 2023 17:06:14 -0700 From: Tina Zhang To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian , Nicolin Chen , Michael Shavit , Vasant Hegde , Tina Zhang , Jason Gunthorpe Subject: [PATCH v10 5/6] iommu: Support mm PASID 1:n with sva domains Date: Fri, 27 Oct 2023 08:05:24 +0800 Message-Id: <20231027000525.1278806-6-tina.zhang@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20231027000525.1278806-1-tina.zhang@intel.com> References: <20231027000525.1278806-1-tina.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Each mm bound to devices gets a PASID and corresponding sva domains allocated in iommu_sva_bind_device(), which are referenced by iommu_mm field of the mm. The PASID is released in __mmdrop(), while a sva domain is released when no one is using it (the reference count is decremented in iommu_sva_unbind_device()). However, although sva domains and their PASID are separate objects such that their own life cycles could be handled independently, an enqcmd use case may require releasing the PASID in releasing the mm (i.e., once a PASID is allocated for a mm, it will be permanently used by the mm and won't be released until the end of mm) and only allows to drop the PASID after the sva domains are released. To this end, mmgrab() is called in iommu_sva_domain_alloc() to increment the mm reference count and mmdrop() is invoked in iommu_domain_free() to decrement the mm reference count. Since the required info of PASID and sva domains is kept in struct iommu_mm_data of a mm, use mm->iommu_mm field instead of the old pasid field in mm struct. The sva domain list is protected by iommu_sva_lock. Besides, this patch removes mm_pasid_init(), as with the introduced iommu_mm structure, initializing mm pasid in mm_init() is unnecessary. Reviewed-by: Lu Baolu Reviewed-by: Vasant Hegde Reviewed-by: Jason Gunthorpe Tested-by: Nicolin Chen Signed-off-by: Tina Zhang Signed-off-by: Jason Gunthorpe --- drivers/iommu/iommu-sva.c | 92 +++++++++++++++++++++++---------------- include/linux/iommu.h | 23 ++++++++-- 2 files changed, 74 insertions(+), 41 deletions(-) diff --git a/drivers/iommu/iommu-sva.c b/drivers/iommu/iommu-sva.c index 4a2f5699747f..5175e8d85247 100644 --- a/drivers/iommu/iommu-sva.c +++ b/drivers/iommu/iommu-sva.c @@ -12,32 +12,42 @@ static DEFINE_MUTEX(iommu_sva_lock); =20 /* Allocate a PASID for the mm within range (inclusive) */ -static int iommu_sva_alloc_pasid(struct mm_struct *mm, struct device *dev) +static struct iommu_mm_data *iommu_alloc_mm_data(struct mm_struct *mm, str= uct device *dev) { + struct iommu_mm_data *iommu_mm; ioasid_t pasid; - int ret =3D 0; + + lockdep_assert_held(&iommu_sva_lock); =20 if (!arch_pgtable_dma_compat(mm)) - return -EBUSY; + return ERR_PTR(-EBUSY); =20 - mutex_lock(&iommu_sva_lock); + iommu_mm =3D mm->iommu_mm; /* Is a PASID already associated with this mm? */ - if (mm_valid_pasid(mm)) { - if (mm->pasid >=3D dev->iommu->max_pasids) - ret =3D -EOVERFLOW; - goto out; + if (iommu_mm) { + if (iommu_mm->pasid >=3D dev->iommu->max_pasids) + return ERR_PTR(-EOVERFLOW); + return iommu_mm; } =20 + iommu_mm =3D kzalloc(sizeof(struct iommu_mm_data), GFP_KERNEL); + if (!iommu_mm) + return ERR_PTR(-ENOMEM); + pasid =3D iommu_alloc_global_pasid(dev); if (pasid =3D=3D IOMMU_PASID_INVALID) { - ret =3D -ENOSPC; - goto out; + kfree(iommu_mm); + return ERR_PTR(-ENOSPC); } - mm->pasid =3D pasid; - ret =3D 0; -out: - mutex_unlock(&iommu_sva_lock); - return ret; + iommu_mm->pasid =3D pasid; + INIT_LIST_HEAD(&iommu_mm->sva_domains); + /* + * Make sure the write to mm->iommu_mm is not reordered in front of + * initialization to iommu_mm fields. If it does, readers may see a + * valid iommu_mm with uninitialized values. + */ + smp_store_release(&mm->iommu_mm, iommu_mm); + return iommu_mm; } =20 /** @@ -58,31 +68,33 @@ static int iommu_sva_alloc_pasid(struct mm_struct *mm, = struct device *dev) */ struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_stru= ct *mm) { + struct iommu_mm_data *iommu_mm; struct iommu_domain *domain; struct iommu_sva *handle; int ret; =20 + mutex_lock(&iommu_sva_lock); + /* Allocate mm->pasid if necessary. */ - ret =3D iommu_sva_alloc_pasid(mm, dev); - if (ret) - return ERR_PTR(ret); + iommu_mm =3D iommu_alloc_mm_data(mm, dev); + if (IS_ERR(iommu_mm)) { + ret =3D PTR_ERR(iommu_mm); + goto out_unlock; + } =20 handle =3D kzalloc(sizeof(*handle), GFP_KERNEL); - if (!handle) - return ERR_PTR(-ENOMEM); - - mutex_lock(&iommu_sva_lock); - /* Search for an existing domain. */ - domain =3D iommu_get_domain_for_dev_pasid(dev, mm->pasid, - IOMMU_DOMAIN_SVA); - if (IS_ERR(domain)) { - ret =3D PTR_ERR(domain); + if (!handle) { + ret =3D -ENOMEM; goto out_unlock; } =20 - if (domain) { - domain->users++; - goto out; + /* Search for an existing domain. */ + list_for_each_entry(domain, &mm->iommu_mm->sva_domains, next) { + ret =3D iommu_attach_device_pasid(domain, dev, iommu_mm->pasid); + if (!ret) { + domain->users++; + goto out; + } } =20 /* Allocate a new domain and set it on device pasid. */ @@ -92,23 +104,23 @@ struct iommu_sva *iommu_sva_bind_device(struct device = *dev, struct mm_struct *mm goto out_unlock; } =20 - ret =3D iommu_attach_device_pasid(domain, dev, mm->pasid); + ret =3D iommu_attach_device_pasid(domain, dev, iommu_mm->pasid); if (ret) goto out_free_domain; domain->users =3D 1; + list_add(&domain->next, &mm->iommu_mm->sva_domains); + out: mutex_unlock(&iommu_sva_lock); handle->dev =3D dev; handle->domain =3D domain; - return handle; =20 out_free_domain: iommu_domain_free(domain); + kfree(handle); out_unlock: mutex_unlock(&iommu_sva_lock); - kfree(handle); - return ERR_PTR(ret); } EXPORT_SYMBOL_GPL(iommu_sva_bind_device); @@ -124,12 +136,13 @@ EXPORT_SYMBOL_GPL(iommu_sva_bind_device); void iommu_sva_unbind_device(struct iommu_sva *handle) { struct iommu_domain *domain =3D handle->domain; - ioasid_t pasid =3D domain->mm->pasid; + struct iommu_mm_data *iommu_mm =3D domain->mm->iommu_mm; struct device *dev =3D handle->dev; =20 mutex_lock(&iommu_sva_lock); + iommu_detach_device_pasid(domain, dev, iommu_mm->pasid); if (--domain->users =3D=3D 0) { - iommu_detach_device_pasid(domain, dev, pasid); + list_del(&domain->next); iommu_domain_free(domain); } mutex_unlock(&iommu_sva_lock); @@ -205,8 +218,11 @@ iommu_sva_handle_iopf(struct iommu_fault *fault, void = *data) =20 void mm_pasid_drop(struct mm_struct *mm) { - if (likely(!mm_valid_pasid(mm))) + struct iommu_mm_data *iommu_mm =3D mm->iommu_mm; + + if (!iommu_mm) return; =20 - iommu_free_global_pasid(mm->pasid); + iommu_free_global_pasid(iommu_mm->pasid); + kfree(iommu_mm); } diff --git a/include/linux/iommu.h b/include/linux/iommu.h index a807182c3d2e..98b199603588 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -113,6 +113,11 @@ struct iommu_domain { struct { /* IOMMU_DOMAIN_SVA */ struct mm_struct *mm; int users; + /* + * Next iommu_domain in mm->iommu_mm->sva-domains list + * protected by iommu_sva_lock. + */ + struct list_head next; }; }; }; @@ -1197,16 +1202,28 @@ static inline bool tegra_dev_iommu_get_stream_id(st= ruct device *dev, u32 *stream #ifdef CONFIG_IOMMU_MM_DATA static inline void mm_pasid_init(struct mm_struct *mm) { - mm->pasid =3D IOMMU_PASID_INVALID; + /* + * During dup_mm(), a new mm will be memcpy'd from an old one and that ma= kes + * the new mm and the old one point to a same iommu_mm instance. When eit= her + * one of the two mms gets released, the iommu_mm instance is freed, leav= ing + * the other mm running into a use-after-free/double-free problem. To avo= id + * the problem, zeroing the iommu_mm pointer of a new mm is needed here. + */ + mm->iommu_mm =3D NULL; } + static inline bool mm_valid_pasid(struct mm_struct *mm) { - return mm->pasid !=3D IOMMU_PASID_INVALID; + return READ_ONCE(mm->iommu_mm); } =20 static inline u32 mm_get_enqcmd_pasid(struct mm_struct *mm) { - return mm->pasid; + struct iommu_mm_data *iommu_mm =3D READ_ONCE(mm->iommu_mm); + + if (!iommu_mm) + return IOMMU_PASID_INVALID; + return iommu_mm->pasid; } =20 void mm_pasid_drop(struct mm_struct *mm); --=20 2.39.3 From nobody Thu Sep 11 20:57:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77625C25B48 for ; Fri, 27 Oct 2023 00:08:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230216AbjJ0AIE (ORCPT ); Thu, 26 Oct 2023 20:08:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44806 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235015AbjJ0AGb (ORCPT ); Thu, 26 Oct 2023 20:06:31 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 45077D5A for ; Thu, 26 Oct 2023 17:06:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698365182; x=1729901182; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MTHNq7mq1BoG4uUzxjqrRuUzMIjd1diRWhgrOELvF9E=; b=bD0p7/XJbfe3M1jN9kRvq3vLBW74QKZvHRtNMXhefQBFNHOycfwdqI6q DWVWjr7i7or/Sb5mL/KCtlUPzq5A4uEoJZccmle63u/scRTE4A1Vv/avd PxEZVVisNobFqJFFT4NWcRouH75z6YB2zxW9IFomIOvVbSKiNr2Y9I3Mr vOq6pvGvB7QYrTledZ8NkNZpLkTGJ7H8auTqBxTPbBcEaMAGPsdJ47Dab KRPmL1t8Ca477BaAu+lsd5xmP9JGRhnZrO9tGPZ0x+DUpMh76gR4U5how TZy0zuj5KIV3aCQhtYV+H5SJv9sXNwYVcJLspJf4TlUjk+MpTePavFvTt w==; X-IronPort-AV: E=McAfee;i="6600,9927,10875"; a="390536057" X-IronPort-AV: E=Sophos;i="6.03,255,1694761200"; d="scan'208";a="390536057" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2023 17:06:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10875"; a="883017524" X-IronPort-AV: E=Sophos;i="6.03,255,1694761200"; d="scan'208";a="883017524" Received: from sqa-gate.sh.intel.com (HELO spr-2s5.tsp.org) ([10.239.48.212]) by orsmga004.jf.intel.com with ESMTP; 26 Oct 2023 17:06:18 -0700 From: Tina Zhang To: iommu@lists.linux.dev, linux-kernel@vger.kernel.org Cc: David Woodhouse , Lu Baolu , Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian , Nicolin Chen , Michael Shavit , Vasant Hegde , Tina Zhang , Jason Gunthorpe Subject: [PATCH v10 6/6] mm: Deprecate pasid field Date: Fri, 27 Oct 2023 08:05:25 +0800 Message-Id: <20231027000525.1278806-7-tina.zhang@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20231027000525.1278806-1-tina.zhang@intel.com> References: <20231027000525.1278806-1-tina.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Drop the pasid field, as all the information needed for sva domain management has been moved to the newly added iommu_mm field. Reviewed-by: Lu Baolu Reviewed-by: Vasant Hegde Reviewed-by: Jason Gunthorpe Signed-off-by: Tina Zhang Signed-off-by: Jason Gunthorpe --- include/linux/mm_types.h | 1 - mm/init-mm.c | 3 --- 2 files changed, 4 deletions(-) diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index 2dbf18e26c5a..5fb881b4758c 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -883,7 +883,6 @@ struct mm_struct { struct work_struct async_put_work; =20 #ifdef CONFIG_IOMMU_MM_DATA - u32 pasid; struct iommu_mm_data *iommu_mm; #endif #ifdef CONFIG_KSM diff --git a/mm/init-mm.c b/mm/init-mm.c index c52dc2740a3d..24c809379274 100644 --- a/mm/init-mm.c +++ b/mm/init-mm.c @@ -44,9 +44,6 @@ struct mm_struct init_mm =3D { #endif .user_ns =3D &init_user_ns, .cpu_bitmap =3D CPU_BITS_NONE, -#ifdef CONFIG_IOMMU_MM_DATA - .pasid =3D IOMMU_PASID_INVALID, -#endif INIT_MM_CONTEXT(init_mm) }; =20 --=20 2.39.3