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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id u202-20020a6279d3000000b006b3dc56c944sm7708372pfc.133.2023.10.24.03.19.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Oct 2023 03:19:18 -0700 (PDT) From: Nylon Chen To: linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de, emil.renner.berthing@canonical.com, vincent.chen@sifive.com Cc: nylon.chen@sifive.com, greentime.hu@sifive.com, zong.li@sifive.com, nylon7717@gmail.com Subject: [v5 2/2] pwm: sifive: change the PWM controlled LED algorithm Date: Tue, 24 Oct 2023 18:19:02 +0800 Message-ID: <20231024101902.6689-3-nylon.chen@sifive.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231024101902.6689-1-nylon.chen@sifive.com> References: <20231024101902.6689-1-nylon.chen@sifive.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The `frac` variable represents the pulse inactive time, and the result of this algorithm is the pulse active time. Therefore, we must reverse the = result. The reference is SiFive FU740-C000 Manual[0] Link: https://sifive.cdn.prismic.io/sifive/1a82e600-1f93-4f41-b2d8-86ed8b16= acba_fu740-c000-manual-v1p6.pdf [0] Signed-off-by: Nylon Chen Signed-off-by: Vincent Chen --- drivers/pwm/pwm-sifive.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c index eabddb7c7820..353c2342fbf1 100644 --- a/drivers/pwm/pwm-sifive.c +++ b/drivers/pwm/pwm-sifive.c @@ -101,7 +101,7 @@ static void pwm_sifive_update_clock(struct pwm_sifive_d= data *ddata, =20 /* As scale <=3D 15 the shift operation cannot overflow. */ num =3D (unsigned long long)NSEC_PER_SEC << (PWM_SIFIVE_CMPWIDTH + scale); - ddata->real_period =3D div64_ul(num, rate); + ddata->real_period =3D DIV_ROUND_UP_ULL(num, rate); dev_dbg(ddata->chip.dev, "New real_period =3D %u ns\n", ddata->real_period); } @@ -121,13 +121,14 @@ static int pwm_sifive_get_state(struct pwm_chip *chip= , struct pwm_device *pwm, state->enabled =3D false; =20 state->period =3D ddata->real_period; + + duty =3D (1U << PWM_SIFIVE_CMPWIDTH) - 1 - duty; state->duty_cycle =3D (u64)duty * ddata->real_period >> PWM_SIFIVE_CMPWIDTH; - state->polarity =3D PWM_POLARITY_INVERSED; + state->polarity =3D PWM_POLARITY_NORMAL; =20 return 0; } - static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm, const struct pwm_state *state) { @@ -139,7 +140,7 @@ static int pwm_sifive_apply(struct pwm_chip *chip, stru= ct pwm_device *pwm, int ret =3D 0; u32 frac; =20 - if (state->polarity !=3D PWM_POLARITY_INVERSED) + if (state->polarity !=3D PWM_POLARITY_NORMAL) return -EINVAL; =20 cur_state =3D pwm->state; @@ -158,6 +159,7 @@ static int pwm_sifive_apply(struct pwm_chip *chip, stru= ct pwm_device *pwm, num =3D (u64)duty_cycle * (1U << PWM_SIFIVE_CMPWIDTH); frac =3D DIV64_U64_ROUND_CLOSEST(num, state->period); /* The hardware cannot generate a 100% duty cycle */ + frac =3D (1U << PWM_SIFIVE_CMPWIDTH) - 1 - frac; frac =3D min(frac, (1U << PWM_SIFIVE_CMPWIDTH) - 1); =20 mutex_lock(&ddata->lock); --=20 2.42.0