From nobody Thu Jan 1 10:42:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37A3CC00A8F for ; Tue, 24 Oct 2023 09:34:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234074AbjJXJed (ORCPT ); Tue, 24 Oct 2023 05:34:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234199AbjJXJdt (ORCPT ); Tue, 24 Oct 2023 05:33:49 -0400 Received: from szxga02-in.huawei.com (szxga02-in.huawei.com [45.249.212.188]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62DE610C2 for ; Tue, 24 Oct 2023 02:32:56 -0700 (PDT) Received: from canpemm500009.china.huawei.com (unknown [172.30.72.57]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4SF6FH6z43zNpKL; Tue, 24 Oct 2023 17:28:51 +0800 (CST) Received: from localhost.localdomain (10.50.163.32) by canpemm500009.china.huawei.com (7.192.105.203) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.31; Tue, 24 Oct 2023 17:32:54 +0800 From: Yicong Yang To: , , , , CC: , , , Subject: [PATCH 2/2] drivers/perf: hisi_pcie: Initialize event->cpu only on success Date: Tue, 24 Oct 2023 17:29:54 +0800 Message-ID: <20231024092954.42297-3-yangyicong@huawei.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20231024092954.42297-1-yangyicong@huawei.com> References: <20231024092954.42297-1-yangyicong@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.50.163.32] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To canpemm500009.china.huawei.com (7.192.105.203) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Yicong Yang Initialize the event->cpu only on success. To be more reasonable and keep consistent with other PMUs. Signed-off-by: Yicong Yang --- drivers/perf/hisilicon/hisi_pcie_pmu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilico= n/hisi_pcie_pmu.c index 051efffc44c8..b90ba8aca3fa 100644 --- a/drivers/perf/hisilicon/hisi_pcie_pmu.c +++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c @@ -357,8 +357,6 @@ static int hisi_pcie_pmu_event_init(struct perf_event *= event) if (event->attr.type !=3D event->pmu->type) return -ENOENT; =20 - event->cpu =3D pcie_pmu->on_cpu; - if (EXT_COUNTER_IS_USED(hisi_pcie_get_event(event))) hwc->event_base =3D HISI_PCIE_EXT_CNT; else @@ -374,6 +372,8 @@ static int hisi_pcie_pmu_event_init(struct perf_event *= event) if (!hisi_pcie_pmu_validate_event_group(event)) return -EINVAL; =20 + event->cpu =3D pcie_pmu->on_cpu; + return 0; } =20 --=20 2.24.0