From nobody Thu Jan 1 11:02:35 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D156C00A8F for ; Tue, 24 Oct 2023 00:28:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232563AbjJXA2B (ORCPT ); Mon, 23 Oct 2023 20:28:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49918 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232289AbjJXA1g (ORCPT ); Mon, 23 Oct 2023 20:27:36 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D3EC19B1 for ; Mon, 23 Oct 2023 17:27:05 -0700 (PDT) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-5a818c1d2c7so55846427b3.0 for ; Mon, 23 Oct 2023 17:27:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1698107220; x=1698712020; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=LVgGvnFW9q/mijlkpvY+O1Zix6lIKT3NeTV0IdzcrJI=; b=ZlsezbuSc+49AlP1bQ2PbpiZz+SvGIjUjkpTcqbur2L82OEZHm/v2oH9FbQMBa+nD8 z9vwRJcPw9HE83O5eH8uKM3UKVoq8lIyZAUBZHtsROj5AV4Wia46Ii931l2owGabLBwO a3xJAhU2ROlfPTSvG6aNWeO80IVZjbde0stEmzzEd9ZJ9rzRP6tmBvX5A9hlE95QTQN/ hgRxXwcsWQHWeeeaOHu9wj9ejFaCtAcmnBxYZb9CrlZEuoi5EP70JtQaCRcrVtK23xRQ 6MYlBqp5+TEk+s0nNHJIWj3r/oW9Seik3JaNzL72Is4ch3OrpPifsTI7NbijX2G0Ce5W K4TQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698107220; x=1698712020; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=LVgGvnFW9q/mijlkpvY+O1Zix6lIKT3NeTV0IdzcrJI=; b=hnPQGPvyNG+wixx0jAUhlwRD/zvWG+0/oT7wFjHpu/EaB2akO2bXR3fnQem7WhTpbE 29VPDqIUTPyUdbgT2MnADQZtlNopsNg8aD+lFtldWQXa9NsgYfFp0PgTG9tTa/ev/IxP AQdjA94bYjZwt5HKnkZCZOfH/Jlv5E5B3KlXqOx9ekHdv6lhiRtjcjNPYKcGLsAIgAxK lqmAlzTi0zvCHISM6PoUX3acX2qMl2PU6PAcNBBMQ3CfhjapMT5cJIc7HVFgNlJ5FdTj DzDzrqt8XDIMGgyxpS0muAGJ5kT+u1x3JkXqq8HtdfRMfMXy1gkaSyP/hVw2h7QvLHNT Uehw== X-Gm-Message-State: AOJu0Yz++unoh7OFdwEVRj0T223QjGBIAF+vKaRZsj3Ftv8YB0f0EFMZ muiOJWTxPGb8kTD66J7ZjjsitnBx6Qc= X-Google-Smtp-Source: AGHT+IGDUdJgo+MJ6+2aZRfH3/YowIGxQsEvFIcUSx2iogNdLSlS53ij+RVDbB0oTfE5uPotkkKXADFTBn0= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6902:105:b0:da0:3da9:ce08 with SMTP id o5-20020a056902010500b00da03da9ce08mr8158ybh.10.1698107220804; Mon, 23 Oct 2023 17:27:00 -0700 (PDT) Reply-To: Sean Christopherson Date: Mon, 23 Oct 2023 17:26:33 -0700 In-Reply-To: <20231024002633.2540714-1-seanjc@google.com> Mime-Version: 1.0 References: <20231024002633.2540714-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.758.gaed0368e0e-goog Message-ID: <20231024002633.2540714-14-seanjc@google.com> Subject: [PATCH v5 13/13] KVM: selftests: Extend PMU counters test to permute on vPMU version From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Jinrong Liang , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Extent the PMU counters test to verify that KVM emulates the vPMU (or not) according to the vPMU version exposed to the guest. KVM's ABI (which does NOT reflect Intel's architectural behavior) is that GP counters are available if the PMU version is >0, and that fixed counters and PERF_GLOBAL_CTRL are available if the PMU version is >1. Test up to vPMU version 5, i.e. the current architectural max. KVM only officially supports up to version 2, but the behavior of the counters is backwards compatible, i.e. KVM shouldn't do something completely different for a higher, architecturally-defined vPMU version. Verify KVM behavior against the effective vPMU version, e.g. advertising vPMU 5 when KVM only supports vPMU 2 shouldn't magically unlock vPMU 5 features. Suggested-by: Like Xu Suggested-by: Jinrong Liang Signed-off-by: Sean Christopherson --- .../selftests/kvm/x86_64/pmu_counters_test.c | 60 +++++++++++++++---- 1 file changed, 47 insertions(+), 13 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools= /testing/selftests/kvm/x86_64/pmu_counters_test.c index 1c392ad156f4..85b01dd5b2cd 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -12,6 +12,8 @@ /* Guest payload for any performance counter counting */ #define NUM_BRANCHES 10 =20 +static uint8_t kvm_pmu_version; + static struct kvm_vm *pmu_vm_create_with_one_vcpu(struct kvm_vcpu **vcpu, void *guest_code) { @@ -21,6 +23,8 @@ static struct kvm_vm *pmu_vm_create_with_one_vcpu(struct = kvm_vcpu **vcpu, vm_init_descriptor_tables(vm); vcpu_init_descriptor_tables(*vcpu); =20 + sync_global_to_guest(vm, kvm_pmu_version); + return vm; } =20 @@ -97,6 +101,19 @@ static bool pmu_is_null_feature(struct kvm_x86_pmu_feat= ure event) return !(*(u64 *)&event); } =20 +static uint8_t guest_get_pmu_version(void) +{ + /* + * Return the effective PMU version, i.e. the minimum between what KVM + * supports and what is enumerated to the guest. The counters test + * deliberately advertises a PMU version to the guest beyond what is + * actually supported by KVM to verify KVM doesn't freak out and do + * something bizarre with an architecturally valid, but unsupported, + * version. + */ + return min_t(uint8_t, kvm_pmu_version, this_cpu_property(X86_PROPERTY_PMU= _VERSION)); +} + static void guest_measure_loop(uint8_t idx) { const struct { @@ -121,7 +138,7 @@ static void guest_measure_loop(uint8_t idx) }; =20 uint32_t nr_gp_counters =3D this_cpu_property(X86_PROPERTY_PMU_NR_GP_COUN= TERS); - uint32_t pmu_version =3D this_cpu_property(X86_PROPERTY_PMU_VERSION); + uint32_t pmu_version =3D guest_get_pmu_version(); struct kvm_x86_pmu_feature gp_event, fixed_event; uint32_t counter_msr; unsigned int i; @@ -270,9 +287,12 @@ static void guest_rd_wr_counters(uint32_t base_msr, ui= nt8_t nr_possible_counters =20 static void guest_test_gp_counters(void) { - uint8_t nr_gp_counters =3D this_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNT= ERS); + uint8_t nr_gp_counters =3D 0; uint32_t base_msr; =20 + if (guest_get_pmu_version()) + nr_gp_counters =3D this_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTERS); + if (rdmsr(MSR_IA32_PERF_CAPABILITIES) & PMU_CAP_FW_WRITES) base_msr =3D MSR_IA32_PMC0; else @@ -282,7 +302,8 @@ static void guest_test_gp_counters(void) GUEST_DONE(); } =20 -static void test_gp_counters(uint8_t nr_gp_counters, uint64_t perf_cap) +static void test_gp_counters(uint8_t pmu_version, uint8_t nr_gp_counters, + uint64_t perf_cap) { struct kvm_vcpu *vcpu; struct kvm_vm *vm; @@ -305,16 +326,17 @@ static void guest_test_fixed_counters(void) uint8_t i; =20 /* KVM provides fixed counters iff the vPMU version is 2+. */ - if (this_cpu_property(X86_PROPERTY_PMU_VERSION) >=3D 2) + if (guest_get_pmu_version() >=3D 2) nr_fixed_counters =3D this_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTE= RS); =20 /* * The supported bitmask for fixed counters was introduced in PMU * version 5. */ - if (this_cpu_property(X86_PROPERTY_PMU_VERSION) >=3D 5) + if (guest_get_pmu_version() >=3D 5) supported_bitmask =3D this_cpu_property(X86_PROPERTY_PMU_FIXED_COUNTERS_= BITMASK); =20 + guest_rd_wr_counters(MSR_CORE_PERF_FIXED_CTR0, MAX_NR_FIXED_COUNTERS, nr_fixed_counters, supported_bitmask); =20 @@ -345,7 +367,7 @@ static void guest_test_fixed_counters(void) GUEST_DONE(); } =20 -static void test_fixed_counters(uint8_t nr_fixed_counters, +static void test_fixed_counters(uint8_t pmu_version, uint8_t nr_fixed_coun= ters, uint32_t supported_bitmask, uint64_t perf_cap) { struct kvm_vcpu *vcpu; @@ -368,22 +390,32 @@ static void test_intel_counters(void) { uint8_t nr_fixed_counters =3D kvm_cpu_property(X86_PROPERTY_PMU_NR_FIXED_= COUNTERS); uint8_t nr_gp_counters =3D kvm_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTE= RS); + uint8_t max_pmu_version =3D kvm_cpu_property(X86_PROPERTY_PMU_VERSION); unsigned int i; + uint8_t j, v; uint32_t k; - uint8_t j; =20 const uint64_t perf_caps[] =3D { 0, PMU_CAP_FW_WRITES, }; =20 - for (i =3D 0; i < ARRAY_SIZE(perf_caps); i++) { - for (j =3D 0; j <=3D nr_gp_counters; j++) - test_gp_counters(j, perf_caps[i]); + /* + * Test up to PMU v5, which is the current maximum version defined by + * Intel, i.e. is the last version that is guaranteed to be backwards + * compatible with KVM's existing behavior. + */ + max_pmu_version =3D max_t(typeof(max_pmu_version), max_pmu_version, 5); =20 - for (j =3D 0; j <=3D nr_fixed_counters; j++) { - for (k =3D 0; k <=3D (BIT(nr_fixed_counters) - 1); k++) - test_fixed_counters(j, k, perf_caps[i]); + for (v =3D 0; v <=3D max_pmu_version; v++) { + for (i =3D 0; i < ARRAY_SIZE(perf_caps) + 1; i++) { + for (j =3D 0; j <=3D nr_gp_counters; j++) + test_gp_counters(v, j, perf_caps[i]); + + for (j =3D 0; j <=3D nr_fixed_counters; j++) { + for (k =3D 0; k <=3D (BIT(nr_fixed_counters) - 1); k++) + test_fixed_counters(v, j, k, perf_caps[i]); + } } } } @@ -397,6 +429,8 @@ int main(int argc, char *argv[]) TEST_REQUIRE(kvm_cpu_property(X86_PROPERTY_PMU_VERSION) > 0); TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_PDCM)); =20 + kvm_pmu_version =3D kvm_cpu_property(X86_PROPERTY_PMU_VERSION); + test_intel_arch_events(); test_intel_counters(); =20 --=20 2.42.0.758.gaed0368e0e-goog