From nobody Thu Jan 1 11:02:35 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5E02C25B6B for ; Tue, 24 Oct 2023 00:27:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232043AbjJXA1p (ORCPT ); Mon, 23 Oct 2023 20:27:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232017AbjJXA1c (ORCPT ); Mon, 23 Oct 2023 20:27:32 -0400 Received: from mail-yb1-xb4a.google.com (mail-yb1-xb4a.google.com [IPv6:2607:f8b0:4864:20::b4a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE80F10C for ; Mon, 23 Oct 2023 17:27:00 -0700 (PDT) Received: by mail-yb1-xb4a.google.com with SMTP id 3f1490d57ef6-da03ef6fc30so120437276.0 for ; Mon, 23 Oct 2023 17:27:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1698107217; x=1698712017; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=+RoABScHftr6hc85optkCJ7nhZ5E1OiZawbS1myLt1k=; b=eMGZGAZkRO4INJO88zyNeJLn+DRIDaKftvYeybrSWKHr04FRGR3jYgdBGqt5xkFHAD ZJjgaEpzztwtuFxLc8DHNz/fQKIDWajon8LfcNUtDN2cGQHb8tKsW2w5VnAzKty5YLve 67yAnoTlwuDLkRiqxHaQdcKZHeSFty1ErgaxUDLNS0FHnuDnblobFoNXqR4ujyALWXBP Jf42k1TVteAhtajErQva3jngeJY6IriDmnmKnQtTXZrcOPp8KQN0YfYeUQqA/yR3bien IUzPyo8f3PYVNBCTm2QnM4IiI5Z07YFtvy5D0XKvEKJFESxELcxqM/iIf6ZmCqPcn9LY Wrow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698107217; x=1698712017; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=+RoABScHftr6hc85optkCJ7nhZ5E1OiZawbS1myLt1k=; b=A6qS3YU9+qsxaH+imzFYqtyR1taiX7qVFS1F56IoJgL/BP5ga3sFwaqoKtWdjgT5ky 4QgphfWGy0r3XUiFSvdtyPCDljREB/+jqRYtHJZWVSaM1mP0X+xsrASaIOR2TbSj2ZnB Hsk6/Gs5t3lxcZ1MxsoI/Bb+RRbwMv1iWiqMUDoC3Mnxc7Y8gL8Tktqfi9mjJS7mFk8o DI8UeJcqbyAF1Qs9PzC/h5ztB2GSJwjTVINT1MY7G5Jdgu7gCNKh0NHWfLK7zLvo0yf8 iD6z+ObkD+dmSnoXtd9oR00e3fiQY4ntZBTklg19JEVMrMAt5cEWCpfnYkhMSyC/mGU5 1Dww== X-Gm-Message-State: AOJu0YwseaiFJ1WsHZaMkLagTwegzHSpMAOyW1vBjk03zxCianLr/h0D qn77Dg0F5AhlU6LB3gReDnctNovGe/c= X-Google-Smtp-Source: AGHT+IHnZB9VUP/AjDxRMoLdyognF9OR6mpTMbnZtDIBdpMUAztz6mgWts0jTKuU6zplFlh/CTfPSmJAMx8= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6902:1083:b0:d9a:47ea:69a5 with SMTP id v3-20020a056902108300b00d9a47ea69a5mr291702ybu.1.1698107216905; Mon, 23 Oct 2023 17:26:56 -0700 (PDT) Reply-To: Sean Christopherson Date: Mon, 23 Oct 2023 17:26:31 -0700 In-Reply-To: <20231024002633.2540714-1-seanjc@google.com> Mime-Version: 1.0 References: <20231024002633.2540714-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.758.gaed0368e0e-goog Message-ID: <20231024002633.2540714-12-seanjc@google.com> Subject: [PATCH v5 11/13] KVM: selftests: Test consistency of CPUID with num of fixed counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Jinrong Liang , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jinrong Liang Extend the PMU counters test to verify KVM emulation of fixed counters in addition to general purpose counters. Fixed counters add an extra wrinkle in the form of an extra supported bitmask. Thus quoth the SDM: fixed-function performance counter 'i' is supported if ECX[i] || (EDX[4:0= ] > i) Test that KVM handles a counter being available through either method. Co-developed-by: Like Xu Signed-off-by: Like Xu Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- .../selftests/kvm/x86_64/pmu_counters_test.c | 58 ++++++++++++++++++- 1 file changed, 55 insertions(+), 3 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools= /testing/selftests/kvm/x86_64/pmu_counters_test.c index 274b7f4d4b53..f1d9cdd69a17 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -227,13 +227,19 @@ __GUEST_ASSERT(expect_gp ? vector =3D=3D GP_VECTOR : = !vector, \ expect_gp ? "#GP" : "no fault", msr, vector) \ =20 static void guest_rd_wr_counters(uint32_t base_msr, uint8_t nr_possible_co= unters, - uint8_t nr_counters) + uint8_t nr_counters, uint32_t or_mask) { uint8_t i; =20 for (i =3D 0; i < nr_possible_counters; i++) { const uint32_t msr =3D base_msr + i; - const bool expect_success =3D i < nr_counters; + + /* + * Fixed counters are supported if the counter is less than the + * number of enumerated contiguous counters *or* the counter is + * explicitly enumerated in the supported counters mask. + */ + const bool expect_success =3D i < nr_counters || (or_mask & BIT(i)); =20 /* * KVM drops writes to MSR_P6_PERFCTR[0|1] if the counters are @@ -273,7 +279,7 @@ static void guest_test_gp_counters(void) else base_msr =3D MSR_IA32_PERFCTR0; =20 - guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters); + guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters, 0); } =20 static void test_gp_counters(uint8_t nr_gp_counters, uint64_t perf_cap) @@ -292,10 +298,51 @@ static void test_gp_counters(uint8_t nr_gp_counters, = uint64_t perf_cap) kvm_vm_free(vm); } =20 +static void guest_test_fixed_counters(void) +{ + uint64_t supported_bitmask =3D 0; + uint8_t nr_fixed_counters =3D 0; + + /* KVM provides fixed counters iff the vPMU version is 2+. */ + if (this_cpu_property(X86_PROPERTY_PMU_VERSION) >=3D 2) + nr_fixed_counters =3D this_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTE= RS); + + /* + * The supported bitmask for fixed counters was introduced in PMU + * version 5. + */ + if (this_cpu_property(X86_PROPERTY_PMU_VERSION) >=3D 5) + supported_bitmask =3D this_cpu_property(X86_PROPERTY_PMU_FIXED_COUNTERS_= BITMASK); + + guest_rd_wr_counters(MSR_CORE_PERF_FIXED_CTR0, MAX_NR_FIXED_COUNTERS, + nr_fixed_counters, supported_bitmask); +} + +static void test_fixed_counters(uint8_t nr_fixed_counters, + uint32_t supported_bitmask, uint64_t perf_cap) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + + vm =3D pmu_vm_create_with_one_vcpu(&vcpu, guest_test_fixed_counters); + + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_FIXED_COUNTERS_BITMASK, + supported_bitmask); + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_NR_FIXED_COUNTERS, + nr_fixed_counters); + vcpu_set_msr(vcpu, MSR_IA32_PERF_CAPABILITIES, perf_cap); + + run_vcpu(vcpu); + + kvm_vm_free(vm); +} + static void test_intel_counters(void) { + uint8_t nr_fixed_counters =3D kvm_cpu_property(X86_PROPERTY_PMU_NR_FIXED_= COUNTERS); uint8_t nr_gp_counters =3D kvm_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTE= RS); unsigned int i; + uint32_t k; uint8_t j; =20 const uint64_t perf_caps[] =3D { @@ -306,6 +353,11 @@ static void test_intel_counters(void) for (i =3D 0; i < ARRAY_SIZE(perf_caps); i++) { for (j =3D 0; j <=3D nr_gp_counters; j++) test_gp_counters(j, perf_caps[i]); + + for (j =3D 0; j <=3D nr_fixed_counters; j++) { + for (k =3D 0; k <=3D (BIT(nr_fixed_counters) - 1); k++) + test_fixed_counters(j, k, perf_caps[i]); + } } } =20 --=20 2.42.0.758.gaed0368e0e-goog