From nobody Thu Jan 1 19:58:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 319F5C004C0 for ; Thu, 19 Oct 2023 21:41:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346619AbjJSVlf (ORCPT ); Thu, 19 Oct 2023 17:41:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58634 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346611AbjJSVlb (ORCPT ); Thu, 19 Oct 2023 17:41:31 -0400 Received: from mail-ot1-x32f.google.com (mail-ot1-x32f.google.com [IPv6:2607:f8b0:4864:20::32f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64A71BE for ; Thu, 19 Oct 2023 14:41:29 -0700 (PDT) Received: by mail-ot1-x32f.google.com with SMTP id 46e09a7af769-6c63588b554so123746a34.0 for ; Thu, 19 Oct 2023 14:41:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1697751688; x=1698356488; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=11HgkmJwUW4khfF5QifIk7vYcCQBT3/MHwOSE1WT73k=; b=orGUZU3QJrKJLGGl2E09UDuQCiWTNz2VZdI2SXIfZh6dsmXE0hkocrsfpRobg31YHR sEvIaBgOJQVfDZh2rHYndui6Lz/gJgFZCBRVo0I36xPOIuOpa28PtqV5XD2Oqonxo1E5 SkLavj8F9q9Ctxmr2T4jjf6qeooTkxkmGt62owHvefpbeU3ZtZj9deeCkydbEEL6nSiC er/+wS6c59QKn21w5XGxXvhJP3b0PfcO4UDNEoVQElWAdgx9r9o+9aWTH3i0WWwsOgir UB32/tTTJh/C+cgzUBPsSaslW/B9K4TOEBMWK+bxjOtyzGPSr9PKSHC+yIX6UrloWhF+ nX7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697751688; x=1698356488; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=11HgkmJwUW4khfF5QifIk7vYcCQBT3/MHwOSE1WT73k=; b=aBm3wBEsT2NpRlV4GL267rw4/KPnHjnzbrIJQDnLiRwTiJpETvt0wfV+JsNsHRXf+Z TIe/5Rnwdj9Q91YyJ3yb8eNf6QLJHk3BL0qkmdkkVvZELq9g4UuGwop7A322tAtef/TV HQhtR6FIShiSp4qQNgeTP2umkBU5x9T2Toq7SmHqCROgNmYiesuoFsCxYX3e84HIaduH F1/9wMsclBQnkHNISXjN5YSsI9lkjVsd7S7/gs38+jUdjL2+auAuyEF94qJmt5yIi0m4 Ozqf8l5tSStJUDEsYdQ7iAbwgT5frCwUoLEokGnVcoJunHyXWLvm+fxW/mZCRxV3s/aY IetA== X-Gm-Message-State: AOJu0Yzvpgs89W4XQhpPNTk8s106XLbEnHhnF5DjJPZwAfsnVqVRzNuT RhTrwVDT2SpiYiYrLCaSwVg28g== X-Google-Smtp-Source: AGHT+IEE+8xuYsQMXwMYXaplFxUkaKCbIJOJmgM54RyAhax4BrCFE6tLKTa7uDWpLGJQx/InDquIZg== X-Received: by 2002:a05:6830:2b0b:b0:6b9:4155:7dbd with SMTP id l11-20020a0568302b0b00b006b941557dbdmr78880otv.0.1697751688625; Thu, 19 Oct 2023 14:41:28 -0700 (PDT) Received: from charlie.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id x19-20020a9d6293000000b006ce2c785ac7sm81812otk.8.2023.10.19.14.41.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Oct 2023 14:41:28 -0700 (PDT) From: Charlie Jenkins Date: Thu, 19 Oct 2023 14:41:24 -0700 Subject: [PATCH v6 1/3] riscv: Avoid unaligned access when relocating modules MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20231019-module_relocations-v6-1-94726e644321@rivosinc.com> References: <20231019-module_relocations-v6-0-94726e644321@rivosinc.com> In-Reply-To: <20231019-module_relocations-v6-0-94726e644321@rivosinc.com> To: linux-riscv@lists.infradead.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org Cc: Eric Biederman , Kees Cook , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andreas Schwab , Emil Renner Berthing , Samuel Holland , Charlie Jenkins , Emil Renner Berthing X-Mailer: b4 0.12.3 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Emil Renner Berthing With the C-extension regular 32bit instructions are not necessarily aligned on 4-byte boundaries. RISC-V instructions are in fact an ordered list of 16bit little-endian "parcels", so access the instruction as such. This should also make the code work in case someone builds a big-endian RISC-V machine. Signed-off-by: Emil Renner Berthing Signed-off-by: Charlie Jenkins --- arch/riscv/kernel/module.c | 153 +++++++++++++++++++++++------------------= ---- 1 file changed, 77 insertions(+), 76 deletions(-) diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index 7c651d55fcbd..a9e94e939cb5 100644 --- a/arch/riscv/kernel/module.c +++ b/arch/riscv/kernel/module.c @@ -27,68 +27,86 @@ static bool riscv_insn_valid_32bit_offset(ptrdiff_t val) #endif } =20 -static int apply_r_riscv_32_rela(struct module *me, u32 *location, Elf_Add= r v) +static int riscv_insn_rmw(void *location, u32 keep, u32 set) +{ + u16 *parcel =3D location; + u32 insn =3D (u32)le16_to_cpu(parcel[0]) | (u32)le16_to_cpu(parcel[1]) <<= 16; + + insn &=3D keep; + insn |=3D set; + + parcel[0] =3D cpu_to_le32(insn); + parcel[1] =3D cpu_to_le16(insn >> 16); + return 0; +} + +static int riscv_insn_rvc_rmw(void *location, u16 keep, u16 set) +{ + u16 *parcel =3D location; + + *parcel =3D cpu_to_le16((le16_to_cpu(*parcel) & keep) | set); + return 0; +} + +static int apply_r_riscv_32_rela(struct module *me, void *location, Elf_Ad= dr v) { if (v !=3D (u32)v) { pr_err("%s: value %016llx out of range for 32-bit field\n", me->name, (long long)v); return -EINVAL; } - *location =3D v; + *(u32 *)location =3D v; return 0; } =20 -static int apply_r_riscv_64_rela(struct module *me, u32 *location, Elf_Add= r v) +static int apply_r_riscv_64_rela(struct module *me, void *location, Elf_Ad= dr v) { *(u64 *)location =3D v; return 0; } =20 -static int apply_r_riscv_branch_rela(struct module *me, u32 *location, +static int apply_r_riscv_branch_rela(struct module *me, void *location, Elf_Addr v) { - ptrdiff_t offset =3D (void *)v - (void *)location; + ptrdiff_t offset =3D (void *)v - location; u32 imm12 =3D (offset & 0x1000) << (31 - 12); u32 imm11 =3D (offset & 0x800) >> (11 - 7); u32 imm10_5 =3D (offset & 0x7e0) << (30 - 10); u32 imm4_1 =3D (offset & 0x1e) << (11 - 4); =20 - *location =3D (*location & 0x1fff07f) | imm12 | imm11 | imm10_5 | imm4_1; - return 0; + return riscv_insn_rmw(location, 0x1fff07f, imm12 | imm11 | imm10_5 | imm4= _1); } =20 -static int apply_r_riscv_jal_rela(struct module *me, u32 *location, +static int apply_r_riscv_jal_rela(struct module *me, void *location, Elf_Addr v) { - ptrdiff_t offset =3D (void *)v - (void *)location; + ptrdiff_t offset =3D (void *)v - location; u32 imm20 =3D (offset & 0x100000) << (31 - 20); u32 imm19_12 =3D (offset & 0xff000); u32 imm11 =3D (offset & 0x800) << (20 - 11); u32 imm10_1 =3D (offset & 0x7fe) << (30 - 10); =20 - *location =3D (*location & 0xfff) | imm20 | imm19_12 | imm11 | imm10_1; - return 0; + return riscv_insn_rmw(location, 0xfff, imm20 | imm19_12 | imm11 | imm10_1= ); } =20 -static int apply_r_riscv_rvc_branch_rela(struct module *me, u32 *location, +static int apply_r_riscv_rvc_branch_rela(struct module *me, void *location, Elf_Addr v) { - ptrdiff_t offset =3D (void *)v - (void *)location; + ptrdiff_t offset =3D (void *)v - location; u16 imm8 =3D (offset & 0x100) << (12 - 8); u16 imm7_6 =3D (offset & 0xc0) >> (6 - 5); u16 imm5 =3D (offset & 0x20) >> (5 - 2); u16 imm4_3 =3D (offset & 0x18) << (12 - 5); u16 imm2_1 =3D (offset & 0x6) << (12 - 10); =20 - *(u16 *)location =3D (*(u16 *)location & 0xe383) | - imm8 | imm7_6 | imm5 | imm4_3 | imm2_1; - return 0; + return riscv_insn_rvc_rmw(location, 0xe383, + imm8 | imm7_6 | imm5 | imm4_3 | imm2_1); } =20 -static int apply_r_riscv_rvc_jump_rela(struct module *me, u32 *location, +static int apply_r_riscv_rvc_jump_rela(struct module *me, void *location, Elf_Addr v) { - ptrdiff_t offset =3D (void *)v - (void *)location; + ptrdiff_t offset =3D (void *)v - location; u16 imm11 =3D (offset & 0x800) << (12 - 11); u16 imm10 =3D (offset & 0x400) >> (10 - 8); u16 imm9_8 =3D (offset & 0x300) << (12 - 11); @@ -98,16 +116,14 @@ static int apply_r_riscv_rvc_jump_rela(struct module *= me, u32 *location, u16 imm4 =3D (offset & 0x10) << (12 - 5); u16 imm3_1 =3D (offset & 0xe) << (12 - 10); =20 - *(u16 *)location =3D (*(u16 *)location & 0xe003) | - imm11 | imm10 | imm9_8 | imm7 | imm6 | imm5 | imm4 | imm3_1; - return 0; + return riscv_insn_rvc_rmw(location, 0xe003, + imm11 | imm10 | imm9_8 | imm7 | imm6 | imm5 | imm4 | imm3_1); } =20 -static int apply_r_riscv_pcrel_hi20_rela(struct module *me, u32 *location, +static int apply_r_riscv_pcrel_hi20_rela(struct module *me, void *location, Elf_Addr v) { - ptrdiff_t offset =3D (void *)v - (void *)location; - s32 hi20; + ptrdiff_t offset =3D (void *)v - location; =20 if (!riscv_insn_valid_32bit_offset(offset)) { pr_err( @@ -116,23 +132,20 @@ static int apply_r_riscv_pcrel_hi20_rela(struct modul= e *me, u32 *location, return -EINVAL; } =20 - hi20 =3D (offset + 0x800) & 0xfffff000; - *location =3D (*location & 0xfff) | hi20; - return 0; + return riscv_insn_rmw(location, 0xfff, (offset + 0x800) & 0xfffff000); } =20 -static int apply_r_riscv_pcrel_lo12_i_rela(struct module *me, u32 *locatio= n, +static int apply_r_riscv_pcrel_lo12_i_rela(struct module *me, void *locati= on, Elf_Addr v) { /* * v is the lo12 value to fill. It is calculated before calling this * handler. */ - *location =3D (*location & 0xfffff) | ((v & 0xfff) << 20); - return 0; + return riscv_insn_rmw(location, 0xfffff, (v & 0xfff) << 20); } =20 -static int apply_r_riscv_pcrel_lo12_s_rela(struct module *me, u32 *locatio= n, +static int apply_r_riscv_pcrel_lo12_s_rela(struct module *me, void *locati= on, Elf_Addr v) { /* @@ -142,15 +155,12 @@ static int apply_r_riscv_pcrel_lo12_s_rela(struct mod= ule *me, u32 *location, u32 imm11_5 =3D (v & 0xfe0) << (31 - 11); u32 imm4_0 =3D (v & 0x1f) << (11 - 4); =20 - *location =3D (*location & 0x1fff07f) | imm11_5 | imm4_0; - return 0; + return riscv_insn_rmw(location, 0x1fff07f, imm11_5 | imm4_0); } =20 -static int apply_r_riscv_hi20_rela(struct module *me, u32 *location, +static int apply_r_riscv_hi20_rela(struct module *me, void *location, Elf_Addr v) { - s32 hi20; - if (IS_ENABLED(CONFIG_CMODEL_MEDLOW)) { pr_err( "%s: target %016llx can not be addressed by the 32-bit offset from PC = =3D %p\n", @@ -158,22 +168,20 @@ static int apply_r_riscv_hi20_rela(struct module *me,= u32 *location, return -EINVAL; } =20 - hi20 =3D ((s32)v + 0x800) & 0xfffff000; - *location =3D (*location & 0xfff) | hi20; - return 0; + return riscv_insn_rmw(location, 0xfff, ((s32)v + 0x800) & 0xfffff000); } =20 -static int apply_r_riscv_lo12_i_rela(struct module *me, u32 *location, +static int apply_r_riscv_lo12_i_rela(struct module *me, void *location, Elf_Addr v) { /* Skip medlow checking because of filtering by HI20 already */ s32 hi20 =3D ((s32)v + 0x800) & 0xfffff000; s32 lo12 =3D ((s32)v - hi20); - *location =3D (*location & 0xfffff) | ((lo12 & 0xfff) << 20); - return 0; + + return riscv_insn_rmw(location, 0xfffff, (lo12 & 0xfff) << 20); } =20 -static int apply_r_riscv_lo12_s_rela(struct module *me, u32 *location, +static int apply_r_riscv_lo12_s_rela(struct module *me, void *location, Elf_Addr v) { /* Skip medlow checking because of filtering by HI20 already */ @@ -181,20 +189,18 @@ static int apply_r_riscv_lo12_s_rela(struct module *m= e, u32 *location, s32 lo12 =3D ((s32)v - hi20); u32 imm11_5 =3D (lo12 & 0xfe0) << (31 - 11); u32 imm4_0 =3D (lo12 & 0x1f) << (11 - 4); - *location =3D (*location & 0x1fff07f) | imm11_5 | imm4_0; - return 0; + + return riscv_insn_rmw(location, 0x1fff07f, imm11_5 | imm4_0); } =20 -static int apply_r_riscv_got_hi20_rela(struct module *me, u32 *location, +static int apply_r_riscv_got_hi20_rela(struct module *me, void *location, Elf_Addr v) { - ptrdiff_t offset =3D (void *)v - (void *)location; - s32 hi20; + ptrdiff_t offset =3D (void *)v - location; =20 /* Always emit the got entry */ if (IS_ENABLED(CONFIG_MODULE_SECTIONS)) { - offset =3D module_emit_got_entry(me, v); - offset =3D (void *)offset - (void *)location; + offset =3D (void *)module_emit_got_entry(me, v) - location; } else { pr_err( "%s: can not generate the GOT entry for symbol =3D %016llx from PC =3D= %p\n", @@ -202,22 +208,19 @@ static int apply_r_riscv_got_hi20_rela(struct module = *me, u32 *location, return -EINVAL; } =20 - hi20 =3D (offset + 0x800) & 0xfffff000; - *location =3D (*location & 0xfff) | hi20; - return 0; + return riscv_insn_rmw(location, 0xfff, (offset + 0x800) & 0xfffff000); } =20 -static int apply_r_riscv_call_plt_rela(struct module *me, u32 *location, +static int apply_r_riscv_call_plt_rela(struct module *me, void *location, Elf_Addr v) { - ptrdiff_t offset =3D (void *)v - (void *)location; + ptrdiff_t offset =3D (void *)v - location; u32 hi20, lo12; =20 if (!riscv_insn_valid_32bit_offset(offset)) { /* Only emit the plt entry if offset over 32-bit range */ if (IS_ENABLED(CONFIG_MODULE_SECTIONS)) { - offset =3D module_emit_plt_entry(me, v); - offset =3D (void *)offset - (void *)location; + offset =3D (void *)module_emit_plt_entry(me, v) - location; } else { pr_err( "%s: target %016llx can not be addressed by the 32-bit offset from PC= =3D %p\n", @@ -228,15 +231,14 @@ static int apply_r_riscv_call_plt_rela(struct module = *me, u32 *location, =20 hi20 =3D (offset + 0x800) & 0xfffff000; lo12 =3D (offset - hi20) & 0xfff; - *location =3D (*location & 0xfff) | hi20; - *(location + 1) =3D (*(location + 1) & 0xfffff) | (lo12 << 20); - return 0; + riscv_insn_rmw(location, 0xfff, hi20); + return riscv_insn_rmw(location + 4, 0xfffff, lo12 << 20); } =20 -static int apply_r_riscv_call_rela(struct module *me, u32 *location, +static int apply_r_riscv_call_rela(struct module *me, void *location, Elf_Addr v) { - ptrdiff_t offset =3D (void *)v - (void *)location; + ptrdiff_t offset =3D (void *)v - location; u32 hi20, lo12; =20 if (!riscv_insn_valid_32bit_offset(offset)) { @@ -248,18 +250,17 @@ static int apply_r_riscv_call_rela(struct module *me,= u32 *location, =20 hi20 =3D (offset + 0x800) & 0xfffff000; lo12 =3D (offset - hi20) & 0xfff; - *location =3D (*location & 0xfff) | hi20; - *(location + 1) =3D (*(location + 1) & 0xfffff) | (lo12 << 20); - return 0; + riscv_insn_rmw(location, 0xfff, hi20); + return riscv_insn_rmw(location + 4, 0xfffff, lo12 << 20); } =20 -static int apply_r_riscv_relax_rela(struct module *me, u32 *location, +static int apply_r_riscv_relax_rela(struct module *me, void *location, Elf_Addr v) { return 0; } =20 -static int apply_r_riscv_align_rela(struct module *me, u32 *location, +static int apply_r_riscv_align_rela(struct module *me, void *location, Elf_Addr v) { pr_err( @@ -268,49 +269,49 @@ static int apply_r_riscv_align_rela(struct module *me= , u32 *location, return -EINVAL; } =20 -static int apply_r_riscv_add16_rela(struct module *me, u32 *location, +static int apply_r_riscv_add16_rela(struct module *me, void *location, Elf_Addr v) { *(u16 *)location +=3D (u16)v; return 0; } =20 -static int apply_r_riscv_add32_rela(struct module *me, u32 *location, +static int apply_r_riscv_add32_rela(struct module *me, void *location, Elf_Addr v) { *(u32 *)location +=3D (u32)v; return 0; } =20 -static int apply_r_riscv_add64_rela(struct module *me, u32 *location, +static int apply_r_riscv_add64_rela(struct module *me, void *location, Elf_Addr v) { *(u64 *)location +=3D (u64)v; return 0; } =20 -static int apply_r_riscv_sub16_rela(struct module *me, u32 *location, +static int apply_r_riscv_sub16_rela(struct module *me, void *location, Elf_Addr v) { *(u16 *)location -=3D (u16)v; return 0; } =20 -static int apply_r_riscv_sub32_rela(struct module *me, u32 *location, +static int apply_r_riscv_sub32_rela(struct module *me, void *location, Elf_Addr v) { *(u32 *)location -=3D (u32)v; return 0; } =20 -static int apply_r_riscv_sub64_rela(struct module *me, u32 *location, +static int apply_r_riscv_sub64_rela(struct module *me, void *location, Elf_Addr v) { *(u64 *)location -=3D (u64)v; return 0; } =20 -static int (*reloc_handlers_rela[]) (struct module *me, u32 *location, +static int (*reloc_handlers_rela[]) (struct module *me, void *location, Elf_Addr v) =3D { [R_RISCV_32] =3D apply_r_riscv_32_rela, [R_RISCV_64] =3D apply_r_riscv_64_rela, @@ -342,9 +343,9 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *s= trtab, struct module *me) { Elf_Rela *rel =3D (void *) sechdrs[relsec].sh_addr; - int (*handler)(struct module *me, u32 *location, Elf_Addr v); + int (*handler)(struct module *me, void *location, Elf_Addr v); Elf_Sym *sym; - u32 *location; + void *location; unsigned int i, type; Elf_Addr v; int res; --=20 2.42.0