From nobody Fri Sep 20 12:51:01 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 525B9CDB484 for ; Wed, 18 Oct 2023 04:38:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235239AbjJREik (ORCPT ); Wed, 18 Oct 2023 00:38:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43350 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229578AbjJREhS (ORCPT ); Wed, 18 Oct 2023 00:37:18 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 302F7100; Tue, 17 Oct 2023 21:37:08 -0700 (PDT) X-UUID: f7fcfd7c6d6f11ee8051498923ad61e6-20231018 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=rDCZqqAgsLHVqzsDyWaPhzgQru1JM3krwTHzzXf3+h0=; b=lb+XREr44zCMqRMBtz/yPyUpQG/j7F/rk2JIgctBpH5GKnfP7rpyzG6GOLgtwOKG/3/byQLYrutUHqaq++F70AteTUHHGuGkDteWgYbcCER0FJsXwgsb5El2Kgri0F+o+C0uTMV8TyAhETW8e8SSaBxqEiHDoC+gV0U0Xubqm24=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.32,REQID:a13808fd-7503-432c-bdb3-e242c9dbb2fe,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:5f78ec9,CLOUDID:97e90fc0-14cc-44ca-b657-2d2783296e72,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: f7fcfd7c6d6f11ee8051498923ad61e6-20231018 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 911602735; Wed, 18 Oct 2023 12:36:56 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 18 Oct 2023 12:36:54 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 18 Oct 2023 12:36:54 +0800 From: Hsiao Chien Sung To: AngeloGioacchino Del Regno , "CK Hu" , Krzysztof Kozlowski , Matthias Brugger , Rob Herring CC: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Fei Shao , Sean Paul , Johnson Wang , "Nancy . Lin" , Moudy Ho , Hsiao Chien Sung , "Jason-JH . Lin" , Nathan Lu , , , , , Subject: [PATCH v9 19/23] drm/mediatek: Return error if MDP RDMA failed to enable the clock Date: Wed, 18 Oct 2023 12:36:46 +0800 Message-ID: <20231018043650.22532-20-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231018043650.22532-1-shawn.sung@mediatek.com> References: <20231018043650.22532-1-shawn.sung@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--2.708200-8.000000 X-TMASE-MatchedRID: dXJslEWlJ68PRVepDWIjx2NW0DAjL5p+Wot5Z16+u77vnm3ZesFzgvKC 81FnsF5IrUhQzMxACbr/9kP++bIewpcFdomgH0lnFEUknJ/kEl5q8/xv2Um1avoLR4+zsDTtrXT /QMyU2NxH9jHR2PGQD2j/1IQ2AqP08KC9+XOIoEH6RbO+ZghcVQIK4nTjGJzqA2KUQ0lkfh7GF2 Hf257q/N5paBsuHYsdG11BE5QqteN2a1GxGYqQBIlk9PZkM+7M8PZB/MwMuOEiHbpOSZI3d8C+k sT6a9fy X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--2.708200-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: CCA9D36BCEC2C426F4342BA2F5B9DB2CC651E91EEE6B34EB5009BE12E577917B2000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Return the result of clk_prepare_enable() instead of always returns 0. Fixes: f8946e2b6bb2 ("drm/mediatek: Add display MDP RDMA support for MT8195= ") Reviewed-by: CK Hu Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c b/drivers/gpu/drm/medi= atek/mtk_mdp_rdma.c index 5746f06220c1..cb36a961786f 100644 --- a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c @@ -247,8 +247,7 @@ int mtk_mdp_rdma_clk_enable(struct device *dev) { struct mtk_mdp_rdma *rdma =3D dev_get_drvdata(dev); =20 - clk_prepare_enable(rdma->clk); - return 0; + return clk_prepare_enable(rdma->clk); } =20 void mtk_mdp_rdma_clk_disable(struct device *dev) --=20 2.18.0