From nobody Fri Sep 20 11:49:46 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7183CDB482 for ; Wed, 18 Oct 2023 04:39:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229592AbjJREjL (ORCPT ); Wed, 18 Oct 2023 00:39:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42534 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235141AbjJREh1 (ORCPT ); Wed, 18 Oct 2023 00:37:27 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84C35D4B; Tue, 17 Oct 2023 21:37:22 -0700 (PDT) X-UUID: f6d15b5a6d6f11ee8051498923ad61e6-20231018 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=K35JS8Ar5MRk6sNwyWlENETaimMQcw4rGeg37mEpJ9w=; b=eNsE3BKtUYmFjSfRj1A+nDPl/VEF//nVXtNXUCUZDjiRk6egQpkzrqkmb2KQ/b+yEmEYUa9g/iKJ+uVJQSRSLHkwQN9Kxic0TgGWFJ99SyG8DQLBtfLBXYy9U6bJttpwGDL1IgYBwaOohUIKZqVDgj6/2AGr2icZDXlZtct17x8=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.32,REQID:8fba2d4c-d28b-4317-b8b0-bc8cbfaff332,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:5f78ec9,CLOUDID:96e90fc0-14cc-44ca-b657-2d2783296e72,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: f6d15b5a6d6f11ee8051498923ad61e6-20231018 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1457805539; Wed, 18 Oct 2023 12:36:54 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 18 Oct 2023 12:36:53 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 18 Oct 2023 12:36:53 +0800 From: Hsiao Chien Sung To: AngeloGioacchino Del Regno , CK Hu , Krzysztof Kozlowski , Matthias Brugger , Rob Herring CC: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Fei Shao , Sean Paul , Johnson Wang , "Nancy . Lin" , Moudy Ho , Hsiao Chien Sung , "Jason-JH . Lin" , Nathan Lu , , , , , Subject: [PATCH v9 11/23] drm/mediatek: Rename OVL_ADAPTOR_TYPE_RDMA Date: Wed, 18 Oct 2023 12:36:38 +0800 Message-ID: <20231018043650.22532-12-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231018043650.22532-1-shawn.sung@mediatek.com> References: <20231018043650.22532-1-shawn.sung@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Rename OVL_ADAPTOR_TYPE_RDMA to OVL_ADAPTOR_TYPE_MDP_RDMA to align the naming rule of mtk_ovl_adaptor_comp_id. Reviewed-by: CK Hu Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Hsiao Chien Sung --- .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 22 +++++++++---------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c b/drivers/gpu/= drm/mediatek/mtk_disp_ovl_adaptor.c index f2f6a5c01a6d..33b0f74937a2 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c @@ -26,7 +26,7 @@ #define MTK_OVL_ADAPTOR_LAYER_NUM 4 =20 enum mtk_ovl_adaptor_comp_type { - OVL_ADAPTOR_TYPE_RDMA =3D 0, + OVL_ADAPTOR_TYPE_MDP_RDMA =3D 0, OVL_ADAPTOR_TYPE_MERGE, OVL_ADAPTOR_TYPE_ETHDR, OVL_ADAPTOR_TYPE_NUM, @@ -61,20 +61,20 @@ struct mtk_disp_ovl_adaptor { }; =20 static const char * const private_comp_stem[OVL_ADAPTOR_TYPE_NUM] =3D { - [OVL_ADAPTOR_TYPE_RDMA] =3D "vdo1-rdma", + [OVL_ADAPTOR_TYPE_MDP_RDMA] =3D "vdo1-rdma", [OVL_ADAPTOR_TYPE_MERGE] =3D "merge", [OVL_ADAPTOR_TYPE_ETHDR] =3D "ethdr", }; =20 static const struct ovl_adaptor_comp_match comp_matches[OVL_ADAPTOR_ID_MAX= ] =3D { - [OVL_ADAPTOR_MDP_RDMA0] =3D { OVL_ADAPTOR_TYPE_RDMA, 0 }, - [OVL_ADAPTOR_MDP_RDMA1] =3D { OVL_ADAPTOR_TYPE_RDMA, 1 }, - [OVL_ADAPTOR_MDP_RDMA2] =3D { OVL_ADAPTOR_TYPE_RDMA, 2 }, - [OVL_ADAPTOR_MDP_RDMA3] =3D { OVL_ADAPTOR_TYPE_RDMA, 3 }, - [OVL_ADAPTOR_MDP_RDMA4] =3D { OVL_ADAPTOR_TYPE_RDMA, 4 }, - [OVL_ADAPTOR_MDP_RDMA5] =3D { OVL_ADAPTOR_TYPE_RDMA, 5 }, - [OVL_ADAPTOR_MDP_RDMA6] =3D { OVL_ADAPTOR_TYPE_RDMA, 6 }, - [OVL_ADAPTOR_MDP_RDMA7] =3D { OVL_ADAPTOR_TYPE_RDMA, 7 }, + [OVL_ADAPTOR_MDP_RDMA0] =3D { OVL_ADAPTOR_TYPE_MDP_RDMA, 0 }, + [OVL_ADAPTOR_MDP_RDMA1] =3D { OVL_ADAPTOR_TYPE_MDP_RDMA, 1 }, + [OVL_ADAPTOR_MDP_RDMA2] =3D { OVL_ADAPTOR_TYPE_MDP_RDMA, 2 }, + [OVL_ADAPTOR_MDP_RDMA3] =3D { OVL_ADAPTOR_TYPE_MDP_RDMA, 3 }, + [OVL_ADAPTOR_MDP_RDMA4] =3D { OVL_ADAPTOR_TYPE_MDP_RDMA, 4 }, + [OVL_ADAPTOR_MDP_RDMA5] =3D { OVL_ADAPTOR_TYPE_MDP_RDMA, 5 }, + [OVL_ADAPTOR_MDP_RDMA6] =3D { OVL_ADAPTOR_TYPE_MDP_RDMA, 6 }, + [OVL_ADAPTOR_MDP_RDMA7] =3D { OVL_ADAPTOR_TYPE_MDP_RDMA, 7 }, [OVL_ADAPTOR_MERGE0] =3D { OVL_ADAPTOR_TYPE_MERGE, 1 }, [OVL_ADAPTOR_MERGE1] =3D { OVL_ADAPTOR_TYPE_MERGE, 2 }, [OVL_ADAPTOR_MERGE2] =3D { OVL_ADAPTOR_TYPE_MERGE, 3 }, @@ -387,7 +387,7 @@ static int ovl_adaptor_comp_get_id(struct device *dev, = struct device_node *node, static const struct of_device_id mtk_ovl_adaptor_comp_dt_ids[] =3D { { .compatible =3D "mediatek,mt8195-vdo1-rdma", - .data =3D (void *)OVL_ADAPTOR_TYPE_RDMA, + .data =3D (void *)OVL_ADAPTOR_TYPE_MDP_RDMA, }, { .compatible =3D "mediatek,mt8195-disp-merge", .data =3D (void *)OVL_ADAPTOR_TYPE_MERGE, --=20 2.18.0