From nobody Fri Sep 20 11:46:22 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6BCFFCDB482 for ; Tue, 17 Oct 2023 06:47:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234574AbjJQGrg (ORCPT ); Tue, 17 Oct 2023 02:47:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234503AbjJQGrd (ORCPT ); Tue, 17 Oct 2023 02:47:33 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E9CA8AB; Mon, 16 Oct 2023 23:47:30 -0700 (PDT) X-UUID: 04bdffe66cb911eea33bb35ae8d461a2-20231017 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=qLWx+HZRKPvH3+Dk9QJq2Dd9wV6RcWPjJPAYx49RqJs=; b=IH+6i2lCE5TOj0N1rrkvk2tKLtdQxIQYE1OhNZevmL9bzy7A3NHJzqmYgkZCCyJH29FQyleoau/3Fqy63YHXwWiictz+JtpbBVLtuf7Sfh4YoXpJt1fQMVaaXKi8p8gdNRWOHawlr8w6A4ZuxhBgLS/DGmJ23Dg2nh/WwrnHdes=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.32,REQID:baa8c79c-c81e-466d-a560-01034f1a537c,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:5f78ec9,CLOUDID:ddb905c0-14cc-44ca-b657-2d2783296e72,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 04bdffe66cb911eea33bb35ae8d461a2-20231017 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 904257753; Tue, 17 Oct 2023 14:47:19 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Tue, 17 Oct 2023 14:47:18 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Tue, 17 Oct 2023 14:47:18 +0800 From: Hsiao Chien Sung To: AngeloGioacchino Del Regno , Chun-Kuang Hu , Krzysztof Kozlowski , Matthias Brugger CC: Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , Chen-Yu Tsai , Sean Paul , , , , , , Singo Chang , Nancy Lin , Jason-JH Lin , Hsiao Chien Sung Subject: [PATCH v3 04/11] drm/mediatek: Add OVL compatible name for MT8195 Date: Tue, 17 Oct 2023 14:47:10 +0800 Message-ID: <20231017064717.21616-5-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231017064717.21616-1-shawn.sung@mediatek.com> References: <20231017064717.21616-1-shawn.sung@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add OVL compatible name for MT8195. Without this commit, DRM won't work after modifying the device tree. Reviewed-by: CK Hu Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/media= tek/mtk_drm_drv.c index eecfeb8fbde1..5d551bff6b3f 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -767,6 +767,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = =3D { .data =3D (void *)MTK_DISP_OVL }, { .compatible =3D "mediatek,mt8192-disp-ovl", .data =3D (void *)MTK_DISP_OVL }, + { .compatible =3D "mediatek,mt8195-disp-ovl", + .data =3D (void *)MTK_DISP_OVL }, { .compatible =3D "mediatek,mt8183-disp-ovl-2l", .data =3D (void *)MTK_DISP_OVL_2L }, { .compatible =3D "mediatek,mt8192-disp-ovl-2l", --=20 2.18.0