From nobody Fri Sep 20 11:36:21 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F06CCDB474 for ; Mon, 16 Oct 2023 10:40:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233118AbjJPKkq (ORCPT ); Mon, 16 Oct 2023 06:40:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39616 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232488AbjJPKk1 (ORCPT ); Mon, 16 Oct 2023 06:40:27 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84E51F2; Mon, 16 Oct 2023 03:40:25 -0700 (PDT) X-UUID: 654d40466c1011eea33bb35ae8d461a2-20231016 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=1T2ZZGxYoDo0skQPzUUYzSsOLncPO5/BwFGBMg3tF7I=; b=N9VGw99uLJ7p9Lw2IQ6X/upcm5y/UhjOAKzd6cdIMiJl5jRRfMF8NTAXZeXkuNKYBWnEmgtlea8rkHap1lWOT0HKP4cWJwjWQpqbC1Y/4/0nT7+xswLagOU+Pj3l43bOipcRaDHEfZQrrTrbx2U5m0ri9QWCsN4OoPWxO/PR1dI=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.32,REQID:63e5e25d-48bc-4224-b517-bd377def10ad,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:5f78ec9,CLOUDID:9790fcbf-14cc-44ca-b657-2d2783296e72,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 654d40466c1011eea33bb35ae8d461a2-20231016 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1968104092; Mon, 16 Oct 2023 18:40:16 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by MTKMBS14N2.mediatek.inc (172.21.101.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Mon, 16 Oct 2023 18:40:16 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Mon, 16 Oct 2023 18:40:16 +0800 From: Hsiao Chien Sung To: AngeloGioacchino Del Regno , "CK Hu" , Krzysztof Kozlowski , Matthias Brugger , Rob Herring CC: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Fei Shao , Sean Paul , Johnson Wang , "Nancy . Lin" , Moudy Ho , "Jason-JH . Lin" , Nathan Lu , "Hsiao Chien Sung" , Yongqiang Niu , Hans Verkuil , Mauro Carvalho Chehab , , , , , Subject: [PATCH v8 19/23] drm/mediatek: Return error if MDP RDMA failed to enable the clock Date: Mon, 16 Oct 2023 18:40:06 +0800 Message-ID: <20231016104010.3270-20-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231016104010.3270-1-shawn.sung@mediatek.com> References: <20231016104010.3270-1-shawn.sung@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--3.221500-8.000000 X-TMASE-MatchedRID: dXJslEWlJ68PRVepDWIjx2NW0DAjL5p+3zhylsE9dszYgrGDwuFJdtn7 b/+Y15IvKUwQqjfwoPuAUraeY8ICeR8TzIzimOwPlpYqKNmWxsHZs3HUcS/scCq2rl3dzGQ1/H1 dadJVZy/8vGQo9zWtvf+wINlsxcSnsHOccarS+IiCFqMYeRA+lHYAcr2GpQ6j91AOZ36FlKnMmO 0+PXlwBQ7/bbsLEWJmoMTjAuvi5nx0BNB20+SxH7f8mJY57oZddJaBDYald1mHO0tVYDV4T0MMp rcbiest X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--3.221500-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: DEC613EE256FE9D9547B636DA9521958DCE757224B55A4B902F3013EC834AFEB2000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Return the result of clk_prepare_enable() instead of always returns 0. Fixes: f8946e2b6bb2 ("drm/mediatek: Add display MDP RDMA support for MT8195= ") Reviewed-by: CK Hu Signed-off-by: Hsiao Chien Sung Reviewed-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c b/drivers/gpu/drm/medi= atek/mtk_mdp_rdma.c index 5746f06220c1..cb36a961786f 100644 --- a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c +++ b/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c @@ -247,8 +247,7 @@ int mtk_mdp_rdma_clk_enable(struct device *dev) { struct mtk_mdp_rdma *rdma =3D dev_get_drvdata(dev); =20 - clk_prepare_enable(rdma->clk); - return 0; + return clk_prepare_enable(rdma->clk); } =20 void mtk_mdp_rdma_clk_disable(struct device *dev) --=20 2.18.0