From nobody Thu Dec 18 14:19:10 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7D01CDB47E for ; Fri, 13 Oct 2023 11:50:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231748AbjJMLuC (ORCPT ); Fri, 13 Oct 2023 07:50:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47582 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231629AbjJMLtc (ORCPT ); Fri, 13 Oct 2023 07:49:32 -0400 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DC94710E for ; Fri, 13 Oct 2023 04:49:07 -0700 (PDT) Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-32003aae100so2091150f8f.0 for ; Fri, 13 Oct 2023 04:49:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20230601.gappssmtp.com; s=20230601; t=1697197746; x=1697802546; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rSmiR16212pc1VuL7g+w/nUHGx3yHes8fhbAMyz9G7w=; b=DS4jCROk5YzwfOcKcfMmiuDtQ5t72bJvlGesEsxaYs0TQUl95MD/f2xMK5njUkREG6 6CW3Bw165bgKN/yOwigXMq2/h63NuBkhW37x7sx1MlStYt1OsUvdO37qiJ4zQdjFGrj5 s1lCpqqJe/y+P31A6a6RwafmdwdRGYhEjhJXV60RrC9YwxCZIY8wNrmQuIUiO2l1ZZ7S ftlzynj3vjnlIBsWjgN3Fedpnm4PNIPXp9e93DmZr+VtFTU8ysY7M9oUsUo+6F7xsMpR /02NMPM6qk7J38IZLxp7mruPaQoV5Rq83hp7VdXEEJz19ttWq91cWXrj6hcAqMuJNFqq RLUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697197746; x=1697802546; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rSmiR16212pc1VuL7g+w/nUHGx3yHes8fhbAMyz9G7w=; b=GWB90F6cer7ns/VoRt1I07+P2vPwgIpPHH7MxLqV4lvOuTjFnp1w79/6P20Rzwhh3N MzwlukqjnGc4mkrpAK3OESbc/N1p0i/ly46gy0/Oil546FDCBawUbalOXJyuw3Kr5h6K az2pduJ//HxPs0gUeu5sWz2U7/Tm3bNg4/HLbLsmjbknbY4r8w8z4CDFi/7QxW7dE7aK qmSyMmRIQf8SCH2SMmm8fJua4nfA6gjUexYBD0gr4xJDzXqy7MwnUY/f7AGtJvYMaUNa cOhZR0SQVUt4J7UArbBqHJlS/yayrm4qFFNxqrLhej+wXuLQJWmCmB26sVckdKRgA0Gk GPag== X-Gm-Message-State: AOJu0YzNvSqxTB0Ne5sCPJeF+SYnzgpcdNEaKAsX78+pArI7+jw0+F6t bFHDcHizYbr5Cg+TYqack8/8kA== X-Google-Smtp-Source: AGHT+IHw6L7hoq85hHTB9s+d4IbMElrOT24rixghAHk3Qto6JWh/PmpQqL5ZjyA49IDvCLwzEk1Hrw== X-Received: by 2002:a05:6000:1c6:b0:320:67:1887 with SMTP id t6-20020a05600001c600b0032000671887mr19763738wrx.28.1697197746239; Fri, 13 Oct 2023 04:49:06 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:4209:13a:988d:80be]) by smtp.gmail.com with ESMTPSA id j23-20020a05600c1c1700b00407754b998dsm974509wms.27.2023.10.13.04.49.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Oct 2023 04:49:05 -0700 (PDT) From: Bartosz Golaszewski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Elliot Berman , Krzysztof Kozlowski , Guru Das Srinagesh , Andrew Halaney , Maximilian Luz , Alex Elder , Srini Kandagatla Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@quicinc.com, Bartosz Golaszewski Subject: [PATCH v4 13/15] firmware: qcom: tzmem: enable SHM Bridge support Date: Fri, 13 Oct 2023 13:48:41 +0200 Message-Id: <20231013114843.63205-14-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231013114843.63205-1-brgl@bgdev.pl> References: <20231013114843.63205-1-brgl@bgdev.pl> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski Add a new Kconfig option for selecting the SHM Bridge mode of operation for the TrustZone memory allocator. If enabled at build-time, it will still be checked for availability at run-time. If the architecture doesn't support SHM Bridge, the allocator will work just like in the default mode. Signed-off-by: Bartosz Golaszewski --- drivers/firmware/qcom/Kconfig | 10 +++++ drivers/firmware/qcom/qcom_tzmem.c | 65 +++++++++++++++++++++++++++++- 2 files changed, 74 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/qcom/Kconfig b/drivers/firmware/qcom/Kconfig index 237da40de832..e01407e31ae4 100644 --- a/drivers/firmware/qcom/Kconfig +++ b/drivers/firmware/qcom/Kconfig @@ -27,6 +27,16 @@ config QCOM_TZMEM_MODE_DEFAULT Use the default allocator mode. The memory is page-aligned, non-cachable and contiguous. =20 +config QCOM_TZMEM_MODE_SHMBRIDGE + bool "SHM Bridge" + help + Use Qualcomm Shared Memory Bridge. The memory has the same alignment as + in the 'Default' allocator but is also explicitly marked as an SHM Brid= ge + buffer. + + With this selected, all buffers passed to the TrustZone must be allocat= ed + using the TZMem allocator or else the TrustZone will refuse to use them. + endchoice =20 config QCOM_SCM_DOWNLOAD_MODE_DEFAULT diff --git a/drivers/firmware/qcom/qcom_tzmem.c b/drivers/firmware/qcom/qco= m_tzmem.c index 68ca59c5598e..6c4f29a00f26 100644 --- a/drivers/firmware/qcom/qcom_tzmem.c +++ b/drivers/firmware/qcom/qcom_tzmem.c @@ -55,7 +55,70 @@ static void qcom_tzmem_cleanup_pool(struct qcom_tzmem_po= ol *pool) =20 } =20 -#endif /* CONFIG_QCOM_TZMEM_MODE_DEFAULT */ +#elif IS_ENABLED(CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE) + +#include + +#define QCOM_SHM_BRIDGE_NUM_VM_SHIFT 9 + +static bool qcom_tzmem_using_shm_bridge; + +static int qcom_tzmem_init(void) +{ + int ret; + + ret =3D qcom_scm_shm_bridge_enable(); + if (ret =3D=3D -EOPNOTSUPP) { + dev_info(qcom_tzmem_dev, "SHM Bridge not supported\n"); + ret =3D 0; + } + + if (!ret) + qcom_tzmem_using_shm_bridge =3D true; + + return ret; +} + +static int qcom_tzmem_init_pool(struct qcom_tzmem_pool *pool) +{ + u64 pfn_and_ns_perm, ipfn_and_s_perm, size_and_flags, ns_perms; + int ret; + + if (!qcom_tzmem_using_shm_bridge) + return 0; + + ns_perms =3D (QCOM_SCM_PERM_WRITE | QCOM_SCM_PERM_READ); + pfn_and_ns_perm =3D (u64)pool->pbase | ns_perms; + ipfn_and_s_perm =3D (u64)pool->pbase | ns_perms; + size_and_flags =3D pool->size | (1 << QCOM_SHM_BRIDGE_NUM_VM_SHIFT); + + u64 *handle __free(kfree) =3D kzalloc(sizeof(*handle), GFP_KERNEL); + if (!handle) + return -ENOMEM; + + ret =3D qcom_scm_shm_bridge_create(qcom_tzmem_dev, pfn_and_ns_perm, + ipfn_and_s_perm, size_and_flags, + QCOM_SCM_VMID_HLOS, handle); + if (ret) + return ret; + + pool->priv =3D no_free_ptr(handle); + + return 0; +} + +static void qcom_tzmem_cleanup_pool(struct qcom_tzmem_pool *pool) +{ + u64 *handle =3D pool->priv; + + if (!qcom_tzmem_using_shm_bridge) + return; + + qcom_scm_shm_bridge_delete(qcom_tzmem_dev, *handle); + kfree(handle); +} + +#endif /* CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE */ =20 /** * qcom_tzmem_pool_new() - Create a new TZ memory pool. --=20 2.39.2