From nobody Tue Jan 6 22:21:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E9E2CD98C7 for ; Wed, 11 Oct 2023 06:52:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344816AbjJKGwD (ORCPT ); Wed, 11 Oct 2023 02:52:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57072 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345846AbjJKGvq (ORCPT ); Wed, 11 Oct 2023 02:51:46 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36564B8 for ; Tue, 10 Oct 2023 23:51:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697007105; x=1728543105; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ijzp8wKJf99JdRnP3ccZa4YN2tbg7sgw5v2etLG+4Vc=; b=N6MhBDJkvWiybhWcDg15SKQFJ+3Hico6RhaHCHROzU/30mNGr9zYI4pT ae95N96Z/jt7nsZWyi8BkRnZEpt+9Yry4ok5XCjNrmlA2p66hABKgqDVS M5tc+ar9cbUzXRkeGjelIf3oiMp1Qb3szq+xX+aqF1PCOYytFubce1NFU KqXCh8IwEutWhT1XkDT3xA3DKs7Q1Rbt4rc+Y2IbadgvLIv0lR5xNq9HQ viqlblBpMcHiHImnBEfbeQdBzPm6GSxDOJNWU5aER078XqB1tg6quUzqM f4ua+wRH8HX9O0443XsoOS//6p8cYlwQIrGb2qSttX8Nqsq8An2NX8FH6 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10859"; a="387436960" X-IronPort-AV: E=Sophos;i="6.03,214,1694761200"; d="scan'208";a="387436960" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Oct 2023 23:51:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10859"; a="824050245" X-IronPort-AV: E=Sophos;i="6.03,214,1694761200"; d="scan'208";a="824050245" Received: from sqa-gate.sh.intel.com (HELO spr-2s5.tsp.org) ([10.239.48.212]) by fmsmga004.fm.intel.com with ESMTP; 10 Oct 2023 23:51:41 -0700 From: Tina Zhang To: Jason Gunthorpe , Kevin Tian , Lu Baolu Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Tina Zhang , Jason Gunthorpe Subject: [v6 PATCH 2/5] iommu: Add mm_get_enqcmd_pasid() helper function Date: Wed, 11 Oct 2023 14:51:29 +0800 Message-Id: <20231011065132.102676-3-tina.zhang@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20231011065132.102676-1-tina.zhang@intel.com> References: <20231011065132.102676-1-tina.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" mm_get_enqcmd_pasid() is for getting enqcmd pasid value. The motivation is to replace mm->pasid with an iommu private data structure that is introduced in a later patch. Reviewed-by: Lu Baolu Reviewed-by: Jason Gunthorpe Signed-off-by: Tina Zhang --- Changes in v6: - Let SMMUv3 call mm_get_enqcmd_pasid(). - Let iommu_sva_get_pasid() call mm_get_enqcmd_pasid(). Change in v2: - Change mm_get_pasid() to mm_get_enqcmd_pasid() arch/x86/kernel/traps.c | 2 +- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 12 ++++++------ drivers/iommu/iommu-sva.c | 2 +- include/linux/iommu.h | 8 ++++++++ 4 files changed, 16 insertions(+), 8 deletions(-) diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index c876f1d36a81..832f4413d96a 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -591,7 +591,7 @@ static bool try_fixup_enqcmd_gp(void) if (!mm_valid_pasid(current->mm)) return false; =20 - pasid =3D current->mm->pasid; + pasid =3D mm_get_enqcmd_pasid(current->mm); =20 /* * Did this thread already have its PASID activated? diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iomm= u/arm/arm-smmu-v3/arm-smmu-v3-sva.c index 8a16cd3ef487..49aaa7262ea1 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -229,7 +229,7 @@ static void arm_smmu_mm_arch_invalidate_secondary_tlbs(= struct mmu_notifier *mn, smmu_domain); } =20 - arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, start, size); + arm_smmu_atc_inv_domain(smmu_domain, mm_get_enqcmd_pasid(mm), start, size= ); } =20 static void arm_smmu_mm_release(struct mmu_notifier *mn, struct mm_struct = *mm) @@ -247,10 +247,10 @@ static void arm_smmu_mm_release(struct mmu_notifier *= mn, struct mm_struct *mm) * DMA may still be running. Keep the cd valid to avoid C_BAD_CD events, * but disable translation. */ - arm_smmu_write_ctx_desc(smmu_domain, mm->pasid, &quiet_cd); + arm_smmu_write_ctx_desc(smmu_domain, mm_get_enqcmd_pasid(mm), &quiet_cd); =20 arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_mn->cd->asid); - arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, 0, 0); + arm_smmu_atc_inv_domain(smmu_domain, mm_get_enqcmd_pasid(mm), 0, 0); =20 smmu_mn->cleared =3D true; mutex_unlock(&sva_lock); @@ -304,7 +304,7 @@ arm_smmu_mmu_notifier_get(struct arm_smmu_domain *smmu_= domain, goto err_free_cd; } =20 - ret =3D arm_smmu_write_ctx_desc(smmu_domain, mm->pasid, cd); + ret =3D arm_smmu_write_ctx_desc(smmu_domain, mm_get_enqcmd_pasid(mm), cd); if (ret) goto err_put_notifier; =20 @@ -329,7 +329,7 @@ static void arm_smmu_mmu_notifier_put(struct arm_smmu_m= mu_notifier *smmu_mn) return; =20 list_del(&smmu_mn->list); - arm_smmu_write_ctx_desc(smmu_domain, mm->pasid, NULL); + arm_smmu_write_ctx_desc(smmu_domain, mm_get_enqcmd_pasid(mm), NULL); =20 /* * If we went through clear(), we've already invalidated, and no @@ -337,7 +337,7 @@ static void arm_smmu_mmu_notifier_put(struct arm_smmu_m= mu_notifier *smmu_mn) */ if (!smmu_mn->cleared) { arm_smmu_tlb_inv_asid(smmu_domain->smmu, cd->asid); - arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, 0, 0); + arm_smmu_atc_inv_domain(smmu_domain, mm_get_enqcmd_pasid(mm), 0, 0); } =20 /* Frees smmu_mn */ diff --git a/drivers/iommu/iommu-sva.c b/drivers/iommu/iommu-sva.c index b78671a8a914..4a2f5699747f 100644 --- a/drivers/iommu/iommu-sva.c +++ b/drivers/iommu/iommu-sva.c @@ -141,7 +141,7 @@ u32 iommu_sva_get_pasid(struct iommu_sva *handle) { struct iommu_domain *domain =3D handle->domain; =20 - return domain->mm->pasid; + return mm_get_enqcmd_pasid(domain->mm); } EXPORT_SYMBOL_GPL(iommu_sva_get_pasid); =20 diff --git a/include/linux/iommu.h b/include/linux/iommu.h index c50a769d569a..a4eab6697fe1 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -1189,6 +1189,10 @@ static inline bool mm_valid_pasid(struct mm_struct *= mm) { return mm->pasid !=3D IOMMU_PASID_INVALID; } +static inline u32 mm_get_enqcmd_pasid(struct mm_struct *mm) +{ + return mm->pasid; +} void mm_pasid_drop(struct mm_struct *mm); struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm); @@ -1211,6 +1215,10 @@ static inline u32 iommu_sva_get_pasid(struct iommu_s= va *handle) } static inline void mm_pasid_init(struct mm_struct *mm) {} static inline bool mm_valid_pasid(struct mm_struct *mm) { return false; } +static inline u32 mm_get_enqcmd_pasid(struct mm_struct *mm) +{ + return IOMMU_PASID_INVALID; +} static inline void mm_pasid_drop(struct mm_struct *mm) {} #endif /* CONFIG_IOMMU_SVA */ =20 --=20 2.39.3