From nobody Fri Jan 2 17:09:51 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1DE3FCD80A3 for ; Tue, 10 Oct 2023 11:17:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231337AbjJJLRt (ORCPT ); Tue, 10 Oct 2023 07:17:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52040 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231299AbjJJLRn (ORCPT ); Tue, 10 Oct 2023 07:17:43 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E918994; Tue, 10 Oct 2023 04:17:39 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 39ABHSWe010309; Tue, 10 Oct 2023 06:17:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1696936648; bh=DSamjwKreojvNFwZjOJNxZiEHv66Bu1bp5SDsm+2lQw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yiL+PXDA4ruJ20wLsQWdxqQhf8mh4u7r/rXMobmTidMql2M9LaNsQi9zywqmli+/9 63Jdsws4YJQ9zZ574FEqMEaCOPZ4HodoO5CcEgGZCeLef+sxEF+dati9G4+4RGRwdC dNriC+ImEIg2Efr1fepf1b+hjNrnN6OH08YqYQo4= Received: from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 39ABHSxq086174 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 10 Oct 2023 06:17:28 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 10 Oct 2023 06:17:28 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 10 Oct 2023 06:17:28 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 39ABHRiX122855; Tue, 10 Oct 2023 06:17:27 -0500 From: Vaishnav Achath To: , , , , , , CC: , , , , Subject: [PATCH v2 2/2] arm64: dts: ti: k3-j784s4-main: Add BCDMA instance for CSI2RX Date: Tue, 10 Oct 2023 16:47:23 +0530 Message-ID: <20231010111723.17524-3-vaishnav.a@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231010111723.17524-1-vaishnav.a@ti.com> References: <20231010111723.17524-1-vaishnav.a@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" J784S4 has a dedicated BCDMA controller for the Camera Serial Interface. Events from the BCDMA controller instance are routed through the main UDMA interrupt aggregator as unmapped events. Add the node for the DMA controller and keep it disabled by default. See J784S4 Technical Reference Manual (SPRUJ52) for further details: http://www.ti.com/lit/zip/spruj52 Signed-off-by: Vaishnav Achath Reviewed-by: Jayesh Choudhary --- V1->V2: * Fix indentation for the reg entries. arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/d= ts/ti/k3-j784s4-main.dtsi index efed2d683f63..3123413e2140 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -703,6 +703,7 @@ ti,sci =3D <&sms>; ti,sci-dev-id =3D <321>; ti,interrupt-ranges =3D <0 0 256>; + ti,unmapped-event-sources =3D <&main_bcdma_csi>; }; =20 secure_proxy_main: mailbox@32c00000 { @@ -1000,6 +1001,22 @@ ti,sci-rm-range-rflow =3D <0x00>; /* GP RFLOW */ }; =20 + main_bcdma_csi: dma-controller@311a0000 { + compatible =3D "ti,j721s2-dmss-bcdma-csi"; + reg =3D <0x00 0x311a0000 0x00 0x100>, + <0x00 0x35d00000 0x00 0x20000>, + <0x00 0x35c00000 0x00 0x10000>, + <0x00 0x35e00000 0x00 0x80000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", "ringrt"; + msi-parent =3D <&main_udmass_inta>; + #dma-cells =3D <3>; + ti,sci =3D <&sms>; + ti,sci-dev-id =3D <281>; + ti,sci-rm-range-rchan =3D <0x21>; + ti,sci-rm-range-tchan =3D <0x22>; + status =3D "disabled"; + }; + cpts@310d0000 { compatible =3D "ti,j721e-cpts"; reg =3D <0x00 0x310d0000 0x00 0x400>; --=20 2.17.1