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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:05 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 01/17] staging: iio: resolver: ad2s1210: do not use fault register for dummy read Date: Thu, 5 Oct 2023 19:50:18 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-1-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When reading registers on the AD2S1210 chip, we have to supply a "dummy" address for the second SPI tx byte so that we don't accidentally write to a register. This register will be read and the value discarded on the next regmap read or write call. Reading the fault register has a side-effect of clearing the faults so we should not use this register for the dummy read. Signed-off-by: David Lechner --- v4 changes: New patch (this probably should have been done before "staging: iio: resolver: ad2s1210: use regmap for config registers" but was overlooked until now) drivers/staging/iio/resolver/ad2s1210.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 67d8af0dd7ae..8fbde9517fe9 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -166,9 +166,10 @@ static int ad2s1210_regmap_reg_read(void *context, uns= igned int reg, st->tx[0] =3D reg; /* * Must be valid register address here otherwise this could write data. - * It doesn't matter which one. + * It doesn't matter which one as long as reading doesn't have side- + * effects. */ - st->tx[1] =3D AD2S1210_REG_FAULT; + st->tx[1] =3D AD2S1210_REG_CONTROL; =20 ret =3D spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers)); if (ret < 0) --=20 2.42.0 From nobody Sat Jan 3 02:07:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F81AE92FD1 for ; Fri, 6 Oct 2023 00:51:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229709AbjJFAvR (ORCPT ); Thu, 5 Oct 2023 20:51:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55492 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229590AbjJFAvJ (ORCPT ); Thu, 5 Oct 2023 20:51:09 -0400 Received: from mail-oa1-x36.google.com (mail-oa1-x36.google.com [IPv6:2001:4860:4864:20::36]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7093DD6 for ; Thu, 5 Oct 2023 17:51:07 -0700 (PDT) Received: by mail-oa1-x36.google.com with SMTP id 586e51a60fabf-1e5602c12e5so800810fac.3 for ; Thu, 05 Oct 2023 17:51:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1696553466; x=1697158266; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+qps0yZuxIdvWJ2ZIT7jrzjOXstZNZBL41ajnUJMVQA=; b=qXy/VMjzHFE3uy+FEY/ywi6B/DmZsPdzKB77BQxYwsD7O5lX5A6rKwujWuZYTr3r6w S8tYAhzYClVxTUL4a8tJjb79qbeA1uOum+DlEt0R4nWy1I8IafcnKCTxOseeg1so2+W/ s4VMjghp0AcCqTEDbpBTNPGcKRR0RoMYUy6RrPnUP8XADMr2tFx7ZklLCXdnwFkMqKwZ ArNvRTbgnU8TN22y6u/1dW+cRLNIkWETgStr1Ymb5GWiTkPpVC3UCLy4qdAiIA/nj0ef 3B9Wjur9kASTaQ9wszeJrmyMCdMehGayJhCEvmsedPac3ulSbtRPT/wOuN8CYkonpVga jxWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696553466; x=1697158266; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+qps0yZuxIdvWJ2ZIT7jrzjOXstZNZBL41ajnUJMVQA=; b=XdS2TnMshjBIn+Z5z5ALDNAoYkHDymbXaj2ALxVWMH5BeylF5YKC7BMgiEvPHnoRzF N3iEEFAOIAm/7jLBXsjd1AiwJn4vdr3LNY+hbg3ToBKa5BhopPgeEhWIlSK2dxpiCcn3 jRTUA7gIsuTr3Ac3CEPA/jcJ8cuwsbEVB+M5QbX4QDtdIgY32nXpi2nyzD2urxJLJKU6 5DxNoBTn3jtaPKmDZYDyXFIlR+kssOiMVF7RByLM6mHPqBYzAGsLkKJwsaPmEWcaVQCe +QOTpi9es7iT4+XCeUXtDDze9tKxpoo4px/tX27kDGW0FQTZNbj6Ci5RufjcVDLAAq1U Xqyg== X-Gm-Message-State: AOJu0Yz6I3DXR2uGrw/akR72IR9bYerYd4k0qSk5B6Alw2rXA8gOQeBe 29ZezGmNO3Vk71Rx19ugzyu1Dg== X-Google-Smtp-Source: AGHT+IG4I5ztMPys5r+CrTX2pZbWsep+z3Uons59yy9bAFOoVvI35cwLsgW+nO6BlaxHEsiQYhI2uQ== X-Received: by 2002:a05:6871:592:b0:1d5:5659:4730 with SMTP id u18-20020a056871059200b001d556594730mr8210621oan.37.1696553466751; Thu, 05 Oct 2023 17:51:06 -0700 (PDT) Received: from freyr.lechnology.com (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:06 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 02/17] staging: iio: resolver: ad2s1210: implement hysteresis as channel attr Date: Thu, 5 Oct 2023 19:50:19 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-2-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The AD2S1210 resolver has a hysteresis feature that can be used to prevent flicker in the LSB of the position register. This can be either enabled or disabled. Disabling hysteresis is useful for increasing precision by oversampling. Signed-off-by: David Lechner --- v4 changes: * Fixed hysteresis raw values when st->resolution !=3D 16. v3 changes: * Refactored into more functions to reduce complexity of switch statements. * Use early return instead of break in switch statements. drivers/staging/iio/resolver/ad2s1210.c | 91 +++++++++++++++++++++++++++++= ++-- 1 file changed, 88 insertions(+), 3 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 8fbde9517fe9..af063eb25e9c 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -76,7 +76,8 @@ struct ad2s1210_state { struct regmap *regmap; /** The external oscillator frequency in Hz. */ unsigned long clkin_hz; - bool hysteresis; + /** Available raw hysteresis values based on resolution. */ + int hysteresis_available[2]; u8 resolution; /** For reading raw sample value via SPI. */ __be16 sample __aligned(IIO_DMA_MINALIGN); @@ -311,6 +312,7 @@ static ssize_t ad2s1210_store_resolution(struct device = *dev, goto error_ret; =20 st->resolution =3D udata; + st->hysteresis_available[1] =3D 1 << (16 - st->resolution); ret =3D len; =20 error_ret: @@ -447,6 +449,35 @@ static int ad2s1210_single_conversion(struct ad2s1210_= state *st, return ret; } =20 +static int ad2s1210_get_hysteresis(struct ad2s1210_state *st, int *val) +{ + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_test_bits(st->regmap, AD2S1210_REG_CONTROL, + AD2S1210_ENABLE_HYSTERESIS); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + *val =3D ret << (16 - st->resolution); + return IIO_VAL_INT; +} + +static int ad2s1210_set_hysteresis(struct ad2s1210_state *st, int val) +{ + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL, + AD2S1210_ENABLE_HYSTERESIS, + val ? AD2S1210_ENABLE_HYSTERESIS : 0); + mutex_unlock(&st->lock); + + return ret; +} + static const int ad2s1210_velocity_scale[] =3D { 17089132, /* 8.192MHz / (2*pi * 2500 / 2^15) */ 42722830, /* 8.192MHz / (2*pi * 1000 / 2^15) */ @@ -479,7 +510,55 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev, default: return -EINVAL; } + case IIO_CHAN_INFO_HYSTERESIS: + switch (chan->type) { + case IIO_ANGL: + return ad2s1210_get_hysteresis(st, val); + default: + return -EINVAL; + } + default: + return -EINVAL; + } +} + +static int ad2s1210_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, + int *length, long mask) +{ + struct ad2s1210_state *st =3D iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_HYSTERESIS: + switch (chan->type) { + case IIO_ANGL: + *vals =3D st->hysteresis_available; + *type =3D IIO_VAL_INT; + *length =3D ARRAY_SIZE(st->hysteresis_available); + return IIO_AVAIL_LIST; + default: + return -EINVAL; + } + default: + return -EINVAL; + } +} =20 +static int ad2s1210_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct ad2s1210_state *st =3D iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_HYSTERESIS: + switch (chan->type) { + case IIO_ANGL: + return ad2s1210_set_hysteresis(st, val); + default: + return -EINVAL; + } default: return -EINVAL; } @@ -520,7 +599,10 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { .indexed =3D 1, .channel =3D 0, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | - BIT(IIO_CHAN_INFO_SCALE), + BIT(IIO_CHAN_INFO_SCALE) | + BIT(IIO_CHAN_INFO_HYSTERESIS), + .info_mask_separate_available =3D + BIT(IIO_CHAN_INFO_HYSTERESIS), }, { .type =3D IIO_ANGL_VEL, .indexed =3D 1, @@ -596,6 +678,8 @@ static int ad2s1210_debugfs_reg_access(struct iio_dev *= indio_dev, =20 static const struct iio_info ad2s1210_info =3D { .read_raw =3D ad2s1210_read_raw, + .read_avail =3D ad2s1210_read_avail, + .write_raw =3D ad2s1210_write_raw, .attrs =3D &ad2s1210_attribute_group, .debugfs_reg_access =3D &ad2s1210_debugfs_reg_access, }; @@ -711,8 +795,9 @@ static int ad2s1210_probe(struct spi_device *spi) =20 mutex_init(&st->lock); st->sdev =3D spi; - st->hysteresis =3D true; st->resolution =3D 12; + st->hysteresis_available[0] =3D 0; + st->hysteresis_available[1] =3D 1 << (16 - st->resolution); =20 ret =3D ad2s1210_setup_clocks(st); if (ret < 0) --=20 2.42.0 From nobody Sat Jan 3 02:07:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 543B0E92FD4 for ; Fri, 6 Oct 2023 00:51:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229737AbjJFAvS (ORCPT ); Thu, 5 Oct 2023 20:51:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229607AbjJFAvL (ORCPT ); Thu, 5 Oct 2023 20:51:11 -0400 Received: from mail-oa1-x32.google.com (mail-oa1-x32.google.com [IPv6:2001:4860:4864:20::32]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E0A8ED for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:07 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 03/17] staging: iio: resolver: ad2s1210: convert fexcit to channel attribute Date: Thu, 5 Oct 2023 19:50:20 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-3-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The ad2s1210 driver has a device-specific attribute `fexcit` for setting the frequency of the excitation output. This converts it to a channel in order to use standard IIO ABI. The excitation frequency is an analog output that generates a sine wave. Only the frequency is configurable. According to the datasheet, the specified range of the excitation frequency is from 2 kHz to 20 kHz and can be set in increments of 250 Hz. Signed-off-by: David Lechner --- v4 changes: None (rebased) v3 changes: * This is a new patch in v3 instead of "iio: resolver: ad2s1210: rename fex= cit attribute" drivers/staging/iio/resolver/ad2s1210.c | 123 ++++++++++++++++++----------= ---- 1 file changed, 71 insertions(+), 52 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index af063eb25e9c..0c7772725330 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -227,54 +227,6 @@ static int ad2s1210_set_resolution_gpios(struct ad2s12= 10_state *st, bitmap); } =20 -static ssize_t ad2s1210_show_fexcit(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - unsigned int value; - u16 fexcit; - int ret; - - mutex_lock(&st->lock); - ret =3D regmap_read(st->regmap, AD2S1210_REG_EXCIT_FREQ, &value); - if (ret < 0) - goto error_ret; - - fexcit =3D value * st->clkin_hz / (1 << 15); - - ret =3D sprintf(buf, "%u\n", fexcit); - -error_ret: - mutex_unlock(&st->lock); - return ret; -} - -static ssize_t ad2s1210_store_fexcit(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t len) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - u16 fexcit; - int ret; - - ret =3D kstrtou16(buf, 10, &fexcit); - if (ret < 0 || fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) - return -EINVAL; - - mutex_lock(&st->lock); - ret =3D ad2s1210_reinit_excitation_frequency(st, fexcit); - if (ret < 0) - goto error_ret; - - ret =3D len; - -error_ret: - mutex_unlock(&st->lock); - - return ret; -} - static ssize_t ad2s1210_show_resolution(struct device *dev, struct device_attribute *attr, char *buf) @@ -478,6 +430,38 @@ static int ad2s1210_set_hysteresis(struct ad2s1210_sta= te *st, int val) return ret; } =20 +static int ad2s1210_get_excitation_frequency(struct ad2s1210_state *st, in= t *val) +{ + unsigned int reg_val; + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_read(st->regmap, AD2S1210_REG_EXCIT_FREQ, ®_val); + if (ret < 0) + goto error_ret; + + *val =3D reg_val * st->clkin_hz / (1 << 15); + ret =3D IIO_VAL_INT; + +error_ret: + mutex_unlock(&st->lock); + return ret; +} + +static int ad2s1210_set_excitation_frequency(struct ad2s1210_state *st, in= t val) +{ + int ret; + + if (val < AD2S1210_MIN_EXCIT || val > AD2S1210_MAX_EXCIT) + return -EINVAL; + + mutex_lock(&st->lock); + ret =3D ad2s1210_reinit_excitation_frequency(st, val); + mutex_unlock(&st->lock); + + return ret; +} + static const int ad2s1210_velocity_scale[] =3D { 17089132, /* 8.192MHz / (2*pi * 2500 / 2^15) */ 42722830, /* 8.192MHz / (2*pi * 1000 / 2^15) */ @@ -510,6 +494,13 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev, default: return -EINVAL; } + case IIO_CHAN_INFO_FREQUENCY: + switch (chan->type) { + case IIO_ALTVOLTAGE: + return ad2s1210_get_excitation_frequency(st, val); + default: + return -EINVAL; + } case IIO_CHAN_INFO_HYSTERESIS: switch (chan->type) { case IIO_ANGL: @@ -527,9 +518,24 @@ static int ad2s1210_read_avail(struct iio_dev *indio_d= ev, const int **vals, int *type, int *length, long mask) { + static const int excitation_frequency_available[] =3D { + AD2S1210_MIN_EXCIT, + 250, /* step */ + AD2S1210_MAX_EXCIT, + }; + struct ad2s1210_state *st =3D iio_priv(indio_dev); =20 switch (mask) { + case IIO_CHAN_INFO_FREQUENCY: + switch (chan->type) { + case IIO_ALTVOLTAGE: + *type =3D IIO_VAL_INT; + *vals =3D excitation_frequency_available; + return IIO_AVAIL_RANGE; + default: + return -EINVAL; + } case IIO_CHAN_INFO_HYSTERESIS: switch (chan->type) { case IIO_ANGL: @@ -552,6 +558,13 @@ static int ad2s1210_write_raw(struct iio_dev *indio_de= v, struct ad2s1210_state *st =3D iio_priv(indio_dev); =20 switch (mask) { + case IIO_CHAN_INFO_FREQUENCY: + switch (chan->type) { + case IIO_ALTVOLTAGE: + return ad2s1210_set_excitation_frequency(st, val); + default: + return -EINVAL; + } case IIO_CHAN_INFO_HYSTERESIS: switch (chan->type) { case IIO_ANGL: @@ -564,8 +577,6 @@ static int ad2s1210_write_raw(struct iio_dev *indio_dev, } } =20 -static IIO_DEVICE_ATTR(fexcit, 0644, - ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0); static IIO_DEVICE_ATTR(bits, 0644, ad2s1210_show_resolution, ad2s1210_store_resolution, 0); static IIO_DEVICE_ATTR(fault, 0644, @@ -609,11 +620,19 @@ static const struct iio_chan_spec ad2s1210_channels[]= =3D { .channel =3D 0, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), - } + }, { + /* excitation frequency output */ + .type =3D IIO_ALTVOLTAGE, + .indexed =3D 1, + .channel =3D 0, + .output =3D 1, + .scan_index =3D -1, + .info_mask_separate =3D BIT(IIO_CHAN_INFO_FREQUENCY), + .info_mask_separate_available =3D BIT(IIO_CHAN_INFO_FREQUENCY), + }, }; =20 static struct attribute *ad2s1210_attributes[] =3D { - &iio_dev_attr_fexcit.dev_attr.attr, &iio_dev_attr_bits.dev_attr.attr, &iio_dev_attr_fault.dev_attr.attr, &iio_dev_attr_los_thrd.dev_attr.attr, --=20 2.42.0 From nobody Sat Jan 3 02:07:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0ED80E92FD0 for ; Fri, 6 Oct 2023 00:51:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229657AbjJFAvU (ORCPT ); Thu, 5 Oct 2023 20:51:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229645AbjJFAvL (ORCPT ); Thu, 5 Oct 2023 20:51:11 -0400 Received: from mail-oa1-x2c.google.com (mail-oa1-x2c.google.com [IPv6:2001:4860:4864:20::2c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F32C9EE for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:07 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 04/17] staging: iio: resolver: ad2s1210: convert resolution to devicetree property Date: Thu, 5 Oct 2023 19:50:21 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-4-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Selecting the resolution was implemented as the `bits` sysfs attribute. However, the selection of the resolution depends on how the hardware is wired and the specific application, so this is rather a job for devicetree to describe. A new devicetree property `assigned-resolution-bits` to specify the resolution required for each chip is added and the `bits` sysfs attribute is removed. Since the resolution is now supplied by a devicetree property, the resolution-gpios are now optional and we can allow for the case where the resolution pins on the AD2S1210 are hard-wired instead of requiring them to be connected to gpios. Signed-off-by: David Lechner --- v4 changes: * Fixed devicetree property name in commit message. * Reworked handling of hysteresis_available to handle assigned-resolution-bits !=3D 16. v3 changes: * Fixed multiline comment style. drivers/staging/iio/resolver/ad2s1210.c | 150 +++++++++++++++-------------= ---- 1 file changed, 71 insertions(+), 79 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 0c7772725330..66ef35fbb6fe 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -63,6 +63,13 @@ enum ad2s1210_mode { MOD_CONFIG =3D 0b11, }; =20 +enum ad2s1210_resolution { + AD2S1210_RES_10 =3D 0b00, + AD2S1210_RES_12 =3D 0b01, + AD2S1210_RES_14 =3D 0b10, + AD2S1210_RES_16 =3D 0b11, +}; + struct ad2s1210_state { struct mutex lock; struct spi_device *sdev; @@ -70,15 +77,14 @@ struct ad2s1210_state { struct gpio_desc *sample_gpio; /** GPIO pins connected to A0 and A1 lines. */ struct gpio_descs *mode_gpios; - /** GPIO pins connected to RES0 and RES1 lines. */ - struct gpio_descs *resolution_gpios; /** Used to access config registers. */ struct regmap *regmap; /** The external oscillator frequency in Hz. */ unsigned long clkin_hz; /** Available raw hysteresis values based on resolution. */ int hysteresis_available[2]; - u8 resolution; + /** The selected resolution */ + enum ad2s1210_resolution resolution; /** For reading raw sample value via SPI. */ __be16 sample __aligned(IIO_DMA_MINALIGN); /** SPI transmit buffer. */ @@ -215,63 +221,6 @@ static int ad2s1210_reinit_excitation_frequency(struct= ad2s1210_state *st, return regmap_write(st->regmap, AD2S1210_REG_SOFT_RESET, 0); } =20 -static int ad2s1210_set_resolution_gpios(struct ad2s1210_state *st, - u8 resolution) -{ - struct gpio_descs *gpios =3D st->resolution_gpios; - DECLARE_BITMAP(bitmap, 2); - - bitmap[0] =3D (resolution - 10) >> 1; - - return gpiod_set_array_value(gpios->ndescs, gpios->desc, gpios->info, - bitmap); -} - -static ssize_t ad2s1210_show_resolution(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - - return sprintf(buf, "%d\n", st->resolution); -} - -static ssize_t ad2s1210_store_resolution(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t len) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - unsigned char data; - unsigned char udata; - int ret; - - ret =3D kstrtou8(buf, 10, &udata); - if (ret || udata < 10 || udata > 16) { - dev_err(dev, "ad2s1210: resolution out of range\n"); - return -EINVAL; - } - - data =3D (udata - 10) >> 1; - - mutex_lock(&st->lock); - ret =3D regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL, - AD2S1210_SET_RES, data); - if (ret < 0) - goto error_ret; - - ret =3D ad2s1210_set_resolution_gpios(st, udata); - if (ret < 0) - goto error_ret; - - st->resolution =3D udata; - st->hysteresis_available[1] =3D 1 << (16 - st->resolution); - ret =3D len; - -error_ret: - mutex_unlock(&st->lock); - return ret; -} - /* read the fault register since last sample */ static ssize_t ad2s1210_show_fault(struct device *dev, struct device_attribute *attr, char *buf) @@ -413,7 +362,7 @@ static int ad2s1210_get_hysteresis(struct ad2s1210_stat= e *st, int *val) if (ret < 0) return ret; =20 - *val =3D ret << (16 - st->resolution); + *val =3D ret << (2 * (AD2S1210_RES_16 - st->resolution)); return IIO_VAL_INT; } =20 @@ -577,8 +526,6 @@ static int ad2s1210_write_raw(struct iio_dev *indio_dev, } } =20 -static IIO_DEVICE_ATTR(bits, 0644, - ad2s1210_show_resolution, ad2s1210_store_resolution, 0); static IIO_DEVICE_ATTR(fault, 0644, ad2s1210_show_fault, ad2s1210_clear_fault, 0); =20 @@ -633,7 +580,6 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { }; =20 static struct attribute *ad2s1210_attributes[] =3D { - &iio_dev_attr_bits.dev_attr.attr, &iio_dev_attr_fault.dev_attr.attr, &iio_dev_attr_los_thrd.dev_attr.attr, &iio_dev_attr_dos_ovr_thrd.dev_attr.attr, @@ -655,15 +601,12 @@ static int ad2s1210_initial(struct ad2s1210_state *st) int ret; =20 mutex_lock(&st->lock); - ret =3D ad2s1210_set_resolution_gpios(st, st->resolution); - if (ret < 0) - goto error_ret; =20 /* Use default config register value plus resolution from devicetree. */ data =3D FIELD_PREP(AD2S1210_PHASE_LOCK_RANGE_44, 1); data |=3D FIELD_PREP(AD2S1210_ENABLE_HYSTERESIS, 1); data |=3D FIELD_PREP(AD2S1210_SET_ENRES, 0x3); - data |=3D FIELD_PREP(AD2S1210_SET_RES, (st->resolution - 10) >> 1); + data |=3D FIELD_PREP(AD2S1210_SET_RES, st->resolution); =20 ret =3D regmap_write(st->regmap, AD2S1210_REG_CONTROL, data); if (ret < 0) @@ -703,6 +646,35 @@ static const struct iio_info ad2s1210_info =3D { .debugfs_reg_access =3D &ad2s1210_debugfs_reg_access, }; =20 +static int ad2s1210_setup_properties(struct ad2s1210_state *st) +{ + struct device *dev =3D &st->sdev->dev; + u32 val; + int ret; + + ret =3D device_property_read_u32(dev, "assigned-resolution-bits", &val); + if (ret < 0) + return dev_err_probe(dev, ret, + "failed to read assigned-resolution-bits property\n"); + + if (val < 10 || val > 16) + return dev_err_probe(dev, -EINVAL, + "resolution out of range: %u\n", val); + + st->resolution =3D (val - 10) >> 1; + /* + * These are values that correlate to the hysteresis bit in the Control + * register. 0 =3D disabled, 1 =3D enabled. When enabled, the actual + * hysteresis is +/- 1 LSB of the raw position value. Which bit is the + * LSB depends on the specified resolution. + */ + st->hysteresis_available[0] =3D 0; + st->hysteresis_available[1] =3D 1 << (2 * (AD2S1210_RES_16 - + st->resolution)); + + return 0; +} + static int ad2s1210_setup_clocks(struct ad2s1210_state *st) { struct device *dev =3D &st->sdev->dev; @@ -724,6 +696,9 @@ static int ad2s1210_setup_clocks(struct ad2s1210_state = *st) static int ad2s1210_setup_gpios(struct ad2s1210_state *st) { struct device *dev =3D &st->sdev->dev; + struct gpio_descs *resolution_gpios; + DECLARE_BITMAP(bitmap, 2); + int ret; =20 /* should not be sampling on startup */ st->sample_gpio =3D devm_gpiod_get(dev, "sample", GPIOD_OUT_LOW); @@ -741,16 +716,32 @@ static int ad2s1210_setup_gpios(struct ad2s1210_state= *st) return dev_err_probe(dev, -EINVAL, "requires exactly 2 mode-gpios\n"); =20 - /* both pins high means that we start with 16-bit resolution */ - st->resolution_gpios =3D devm_gpiod_get_array(dev, "resolution", - GPIOD_OUT_HIGH); - if (IS_ERR(st->resolution_gpios)) - return dev_err_probe(dev, PTR_ERR(st->resolution_gpios), + /* + * If resolution gpios are provided, they get set to the required + * resolution, otherwise it is assumed the RES0 and RES1 pins are + * hard-wired to match the resolution indicated in the devicetree. + */ + resolution_gpios =3D devm_gpiod_get_array_optional(dev, "resolution", + GPIOD_ASIS); + if (IS_ERR(resolution_gpios)) + return dev_err_probe(dev, PTR_ERR(resolution_gpios), "failed to request resolution GPIOs\n"); =20 - if (st->resolution_gpios->ndescs !=3D 2) - return dev_err_probe(dev, -EINVAL, - "requires exactly 2 resolution-gpios\n"); + if (resolution_gpios) { + if (resolution_gpios->ndescs !=3D 2) + return dev_err_probe(dev, -EINVAL, + "requires exactly 2 resolution-gpios\n"); + + bitmap[0] =3D st->resolution; + + ret =3D gpiod_set_array_value(resolution_gpios->ndescs, + resolution_gpios->desc, + resolution_gpios->info, + bitmap); + if (ret < 0) + return dev_err_probe(dev, ret, + "failed to set resolution gpios\n"); + } =20 return 0; } @@ -814,9 +805,10 @@ static int ad2s1210_probe(struct spi_device *spi) =20 mutex_init(&st->lock); st->sdev =3D spi; - st->resolution =3D 12; - st->hysteresis_available[0] =3D 0; - st->hysteresis_available[1] =3D 1 << (16 - st->resolution); + + ret =3D ad2s1210_setup_properties(st); + if (ret < 0) + return ret; =20 ret =3D ad2s1210_setup_clocks(st); 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:08 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 05/17] staging: iio: resolver: ad2s1210: add phase lock range support Date: Thu, 5 Oct 2023 19:50:22 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-5-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The AD2S1210 chip has a phase lock range feature that allows selecting the allowable phase difference between the excitation output and the sine and cosine inputs. This can be set to either 44 degrees (default) or 360 degrees. This patch adds a new phase channel with a phase0_mag_rising event that can be used to configure the phase lock range. Actually emitting the event will be added in a subsequent patch. Signed-off-by: David Lechner --- v4 changes: * Changed event direction from none to rising. * Fixed missing static qualifier on attribute definition. v3 changes: * This is a new patch to replace "staging: iio: resolver: ad2s1210: add phase_lock_range attributes" drivers/staging/iio/resolver/ad2s1210.c | 125 ++++++++++++++++++++++++++++= ++++ 1 file changed, 125 insertions(+) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 66ef35fbb6fe..83f6ac890dbc 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -56,6 +56,13 @@ #define AD2S1210_MIN_FCW 0x4 #define AD2S1210_MAX_FCW 0x50 =20 +/* 44 degrees ~=3D 0.767945 radians */ +#define PHASE_44_DEG_TO_RAD_INT 0 +#define PHASE_44_DEG_TO_RAD_MICRO 767945 +/* 360 degrees ~=3D 6.283185 radians */ +#define PHASE_360_DEG_TO_RAD_INT 6 +#define PHASE_360_DEG_TO_RAD_MICRO 283185 + enum ad2s1210_mode { MOD_POS =3D 0b00, MOD_VEL =3D 0b01, @@ -379,6 +386,54 @@ static int ad2s1210_set_hysteresis(struct ad2s1210_sta= te *st, int val) return ret; } =20 +static int ad2s1210_get_phase_lock_range(struct ad2s1210_state *st, + int *val, int *val2) +{ + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_test_bits(st->regmap, AD2S1210_REG_CONTROL, + AD2S1210_PHASE_LOCK_RANGE_44); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + if (ret) { + /* 44 degrees as radians */ + *val =3D PHASE_44_DEG_TO_RAD_INT; + *val2 =3D PHASE_44_DEG_TO_RAD_MICRO; + } else { + /* 360 degrees as radians */ + *val =3D PHASE_360_DEG_TO_RAD_INT; + *val2 =3D PHASE_360_DEG_TO_RAD_MICRO; + } + + return IIO_VAL_INT_PLUS_MICRO; +} + +static int ad2s1210_set_phase_lock_range(struct ad2s1210_state *st, + int val, int val2) +{ + int deg, ret; + + /* convert radians to degrees - only two allowable values */ + if (val =3D=3D PHASE_44_DEG_TO_RAD_INT && val2 =3D=3D PHASE_44_DEG_TO_RAD= _MICRO) + deg =3D 44; + else if (val =3D=3D PHASE_360_DEG_TO_RAD_INT && + val2 =3D=3D PHASE_360_DEG_TO_RAD_MICRO) + deg =3D 360; + else + return -EINVAL; + + mutex_lock(&st->lock); + ret =3D regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL, + AD2S1210_PHASE_LOCK_RANGE_44, + deg =3D=3D 44 ? AD2S1210_PHASE_LOCK_RANGE_44 : 0); + mutex_unlock(&st->lock); + return ret; +} + static int ad2s1210_get_excitation_frequency(struct ad2s1210_state *st, in= t *val) { unsigned int reg_val; @@ -551,6 +606,16 @@ static IIO_DEVICE_ATTR(lot_low_thrd, 0644, ad2s1210_show_reg, ad2s1210_store_reg, AD2S1210_REG_LOT_LOW_THRD); =20 +static const struct iio_event_spec ad2s1210_phase_event_spec[] =3D { + { + /* Phase error fault. */ + .type =3D IIO_EV_TYPE_MAG, + .dir =3D IIO_EV_DIR_RISING, + /* Phase lock range. */ + .mask_separate =3D BIT(IIO_EV_INFO_VALUE), + }, +}; + static const struct iio_chan_spec ad2s1210_channels[] =3D { { .type =3D IIO_ANGL, @@ -567,6 +632,14 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { .channel =3D 0, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), + }, { + /* used to configure phase lock range and get phase lock error */ + .type =3D IIO_PHASE, + .indexed =3D 1, + .channel =3D 0, + .scan_index =3D -1, + .event_spec =3D ad2s1210_phase_event_spec, + .num_event_specs =3D ARRAY_SIZE(ad2s1210_phase_event_spec), }, { /* excitation frequency output */ .type =3D IIO_ALTVOLTAGE, @@ -595,6 +668,21 @@ static const struct attribute_group ad2s1210_attribute= _group =3D { .attrs =3D ad2s1210_attributes, }; =20 +static IIO_CONST_ATTR(in_phase0_mag_rising_value_available, + __stringify(PHASE_44_DEG_TO_RAD_INT) "." + __stringify(PHASE_44_DEG_TO_RAD_MICRO) " " + __stringify(PHASE_360_DEG_TO_RAD_INT) "." + __stringify(PHASE_360_DEG_TO_RAD_MICRO)); + +static struct attribute *ad2s1210_event_attributes[] =3D { + &iio_const_attr_in_phase0_mag_rising_value_available.dev_attr.attr, + NULL, +}; + +static const struct attribute_group ad2s1210_event_attribute_group =3D { + .attrs =3D ad2s1210_event_attributes, +}; + static int ad2s1210_initial(struct ad2s1210_state *st) { unsigned char data; @@ -619,6 +707,40 @@ static int ad2s1210_initial(struct ad2s1210_state *st) return ret; } =20 +static int ad2s1210_read_event_value(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int *val, int *val2) +{ + struct ad2s1210_state *st =3D iio_priv(indio_dev); + + switch (chan->type) { + case IIO_PHASE: + return ad2s1210_get_phase_lock_range(st, val, val2); + default: + return -EINVAL; + } +} + +static int ad2s1210_write_event_value(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int val, int val2) +{ + struct ad2s1210_state *st =3D iio_priv(indio_dev); + + switch (chan->type) { + case IIO_PHASE: + return ad2s1210_set_phase_lock_range(st, val, val2); + default: + return -EINVAL; + } +} + static int ad2s1210_debugfs_reg_access(struct iio_dev *indio_dev, unsigned int reg, unsigned int writeval, unsigned int *readval) @@ -639,10 +761,13 @@ static int ad2s1210_debugfs_reg_access(struct iio_dev= *indio_dev, } =20 static const struct iio_info ad2s1210_info =3D { + .event_attrs =3D &ad2s1210_event_attribute_group, .read_raw =3D ad2s1210_read_raw, .read_avail =3D ad2s1210_read_avail, .write_raw =3D ad2s1210_write_raw, .attrs =3D &ad2s1210_attribute_group, + .read_event_value =3D ad2s1210_read_event_value, + .write_event_value =3D ad2s1210_write_event_value, .debugfs_reg_access =3D &ad2s1210_debugfs_reg_access, }; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:09 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 06/17] staging: iio: resolver: ad2s1210: add triggered buffer support Date: Thu, 5 Oct 2023 19:50:23 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-6-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds support for triggered buffers to the AD2S1210 resolver driver. Signed-off-by: David Lechner --- v4 changes: None v3 changes: * Dropped setting datasheet_name of channels. drivers/staging/iio/resolver/ad2s1210.c | 83 +++++++++++++++++++++++++++++= +++- 1 file changed, 82 insertions(+), 1 deletion(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 83f6ac890dbc..4d651a2d0f38 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -20,8 +20,11 @@ #include #include =20 +#include #include #include +#include +#include =20 #define DRV_NAME "ad2s1210" =20 @@ -94,6 +97,12 @@ struct ad2s1210_state { enum ad2s1210_resolution resolution; /** For reading raw sample value via SPI. */ __be16 sample __aligned(IIO_DMA_MINALIGN); + /** Scan buffer */ + struct { + __be16 chan[2]; + /* Ensure timestamp is naturally aligned. */ + s64 timestamp __aligned(8); + } scan; /** SPI transmit buffer. */ u8 rx[2]; /** SPI receive buffer. */ @@ -621,6 +630,13 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { .type =3D IIO_ANGL, .indexed =3D 1, .channel =3D 0, + .scan_index =3D 0, + .scan_type =3D { + .sign =3D 'u', + .realbits =3D 16, + .storagebits =3D 16, + .endianness =3D IIO_BE, + }, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_HYSTERESIS), @@ -630,9 +646,18 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { .type =3D IIO_ANGL_VEL, .indexed =3D 1, .channel =3D 0, + .scan_index =3D 1, + .scan_type =3D { + .sign =3D 's', + .realbits =3D 16, + .storagebits =3D 16, + .endianness =3D IIO_BE, + }, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), - }, { + }, + IIO_CHAN_SOFT_TIMESTAMP(2), + { /* used to configure phase lock range and get phase lock error */ .type =3D IIO_PHASE, .indexed =3D 1, @@ -760,6 +785,55 @@ static int ad2s1210_debugfs_reg_access(struct iio_dev = *indio_dev, return ret; } =20 +static irqreturn_t ad2s1210_trigger_handler(int irq, void *p) +{ + struct iio_poll_func *pf =3D p; + struct iio_dev *indio_dev =3D pf->indio_dev; + struct ad2s1210_state *st =3D iio_priv(indio_dev); + size_t chan =3D 0; + int ret; + + mutex_lock(&st->lock); + + memset(&st->scan, 0, sizeof(st->scan)); + gpiod_set_value(st->sample_gpio, 1); + + if (test_bit(0, indio_dev->active_scan_mask)) { + ret =3D ad2s1210_set_mode(st, MOD_POS); + if (ret < 0) + goto error_ret; + + /* REVIST: we can read 3 bytes here and also get fault flags */ + ret =3D spi_read(st->sdev, st->rx, 2); + if (ret < 0) + goto error_ret; + + memcpy(&st->scan.chan[chan++], st->rx, 2); + } + + if (test_bit(1, indio_dev->active_scan_mask)) { + ret =3D ad2s1210_set_mode(st, MOD_VEL); + if (ret < 0) + goto error_ret; + + /* REVIST: we can read 3 bytes here and also get fault flags */ + ret =3D spi_read(st->sdev, st->rx, 2); + if (ret < 0) + goto error_ret; + + memcpy(&st->scan.chan[chan++], st->rx, 2); + } + + iio_push_to_buffers_with_timestamp(indio_dev, &st->scan, pf->timestamp); + +error_ret: + gpiod_set_value(st->sample_gpio, 0); + mutex_unlock(&st->lock); + iio_trigger_notify_done(indio_dev->trig); + + return IRQ_HANDLED; +} + static const struct iio_info ad2s1210_info =3D { .event_attrs =3D &ad2s1210_event_attribute_group, .read_raw =3D ad2s1210_read_raw, @@ -957,6 +1031,13 @@ static int ad2s1210_probe(struct spi_device *spi) indio_dev->num_channels =3D ARRAY_SIZE(ad2s1210_channels); indio_dev->name =3D spi_get_device_id(spi)->name; =20 + ret =3D devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, + &iio_pollfunc_store_time, + &ad2s1210_trigger_handler, NULL); + if (ret < 0) + return dev_err_probe(&spi->dev, ret, + "iio triggered buffer setup failed\n"); + return devm_iio_device_register(&spi->dev, indio_dev); } =20 --=20 2.42.0 From nobody Sat Jan 3 02:07:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B672BE92FD0 for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:10 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 07/17] staging: iio: resolver: ad2s1210: convert LOT threshold attrs to event attrs Date: Thu, 5 Oct 2023 19:50:24 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-7-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The AD2S1210 monitors the internal error signal (difference between estimated angle and measured angle) to determine a loss of position tracking (LOT) condition. When the error value exceeds a threshold, a fault is triggered. This threshold is user-configurable. This patch converts the custom lot_high_thrd and lot_low_thrd attributes in the ad2s1210 driver to standard event attributes. This will allow tooling to be able to expose these in a generic way. Since the low threshold determines the hysteresis, it requires some special handling to expose the difference between the high and low register values as the hysteresis instead of exposing the low register value directly. The attributes also return the values in radians now as required by the ABI. Actually emitting the fault event will be done in a later patch. Signed-off-by: David Lechner --- v4 changes: * Fixed missing static qualifier on attribute definition. v3 changes: This is a new patch in v3 drivers/staging/iio/resolver/ad2s1210.c | 191 ++++++++++++++++++++++++++++= ++-- 1 file changed, 183 insertions(+), 8 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 4d651a2d0f38..12437f697f79 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -443,6 +443,123 @@ static int ad2s1210_set_phase_lock_range(struct ad2s1= 210_state *st, return ret; } =20 +/* map resolution to microradians/LSB for LOT registers */ +static const int ad2s1210_lot_threshold_urad_per_lsb[] =3D { + 6184, /* 10-bit: ~0.35 deg/LSB, 45 deg max */ + 2473, /* 12-bit: ~0.14 deg/LSB, 18 deg max */ + 1237, /* 14-bit: ~0.07 deg/LSB, 9 deg max */ + 1237, /* 16-bit: same as 14-bit */ +}; + +static int ad2s1210_get_lot_high_threshold(struct ad2s1210_state *st, + int *val, int *val2) +{ + unsigned int reg_val; + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, ®_val); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + *val =3D 0; + *val2 =3D reg_val * ad2s1210_lot_threshold_urad_per_lsb[st->resolution]; + return IIO_VAL_INT_PLUS_MICRO; +} + +static int ad2s1210_set_lot_high_threshold(struct ad2s1210_state *st, + int val, int val2) +{ + unsigned int high_reg_val, low_reg_val, hysteresis; + int ret; + + /* all valid values are between 0 and pi/4 radians */ + if (val !=3D 0) + return -EINVAL; + + mutex_lock(&st->lock); + /* + * We need to read both high and low registers first so we can preserve + * the hysteresis. + */ + ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, &high_reg_val= ); + if (ret < 0) + goto error_ret; + + ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_LOW_THRD, &low_reg_val); + if (ret < 0) + goto error_ret; + + hysteresis =3D high_reg_val - low_reg_val; + high_reg_val =3D val2 / ad2s1210_lot_threshold_urad_per_lsb[st->resolutio= n]; + low_reg_val =3D high_reg_val - hysteresis; + + ret =3D regmap_write(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, high_reg_val= ); + if (ret < 0) + goto error_ret; + + ret =3D regmap_write(st->regmap, AD2S1210_REG_LOT_LOW_THRD, low_reg_val); + +error_ret: + mutex_unlock(&st->lock); + + return ret; +} + +static int ad2s1210_get_lot_low_threshold(struct ad2s1210_state *st, + int *val, int *val2) +{ + unsigned int high_reg_val, low_reg_val; + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, &high_reg_val= ); + if (ret < 0) + goto error_ret; + + ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_LOW_THRD, &low_reg_val); + +error_ret: + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + /* sysfs value is hysteresis rather than actual low value */ + *val =3D 0; + *val2 =3D (high_reg_val - low_reg_val) * + ad2s1210_lot_threshold_urad_per_lsb[st->resolution]; + return IIO_VAL_INT_PLUS_MICRO; +} + +static int ad2s1210_set_lot_low_threshold(struct ad2s1210_state *st, + int val, int val2) +{ + unsigned int reg_val, hysteresis; + int ret; + + /* all valid values are between 0 and pi/4 radians */ + if (val !=3D 0) + return -EINVAL; + + hysteresis =3D val2 / ad2s1210_lot_threshold_urad_per_lsb[st->resolution]; + + mutex_lock(&st->lock); + ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, ®_val); + if (ret < 0) + goto error_ret; + + ret =3D regmap_write(st->regmap, AD2S1210_REG_LOT_LOW_THRD, + reg_val - hysteresis); + +error_ret: + mutex_unlock(&st->lock); + + return ret; +} + static int ad2s1210_get_excitation_frequency(struct ad2s1210_state *st, in= t *val) { unsigned int reg_val; @@ -608,12 +725,19 @@ static IIO_DEVICE_ATTR(dos_rst_max_thrd, 0644, static IIO_DEVICE_ATTR(dos_rst_min_thrd, 0644, ad2s1210_show_reg, ad2s1210_store_reg, AD2S1210_REG_DOS_RST_MIN_THRD); -static IIO_DEVICE_ATTR(lot_high_thrd, 0644, - ad2s1210_show_reg, ad2s1210_store_reg, - AD2S1210_REG_LOT_HIGH_THRD); -static IIO_DEVICE_ATTR(lot_low_thrd, 0644, - ad2s1210_show_reg, ad2s1210_store_reg, - AD2S1210_REG_LOT_LOW_THRD); + +static const struct iio_event_spec ad2s1210_position_event_spec[] =3D { + { + /* Tracking error exceeds LOT threshold fault. */ + .type =3D IIO_EV_TYPE_THRESH, + .dir =3D IIO_EV_DIR_RISING, + .mask_separate =3D + /* Loss of tracking high threshold. */ + BIT(IIO_EV_INFO_VALUE) | + /* Loss of tracking low threshold. */ + BIT(IIO_EV_INFO_HYSTERESIS), + }, +}; =20 static const struct iio_event_spec ad2s1210_phase_event_spec[] =3D { { @@ -657,6 +781,15 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { BIT(IIO_CHAN_INFO_SCALE), }, IIO_CHAN_SOFT_TIMESTAMP(2), + { + /* used to configure LOT thresholds and get tracking error */ + .type =3D IIO_ANGL, + .indexed =3D 1, + .channel =3D 1, + .scan_index =3D -1, + .event_spec =3D ad2s1210_position_event_spec, + .num_event_specs =3D ARRAY_SIZE(ad2s1210_position_event_spec), + }, { /* used to configure phase lock range and get phase lock error */ .type =3D IIO_PHASE, @@ -684,8 +817,6 @@ static struct attribute *ad2s1210_attributes[] =3D { &iio_dev_attr_dos_mis_thrd.dev_attr.attr, &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr, &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr, - &iio_dev_attr_lot_high_thrd.dev_attr.attr, - &iio_dev_attr_lot_low_thrd.dev_attr.attr, NULL, }; =20 @@ -693,14 +824,40 @@ static const struct attribute_group ad2s1210_attribut= e_group =3D { .attrs =3D ad2s1210_attributes, }; =20 +static ssize_t +in_angl1_thresh_rising_value_available_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); + int step =3D ad2s1210_lot_threshold_urad_per_lsb[st->resolution]; + + return sysfs_emit(buf, "[0 0.%06d 0.%06d]\n", step, step * 0x7F); +} + +static ssize_t +in_angl1_thresh_rising_hysteresis_available_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); + int step =3D ad2s1210_lot_threshold_urad_per_lsb[st->resolution]; + + return sysfs_emit(buf, "[0 0.%06d 0.%06d]\n", step, step * 0x7F); +} + static IIO_CONST_ATTR(in_phase0_mag_rising_value_available, __stringify(PHASE_44_DEG_TO_RAD_INT) "." __stringify(PHASE_44_DEG_TO_RAD_MICRO) " " __stringify(PHASE_360_DEG_TO_RAD_INT) "." __stringify(PHASE_360_DEG_TO_RAD_MICRO)); +static IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_value_available, 0); +static IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_hysteresis_available, 0); =20 static struct attribute *ad2s1210_event_attributes[] =3D { &iio_const_attr_in_phase0_mag_rising_value_available.dev_attr.attr, + &iio_dev_attr_in_angl1_thresh_rising_value_available.dev_attr.attr, + &iio_dev_attr_in_angl1_thresh_rising_hysteresis_available.dev_attr.attr, NULL, }; =20 @@ -742,6 +899,15 @@ static int ad2s1210_read_event_value(struct iio_dev *i= ndio_dev, struct ad2s1210_state *st =3D iio_priv(indio_dev); =20 switch (chan->type) { + case IIO_ANGL: + switch (info) { + case IIO_EV_INFO_VALUE: + return ad2s1210_get_lot_high_threshold(st, val, val2); + case IIO_EV_INFO_HYSTERESIS: + return ad2s1210_get_lot_low_threshold(st, val, val2); + default: + return -EINVAL; + } case IIO_PHASE: return ad2s1210_get_phase_lock_range(st, val, val2); default: @@ -759,6 +925,15 @@ static int ad2s1210_write_event_value(struct iio_dev *= indio_dev, struct ad2s1210_state *st =3D iio_priv(indio_dev); =20 switch (chan->type) { + case IIO_ANGL: + switch (info) { + case IIO_EV_INFO_VALUE: + return ad2s1210_set_lot_high_threshold(st, val, val2); + case IIO_EV_INFO_HYSTERESIS: + return ad2s1210_set_lot_low_threshold(st, val, val2); + default: + return -EINVAL; + } case IIO_PHASE: return ad2s1210_set_phase_lock_range(st, val, val2); default: --=20 2.42.0 From nobody Sat Jan 3 02:07:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3DE5E92FCF for ; Fri, 6 Oct 2023 00:51:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229876AbjJFAvb (ORCPT ); Thu, 5 Oct 2023 20:51:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55622 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229668AbjJFAvP (ORCPT ); Thu, 5 Oct 2023 20:51:15 -0400 Received: from mail-oa1-x2e.google.com (mail-oa1-x2e.google.com [IPv6:2001:4860:4864:20::2e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E38F6E7 for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:10 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 08/17] staging: iio: resolver: ad2s1210: convert LOS threshold to event attr Date: Thu, 5 Oct 2023 19:50:25 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-8-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The AD2S1210 has a programmable threshold for the loss of signal (LOS) fault. This fault is triggered when either the sine or cosine input falls below the threshold voltage. This patch converts the custom device LOS threshold attribute to an event falling edge threshold attribute on a new monitor signal channel. The monitor signal is an internal signal that combines the amplitudes of the sine and cosine inputs as well as the current angle and position output. This signal is used to detect faults in the input signals. The attribute now uses millivolts instead of the raw register value in accordance with the IIO ABI. Emitting the event will be implemented in a later patch. Signed-off-by: David Lechner --- v4 changes: * Fixed missing static qualifier on attribute definition. v3 changes: This is a new patch in v3 drivers/staging/iio/resolver/ad2s1210.c | 76 +++++++++++++++++++++++++++++= ++-- 1 file changed, 72 insertions(+), 4 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 12437f697f79..d52aed30ca66 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -66,6 +66,11 @@ #define PHASE_360_DEG_TO_RAD_INT 6 #define PHASE_360_DEG_TO_RAD_MICRO 283185 =20 +/* Threshold voltage registers have 1 LSB =3D=3D 38 mV */ +#define THRESHOLD_MILLIVOLT_PER_LSB 38 +/* max voltage for threshold registers is 0x7F * 38 mV */ +#define THRESHOLD_RANGE_STR "[0 38 4826]" + enum ad2s1210_mode { MOD_POS =3D 0b00, MOD_VEL =3D 0b01, @@ -451,6 +456,38 @@ static const int ad2s1210_lot_threshold_urad_per_lsb[]= =3D { 1237, /* 16-bit: same as 14-bit */ }; =20 +static int ad2s1210_get_voltage_threshold(struct ad2s1210_state *st, + unsigned int reg, int *val) +{ + unsigned int reg_val; + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_read(st->regmap, reg, ®_val); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + *val =3D reg_val * THRESHOLD_MILLIVOLT_PER_LSB; + return IIO_VAL_INT; +} + +static int ad2s1210_set_voltage_threshold(struct ad2s1210_state *st, + unsigned int reg, int val) +{ + unsigned int reg_val; + int ret; + + reg_val =3D val / THRESHOLD_MILLIVOLT_PER_LSB; + + mutex_lock(&st->lock); + ret =3D regmap_write(st->regmap, reg, reg_val); + mutex_unlock(&st->lock); + + return ret; +} + static int ad2s1210_get_lot_high_threshold(struct ad2s1210_state *st, int *val, int *val2) { @@ -710,9 +747,6 @@ static int ad2s1210_write_raw(struct iio_dev *indio_dev, static IIO_DEVICE_ATTR(fault, 0644, ad2s1210_show_fault, ad2s1210_clear_fault, 0); =20 -static IIO_DEVICE_ATTR(los_thrd, 0644, - ad2s1210_show_reg, ad2s1210_store_reg, - AD2S1210_REG_LOS_THRD); static IIO_DEVICE_ATTR(dos_ovr_thrd, 0644, ad2s1210_show_reg, ad2s1210_store_reg, AD2S1210_REG_DOS_OVR_THRD); @@ -749,6 +783,16 @@ static const struct iio_event_spec ad2s1210_phase_even= t_spec[] =3D { }, }; =20 +static const struct iio_event_spec ad2s1210_monitor_signal_event_spec[] = =3D { + { + /* Sine/cosine below LOS threshold fault. */ + .type =3D IIO_EV_TYPE_THRESH, + .dir =3D IIO_EV_DIR_FALLING, + /* Loss of signal threshold. */ + .mask_separate =3D BIT(IIO_EV_INFO_VALUE), + }, +}; + static const struct iio_chan_spec ad2s1210_channels[] =3D { { .type =3D IIO_ANGL, @@ -807,12 +851,19 @@ static const struct iio_chan_spec ad2s1210_channels[]= =3D { .scan_index =3D -1, .info_mask_separate =3D BIT(IIO_CHAN_INFO_FREQUENCY), .info_mask_separate_available =3D BIT(IIO_CHAN_INFO_FREQUENCY), + }, { + /* monitor signal */ + .type =3D IIO_ALTVOLTAGE, + .indexed =3D 1, + .channel =3D 0, + .scan_index =3D -1, + .event_spec =3D ad2s1210_monitor_signal_event_spec, + .num_event_specs =3D ARRAY_SIZE(ad2s1210_monitor_signal_event_spec), }, }; =20 static struct attribute *ad2s1210_attributes[] =3D { &iio_dev_attr_fault.dev_attr.attr, - &iio_dev_attr_los_thrd.dev_attr.attr, &iio_dev_attr_dos_ovr_thrd.dev_attr.attr, &iio_dev_attr_dos_mis_thrd.dev_attr.attr, &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr, @@ -851,11 +902,14 @@ static IIO_CONST_ATTR(in_phase0_mag_rising_value_avai= lable, __stringify(PHASE_44_DEG_TO_RAD_MICRO) " " __stringify(PHASE_360_DEG_TO_RAD_INT) "." __stringify(PHASE_360_DEG_TO_RAD_MICRO)); +static IIO_CONST_ATTR(in_altvoltage0_thresh_falling_value_available, + THRESHOLD_RANGE_STR); static IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_value_available, 0); static IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_hysteresis_available, 0); =20 static struct attribute *ad2s1210_event_attributes[] =3D { &iio_const_attr_in_phase0_mag_rising_value_available.dev_attr.attr, + &iio_const_attr_in_altvoltage0_thresh_falling_value_available.dev_attr.at= tr, &iio_dev_attr_in_angl1_thresh_rising_value_available.dev_attr.attr, &iio_dev_attr_in_angl1_thresh_rising_hysteresis_available.dev_attr.attr, NULL, @@ -908,6 +962,13 @@ static int ad2s1210_read_event_value(struct iio_dev *i= ndio_dev, default: return -EINVAL; } + case IIO_ALTVOLTAGE: + if (chan->output) + return -EINVAL; + if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_FALLING) + return ad2s1210_get_voltage_threshold(st, + AD2S1210_REG_LOS_THRD, val); + return -EINVAL; case IIO_PHASE: return ad2s1210_get_phase_lock_range(st, val, val2); default: @@ -934,6 +995,13 @@ static int ad2s1210_write_event_value(struct iio_dev *= indio_dev, default: return -EINVAL; } + case IIO_ALTVOLTAGE: + if (chan->output) + return -EINVAL; + if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_FALLING) + return ad2s1210_set_voltage_threshold(st, + AD2S1210_REG_LOS_THRD, val); + return -EINVAL; case IIO_PHASE: return ad2s1210_set_phase_lock_range(st, val, val2); default: --=20 2.42.0 From nobody Sat Jan 3 02:07:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19936E92FCF for ; Fri, 6 Oct 2023 00:51:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229888AbjJFAvd (ORCPT ); Thu, 5 Oct 2023 20:51:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229571AbjJFAvQ (ORCPT ); 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:11 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 09/17] staging: iio: resolver: ad2s1210: convert DOS overrange threshold to event attr Date: Thu, 5 Oct 2023 19:50:26 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-9-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The AD2S1210 has a programmable threshold for the degradation of signal (DOS) overrange fault. This fault is triggered when either the sine or cosine input rises above the threshold voltage. This patch converts the custom device DOS overrange threshold attribute to an event rising edge threshold attribute on the monitor signal channel. The attribute now uses millivolts instead of the raw register value in accordance with the IIO ABI. Emitting the event will be implemented in a later patch. Signed-off-by: David Lechner --- v4 changes: * Fixed missing word in commit message. * Fixed missing static qualifier on attribute definition. v3 changes: This is a new patch in v3 drivers/staging/iio/resolver/ad2s1210.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index d52aed30ca66..3c224bbeae17 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -747,9 +747,6 @@ static int ad2s1210_write_raw(struct iio_dev *indio_dev, static IIO_DEVICE_ATTR(fault, 0644, ad2s1210_show_fault, ad2s1210_clear_fault, 0); =20 -static IIO_DEVICE_ATTR(dos_ovr_thrd, 0644, - ad2s1210_show_reg, ad2s1210_store_reg, - AD2S1210_REG_DOS_OVR_THRD); static IIO_DEVICE_ATTR(dos_mis_thrd, 0644, ad2s1210_show_reg, ad2s1210_store_reg, AD2S1210_REG_DOS_MIS_THRD); @@ -791,6 +788,13 @@ static const struct iio_event_spec ad2s1210_monitor_si= gnal_event_spec[] =3D { /* Loss of signal threshold. */ .mask_separate =3D BIT(IIO_EV_INFO_VALUE), }, + { + /* Sine/cosine DOS overrange fault.*/ + .type =3D IIO_EV_TYPE_THRESH, + .dir =3D IIO_EV_DIR_RISING, + /* Degredation of signal overrange threshold. */ + .mask_separate =3D BIT(IIO_EV_INFO_VALUE), + }, }; =20 static const struct iio_chan_spec ad2s1210_channels[] =3D { @@ -864,7 +868,6 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { =20 static struct attribute *ad2s1210_attributes[] =3D { &iio_dev_attr_fault.dev_attr.attr, - &iio_dev_attr_dos_ovr_thrd.dev_attr.attr, &iio_dev_attr_dos_mis_thrd.dev_attr.attr, &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr, &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr, @@ -904,12 +907,15 @@ static IIO_CONST_ATTR(in_phase0_mag_rising_value_avai= lable, __stringify(PHASE_360_DEG_TO_RAD_MICRO)); static IIO_CONST_ATTR(in_altvoltage0_thresh_falling_value_available, THRESHOLD_RANGE_STR); +static IIO_CONST_ATTR(in_altvoltage0_thresh_rising_value_available, + THRESHOLD_RANGE_STR); static IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_value_available, 0); static IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_hysteresis_available, 0); =20 static struct attribute *ad2s1210_event_attributes[] =3D { &iio_const_attr_in_phase0_mag_rising_value_available.dev_attr.attr, &iio_const_attr_in_altvoltage0_thresh_falling_value_available.dev_attr.at= tr, + &iio_const_attr_in_altvoltage0_thresh_rising_value_available.dev_attr.att= r, &iio_dev_attr_in_angl1_thresh_rising_value_available.dev_attr.attr, &iio_dev_attr_in_angl1_thresh_rising_hysteresis_available.dev_attr.attr, NULL, @@ -968,6 +974,9 @@ static int ad2s1210_read_event_value(struct iio_dev *in= dio_dev, if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_FALLING) return ad2s1210_get_voltage_threshold(st, AD2S1210_REG_LOS_THRD, val); + if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_RISING) + return ad2s1210_get_voltage_threshold(st, + AD2S1210_REG_DOS_OVR_THRD, val); return -EINVAL; case IIO_PHASE: return ad2s1210_get_phase_lock_range(st, val, val2); @@ -1001,6 +1010,9 @@ static int ad2s1210_write_event_value(struct iio_dev = *indio_dev, if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_FALLING) return ad2s1210_set_voltage_threshold(st, AD2S1210_REG_LOS_THRD, val); + if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_RISING) + return ad2s1210_set_voltage_threshold(st, + AD2S1210_REG_DOS_OVR_THRD, val); return -EINVAL; case IIO_PHASE: return ad2s1210_set_phase_lock_range(st, val, val2); --=20 2.42.0 From nobody Sat Jan 3 02:07:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC487E92FCF for ; Fri, 6 Oct 2023 00:51:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229902AbjJFAvj (ORCPT ); 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:12 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 10/17] staging: iio: resolver: ad2s1210: convert DOS mismatch threshold to event attr Date: Thu, 5 Oct 2023 19:50:27 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-10-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The AD2S1210 has a programmable threshold for the degradation of signal (DOS) mismatch fault. This fault is triggered when the difference in voltage between the sine and cosine inputs exceeds the threshold. In other words, when the magnitude of sine and cosine inputs are equal, the AC component of the monitor signal is zero and when the magnitudes of the sine and cosine inputs are not equal, the AC component of the monitor signal is the difference between the sine and cosine inputs. So the fault occurs when the magnitude of the AC component of the monitor signal exceeds the DOS mismatch threshold voltage. This patch converts the custom device DOS mismatch threshold attribute to an event magnitude attribute on the monitor signal channel. The attribute now uses millivolts instead of the raw register value in accordance with the IIO ABI. Emitting the event will be implemented in a later patch. Signed-off-by: David Lechner --- v4 changes: * Changed event direction from none to rising. * Fixed missing static qualifier on attribute definition. v3 changes: This is a new patch in v3 drivers/staging/iio/resolver/ad2s1210.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 3c224bbeae17..870c4a9a6214 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -747,9 +747,6 @@ static int ad2s1210_write_raw(struct iio_dev *indio_dev, static IIO_DEVICE_ATTR(fault, 0644, ad2s1210_show_fault, ad2s1210_clear_fault, 0); =20 -static IIO_DEVICE_ATTR(dos_mis_thrd, 0644, - ad2s1210_show_reg, ad2s1210_store_reg, - AD2S1210_REG_DOS_MIS_THRD); static IIO_DEVICE_ATTR(dos_rst_max_thrd, 0644, ad2s1210_show_reg, ad2s1210_store_reg, AD2S1210_REG_DOS_RST_MAX_THRD); @@ -795,6 +792,12 @@ static const struct iio_event_spec ad2s1210_monitor_si= gnal_event_spec[] =3D { /* Degredation of signal overrange threshold. */ .mask_separate =3D BIT(IIO_EV_INFO_VALUE), }, + { + /* Sine/cosine DOS mismatch fault.*/ + .type =3D IIO_EV_TYPE_MAG, + .dir =3D IIO_EV_DIR_RISING, + .mask_separate =3D BIT(IIO_EV_INFO_VALUE), + }, }; =20 static const struct iio_chan_spec ad2s1210_channels[] =3D { @@ -868,7 +871,6 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { =20 static struct attribute *ad2s1210_attributes[] =3D { &iio_dev_attr_fault.dev_attr.attr, - &iio_dev_attr_dos_mis_thrd.dev_attr.attr, &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr, &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr, NULL, @@ -909,6 +911,8 @@ static IIO_CONST_ATTR(in_altvoltage0_thresh_falling_val= ue_available, THRESHOLD_RANGE_STR); static IIO_CONST_ATTR(in_altvoltage0_thresh_rising_value_available, THRESHOLD_RANGE_STR); +static IIO_CONST_ATTR(in_altvoltage0_mag_rising_value_available, + THRESHOLD_RANGE_STR); static IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_value_available, 0); static IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_hysteresis_available, 0); =20 @@ -916,6 +920,7 @@ static struct attribute *ad2s1210_event_attributes[] = =3D { &iio_const_attr_in_phase0_mag_rising_value_available.dev_attr.attr, &iio_const_attr_in_altvoltage0_thresh_falling_value_available.dev_attr.at= tr, &iio_const_attr_in_altvoltage0_thresh_rising_value_available.dev_attr.att= r, + &iio_const_attr_in_altvoltage0_mag_rising_value_available.dev_attr.attr, &iio_dev_attr_in_angl1_thresh_rising_value_available.dev_attr.attr, &iio_dev_attr_in_angl1_thresh_rising_hysteresis_available.dev_attr.attr, NULL, @@ -977,6 +982,9 @@ static int ad2s1210_read_event_value(struct iio_dev *in= dio_dev, if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_RISING) return ad2s1210_get_voltage_threshold(st, AD2S1210_REG_DOS_OVR_THRD, val); + if (type =3D=3D IIO_EV_TYPE_MAG) + return ad2s1210_get_voltage_threshold(st, + AD2S1210_REG_DOS_MIS_THRD, val); return -EINVAL; case IIO_PHASE: return ad2s1210_get_phase_lock_range(st, val, val2); @@ -1013,6 +1021,9 @@ static int ad2s1210_write_event_value(struct iio_dev = *indio_dev, if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_RISING) return ad2s1210_set_voltage_threshold(st, AD2S1210_REG_DOS_OVR_THRD, val); + if (type =3D=3D IIO_EV_TYPE_MAG) + return ad2s1210_set_voltage_threshold(st, + AD2S1210_REG_DOS_MIS_THRD, val); return -EINVAL; case IIO_PHASE: return ad2s1210_set_phase_lock_range(st, val, val2); --=20 2.42.0 From nobody Sat Jan 3 02:07:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3E3EE92FCF for ; Fri, 6 Oct 2023 00:51:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229898AbjJFAvh (ORCPT ); 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:13 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 11/17] staging: iio: resolver: ad2s1210: rename DOS reset min/max attrs Date: Thu, 5 Oct 2023 19:50:28 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-11-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The AD2S1210 has a programmable threshold for the degradation of signal (DOS) mismatch fault. This fault is triggered when the difference in amplitude between the sine and cosine inputs exceeds the threshold. The DOS reset min/max registers on the chip provide initial values for internal tracking of the min/max of the monitor signal after the fault register is cleared. This patch converts the custom device DOS reset min/max threshold attributes custom event attributes on the monitor signal channel. The attributes now use millivolts instead of the raw register value in accordance with the IIO ABI. Signed-off-by: David Lechner --- v4 changes: * Fixed name of attributes in sysfs docs. * Changed event direction from none to rising. * Fixed missing static qualifier on attribute definition. v3 changes: This is a new patch in v3 .../Documentation/sysfs-bus-iio-resolver-ad2s1210 | 27 ++++++ drivers/staging/iio/resolver/ad2s1210.c | 99 ++++++++++++------= ---- 2 files changed, 82 insertions(+), 44 deletions(-) diff --git a/drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1= 210 b/drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1210 new file mode 100644 index 000000000000..f92c79342b93 --- /dev/null +++ b/drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1210 @@ -0,0 +1,27 @@ +What: /sys/bus/iio/devices/iio:deviceX/events/in_altvoltage0_mag_rising_r= eset_max +KernelVersion: 6.7 +Contact: linux-iio@vger.kernel.org +Description: + Reading returns the current Degradation of Signal Reset Maximum + Threshold value in millivolts. Writing sets the value. + +What: /sys/bus/iio/devices/iio:deviceX/events/in_altvoltage0_mag_rising_r= eset_max_available +KernelVersion: 6.7 +Contact: linux-iio@vger.kernel.org +Description: + Reading returns the allowable voltage range for + in_altvoltage0_mag_rising_reset_max. + +What: /sys/bus/iio/devices/iio:deviceX/events/in_altvoltage0_mag_rising_r= eset_min +KernelVersion: 6.7 +Contact: linux-iio@vger.kernel.org +Description: + Reading returns the current Degradation of Signal Reset Minimum + Threshold value in millivolts. Writing sets the value. + +What: /sys/bus/iio/devices/iio:deviceX/events/in_altvoltage0_mag_rising_r= eset_min_available +KernelVersion: 6.7 +Contact: linux-iio@vger.kernel.org +Description: + Reading returns the allowable voltage range for + in_altvoltage0_mag_rising_reset_min. diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 870c4a9a6214..9fac806c2a5f 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -286,41 +286,6 @@ static ssize_t ad2s1210_clear_fault(struct device *dev, return ret < 0 ? ret : len; } =20 -static ssize_t ad2s1210_show_reg(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - struct iio_dev_attr *iattr =3D to_iio_dev_attr(attr); - unsigned int value; - int ret; - - mutex_lock(&st->lock); - ret =3D regmap_read(st->regmap, iattr->address, &value); - mutex_unlock(&st->lock); - - return ret < 0 ? ret : sprintf(buf, "%d\n", value); -} - -static ssize_t ad2s1210_store_reg(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t len) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - unsigned char data; - int ret; - struct iio_dev_attr *iattr =3D to_iio_dev_attr(attr); - - ret =3D kstrtou8(buf, 10, &data); - if (ret) - return -EINVAL; - - mutex_lock(&st->lock); - ret =3D regmap_write(st->regmap, iattr->address, data); - mutex_unlock(&st->lock); - return ret < 0 ? ret : len; -} - static int ad2s1210_single_conversion(struct ad2s1210_state *st, struct iio_chan_spec const *chan, int *val) @@ -747,13 +712,6 @@ static int ad2s1210_write_raw(struct iio_dev *indio_de= v, static IIO_DEVICE_ATTR(fault, 0644, ad2s1210_show_fault, ad2s1210_clear_fault, 0); =20 -static IIO_DEVICE_ATTR(dos_rst_max_thrd, 0644, - ad2s1210_show_reg, ad2s1210_store_reg, - AD2S1210_REG_DOS_RST_MAX_THRD); -static IIO_DEVICE_ATTR(dos_rst_min_thrd, 0644, - ad2s1210_show_reg, ad2s1210_store_reg, - AD2S1210_REG_DOS_RST_MIN_THRD); - static const struct iio_event_spec ad2s1210_position_event_spec[] =3D { { /* Tracking error exceeds LOT threshold fault. */ @@ -871,8 +829,6 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { =20 static struct attribute *ad2s1210_attributes[] =3D { &iio_dev_attr_fault.dev_attr.attr, - &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr, - &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr, NULL, }; =20 @@ -880,6 +836,49 @@ static const struct attribute_group ad2s1210_attribute= _group =3D { .attrs =3D ad2s1210_attributes, }; =20 +static ssize_t event_attr_voltage_reg_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); + struct iio_dev_attr *iattr =3D to_iio_dev_attr(attr); + unsigned int value; + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_read(st->regmap, iattr->address, &value); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + return sprintf(buf, "%d\n", value * THRESHOLD_MILLIVOLT_PER_LSB); +} + +static ssize_t event_attr_voltage_reg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); + struct iio_dev_attr *iattr =3D to_iio_dev_attr(attr); + u16 data; + int ret; + + ret =3D kstrtou16(buf, 10, &data); + if (ret) + return -EINVAL; + + mutex_lock(&st->lock); + ret =3D regmap_write(st->regmap, iattr->address, + data / THRESHOLD_MILLIVOLT_PER_LSB); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + return len; +} + static ssize_t in_angl1_thresh_rising_value_available_show(struct device *dev, struct device_attribute *attr, @@ -913,6 +912,14 @@ static IIO_CONST_ATTR(in_altvoltage0_thresh_rising_val= ue_available, THRESHOLD_RANGE_STR); static IIO_CONST_ATTR(in_altvoltage0_mag_rising_value_available, THRESHOLD_RANGE_STR); +static IIO_DEVICE_ATTR(in_altvoltage0_mag_rising_reset_max, 0644, + event_attr_voltage_reg_show, event_attr_voltage_reg_store, + AD2S1210_REG_DOS_RST_MAX_THRD); +static IIO_CONST_ATTR(in_altvoltage0_mag_rising_reset_max_available, THRES= HOLD_RANGE_STR); +static IIO_DEVICE_ATTR(in_altvoltage0_mag_rising_reset_min, 0644, + event_attr_voltage_reg_show, event_attr_voltage_reg_store, + AD2S1210_REG_DOS_RST_MIN_THRD); +static IIO_CONST_ATTR(in_altvoltage0_mag_rising_reset_min_available, THRES= HOLD_RANGE_STR); static IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_value_available, 0); static IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_hysteresis_available, 0); =20 @@ -921,6 +928,10 @@ static struct attribute *ad2s1210_event_attributes[] = =3D { &iio_const_attr_in_altvoltage0_thresh_falling_value_available.dev_attr.at= tr, &iio_const_attr_in_altvoltage0_thresh_rising_value_available.dev_attr.att= r, &iio_const_attr_in_altvoltage0_mag_rising_value_available.dev_attr.attr, + &iio_dev_attr_in_altvoltage0_mag_rising_reset_max.dev_attr.attr, + &iio_const_attr_in_altvoltage0_mag_rising_reset_max_available.dev_attr.at= tr, + &iio_dev_attr_in_altvoltage0_mag_rising_reset_min.dev_attr.attr, + &iio_const_attr_in_altvoltage0_mag_rising_reset_min_available.dev_attr.at= tr, &iio_dev_attr_in_angl1_thresh_rising_value_available.dev_attr.attr, &iio_dev_attr_in_angl1_thresh_rising_hysteresis_available.dev_attr.attr, NULL, --=20 2.42.0 From nobody Sat Jan 3 02:07:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C053E92FD0 for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:13 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 12/17] iio: event: add optional event label support Date: Thu, 5 Oct 2023 19:50:29 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-12-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds a new optional field to struct iio_info to allow drivers to specify a label for the event. This is useful for cases where there are many events or the event attribute name is not descriptive enough or where an event doesn't have any other attributes. The implementation is based on the existing label support for channels. So either all events of a device have a label attribute or none do. Signed-off-by: David Lechner --- v4 changes: New patch in v4. drivers/iio/industrialio-event.c | 55 ++++++++++++++++++++++++++++++++++++= ++++ include/linux/iio/iio.h | 8 ++++++ 2 files changed, 63 insertions(+) diff --git a/drivers/iio/industrialio-event.c b/drivers/iio/industrialio-ev= ent.c index 19f7a91157ee..910c1f14abd5 100644 --- a/drivers/iio/industrialio-event.c +++ b/drivers/iio/industrialio-event.c @@ -355,6 +355,21 @@ static ssize_t iio_ev_value_store(struct device *dev, return len; } =20 +static ssize_t iio_ev_label_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct iio_dev *indio_dev =3D dev_to_iio_dev(dev); + struct iio_dev_attr *this_attr =3D to_iio_dev_attr(attr); + + if (indio_dev->info->read_event_label) + return indio_dev->info->read_event_label(indio_dev, + this_attr->c, iio_ev_attr_type(this_attr), + iio_ev_attr_dir(this_attr), buf); + + return -EINVAL; +} + static int iio_device_add_event(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, unsigned int spec_index, enum iio_event_type type, enum iio_event_direction dir, @@ -411,6 +426,41 @@ static int iio_device_add_event(struct iio_dev *indio_= dev, return attrcount; } =20 +static int iio_device_add_event_label(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + unsigned int spec_index, + enum iio_event_type type, + enum iio_event_direction dir) +{ + struct iio_dev_opaque *iio_dev_opaque =3D to_iio_dev_opaque(indio_dev); + char *postfix; + int ret; + + if (!indio_dev->info->read_event_label) + return 0; + + if (dir !=3D IIO_EV_DIR_NONE) + postfix =3D kasprintf(GFP_KERNEL, "%s_%s_label", + iio_ev_type_text[type], + iio_ev_dir_text[dir]); + else + postfix =3D kasprintf(GFP_KERNEL, "%s_label", + iio_ev_type_text[type]); + if (postfix =3D=3D NULL) + return -ENOMEM; + + ret =3D __iio_add_chan_devattr(postfix, chan, &iio_ev_label_show, NULL, + spec_index, IIO_SEPARATE, &indio_dev->dev, NULL, + &iio_dev_opaque->event_interface->dev_attr_list); + + kfree(postfix); + + if (ret < 0) + return ret; + + return 1; +} + static int iio_device_add_event_sysfs(struct iio_dev *indio_dev, struct iio_chan_spec const *chan) { @@ -448,6 +498,11 @@ static int iio_device_add_event_sysfs(struct iio_dev *= indio_dev, if (ret < 0) return ret; attrcount +=3D ret; + + ret =3D iio_device_add_event_label(indio_dev, chan, i, type, dir); + if (ret < 0) + return ret; + attrcount +=3D ret; } ret =3D attrcount; return ret; diff --git a/include/linux/iio/iio.h b/include/linux/iio/iio.h index 7bfa1b9bc8a2..d0ce3b71106a 100644 --- a/include/linux/iio/iio.h +++ b/include/linux/iio/iio.h @@ -427,6 +427,8 @@ struct iio_trigger; /* forward declaration */ * @write_event_config: set if the event is enabled. * @read_event_value: read a configuration value associated with the event. * @write_event_value: write a configuration value for the event. + * @read_event_label: function to request label name for a specified label, + * for better event identification. * @validate_trigger: function to validate the trigger when the * current trigger gets changed. * @update_scan_mode: function to configure device and scan buffer when @@ -511,6 +513,12 @@ struct iio_info { enum iio_event_direction dir, enum iio_event_info info, int val, int val2); =20 + int (*read_event_label)(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + enum iio_event_type type, + enum iio_event_direction dir, + char *label); + int (*validate_trigger)(struct iio_dev *indio_dev, struct iio_trigger *trig); int (*update_scan_mode)(struct iio_dev *indio_dev, --=20 2.42.0 From nobody Sat Jan 3 02:07:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 235B7E92FD1 for ; Fri, 6 Oct 2023 00:51:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229920AbjJFAvp (ORCPT ); Thu, 5 Oct 2023 20:51:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229654AbjJFAvT (ORCPT ); Thu, 5 Oct 2023 20:51:19 -0400 Received: from mail-oa1-x2a.google.com (mail-oa1-x2a.google.com [IPv6:2001:4860:4864:20::2a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1152102 for ; Thu, 5 Oct 2023 17:51:15 -0700 (PDT) Received: by mail-oa1-x2a.google.com with SMTP id 586e51a60fabf-1dceaa7aeffso1417653fac.0 for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:14 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 13/17] staging: iio: resolver: ad2s1210: implement fault events Date: Thu, 5 Oct 2023 19:50:30 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-13-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When reading the position and velocity on the AD2S1210, there is also a 3rd byte following the two data bytes that contains the fault flag bits. This patch adds support for reading this byte and generating events when faults occur. The faults are mapped to various channels and event type in order to have a unique event for each fault. Signed-off-by: David Lechner --- v4 changes: * Added sysfs docs for *_label attributes. * Added implementation of read_event_label. * Dropped use of IIO_MOD_X_OR_Y. * Tweaked event type/direction as in previous patches. * Fixed build error due to st->rx[2]. v3 changes: This is a new patch in v3 Documentation/ABI/testing/sysfs-bus-iio | 15 +++ drivers/staging/iio/resolver/ad2s1210.c | 211 ++++++++++++++++++++++++++++= +--- 2 files changed, 212 insertions(+), 14 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/te= sting/sysfs-bus-iio index 8e13642bbe23..19cde14f3869 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio +++ b/Documentation/ABI/testing/sysfs-bus-iio @@ -2239,3 +2239,18 @@ Contact: linux-iio@vger.kernel.org Description: The x and y light color coordinate on the CIE 1931 chromaticity diagram. + +What: /sys/bus/iio/devices/iio:deviceX/events/in_altvoltageY_mag_either_l= abel +What: /sys/bus/iio/devices/iio:deviceX/events/in_altvoltageY_mag_rising_l= abel +What: /sys/bus/iio/devices/iio:deviceX/events/in_altvoltageY_thresh_falli= ng_label +What: /sys/bus/iio/devices/iio:deviceX/events/in_altvoltageY_thresh_risin= g_label +What: /sys/bus/iio/devices/iio:deviceX/events/in_anglvelY_mag_rising_label +What: /sys/bus/iio/devices/iio:deviceX/events/in_anglY_thresh_rising_label +What: /sys/bus/iio/devices/iio:deviceX/events/in_phaseY_mag_rising_label +KernelVersion: 6.7 +Contact: linux-iio@vger.kernel.org +Description: + Optional symbolic label to a device channel event. + If a label is defined for this event add that to the event + specific attributes. This is useful for userspace to be able to + better identify an individual event. diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 9fac806c2a5f..d9d51bbbade8 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -21,6 +21,7 @@ #include =20 #include +#include #include #include #include @@ -35,6 +36,16 @@ #define AD2S1210_SET_ENRES GENMASK(3, 2) #define AD2S1210_SET_RES GENMASK(1, 0) =20 +/* fault register flags */ +#define AD2S1210_FAULT_CLIP BIT(7) +#define AD2S1210_FAULT_LOS BIT(6) +#define AD2S1210_FAULT_DOS_OVR BIT(5) +#define AD2S1210_FAULT_DOS_MIS BIT(4) +#define AD2S1210_FAULT_LOT BIT(3) +#define AD2S1210_FAULT_VELOCITY BIT(2) +#define AD2S1210_FAULT_PHASE BIT(1) +#define AD2S1210_FAULT_CONFIG_PARITY BIT(0) + #define AD2S1210_REG_POSITION_MSB 0x80 #define AD2S1210_REG_POSITION_LSB 0x81 #define AD2S1210_REG_VELOCITY_MSB 0x82 @@ -71,6 +82,8 @@ /* max voltage for threshold registers is 0x7F * 38 mV */ #define THRESHOLD_RANGE_STR "[0 38 4826]" =20 +#define FAULT_ONESHOT(bit, new, old) (new & bit && !(old & bit)) + enum ad2s1210_mode { MOD_POS =3D 0b00, MOD_VEL =3D 0b01, @@ -100,8 +113,13 @@ struct ad2s1210_state { int hysteresis_available[2]; /** The selected resolution */ enum ad2s1210_resolution resolution; + /** Copy of fault register from the previous read. */ + u8 prev_fault_flags; /** For reading raw sample value via SPI. */ - __be16 sample __aligned(IIO_DMA_MINALIGN); + struct { + __be16 raw; + u8 fault; + } sample __aligned(IIO_DMA_MINALIGN); /** Scan buffer */ struct { __be16 chan[2]; @@ -160,7 +178,15 @@ static int ad2s1210_regmap_reg_write(void *context, un= signed int reg, if (ret < 0) return ret; =20 - return spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers)); + ret =3D spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers)); + if (ret < 0) + return ret; + + /* soft reset also clears the fault register */ + if (reg =3D=3D AD2S1210_REG_SOFT_RESET) + st->prev_fault_flags =3D 0; + + return 0; } =20 /* @@ -203,6 +229,10 @@ static int ad2s1210_regmap_reg_read(void *context, uns= igned int reg, if (ret < 0) return ret; =20 + /* reading the fault register also clears it */ + if (reg =3D=3D AD2S1210_REG_FAULT) + st->prev_fault_flags =3D 0; + /* * If the D7 bit is set on any read/write register, it indicates a * parity error. The fault register is read-only and the D7 bit means @@ -286,14 +316,101 @@ static ssize_t ad2s1210_clear_fault(struct device *d= ev, return ret < 0 ? ret : len; } =20 -static int ad2s1210_single_conversion(struct ad2s1210_state *st, +static void ad2s1210_push_events(struct iio_dev *indio_dev, + u8 flags, s64 timestamp) +{ + struct ad2s1210_state *st =3D iio_priv(indio_dev); + + /* Sine/cosine inputs clipped */ + if (FAULT_ONESHOT(AD2S1210_FAULT_CLIP, flags, st->prev_fault_flags)) { + /* + * The chip does not differentiate between fault on sine vs. + * cosine channel so we just send an event on both channels. + */ + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_ALTVOLTAGE, 1, + IIO_EV_TYPE_MAG, + IIO_EV_DIR_EITHER), + timestamp); + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_ALTVOLTAGE, 2, + IIO_EV_TYPE_MAG, + IIO_EV_DIR_EITHER), + timestamp); + } + + /* Sine/cosine inputs below LOS threshold */ + if (FAULT_ONESHOT(AD2S1210_FAULT_LOS, flags, st->prev_fault_flags)) + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_ALTVOLTAGE, 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_FALLING), + timestamp); + + /* Sine/cosine inputs exceed DOS overrange threshold */ + if (FAULT_ONESHOT(AD2S1210_FAULT_DOS_OVR, flags, st->prev_fault_flags)) + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_ALTVOLTAGE, 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_RISING), + timestamp); + + /* Sine/cosine inputs exceed DOS mismatch threshold */ + if (FAULT_ONESHOT(AD2S1210_FAULT_DOS_MIS, flags, st->prev_fault_flags)) + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_ALTVOLTAGE, 0, + IIO_EV_TYPE_MAG, + IIO_EV_DIR_RISING), + timestamp); + + /* Tracking error exceeds LOT threshold */ + if (FAULT_ONESHOT(AD2S1210_FAULT_LOT, flags, st->prev_fault_flags)) + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_ANGL, 1, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_RISING), + timestamp); + + /* Velocity exceeds maximum tracking rate */ + if (FAULT_ONESHOT(AD2S1210_FAULT_VELOCITY, flags, st->prev_fault_flags)) + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_ANGL_VEL, 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_RISING), + timestamp); + + /* Phase error exceeds phase lock range */ + if (FAULT_ONESHOT(AD2S1210_FAULT_PHASE, flags, st->prev_fault_flags)) + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_PHASE, 0, + IIO_EV_TYPE_MAG, + IIO_EV_DIR_RISING), + timestamp); + + /* Configuration parity error */ + if (FAULT_ONESHOT(AD2S1210_FAULT_CONFIG_PARITY, flags, + st->prev_fault_flags)) + /* + * Userspace should also get notified of this via error return + * when trying to write to any attribute that writes a register. + */ + dev_err_ratelimited(&indio_dev->dev, + "Configuration parity error\n"); + + st->prev_fault_flags =3D flags; +} + +static int ad2s1210_single_conversion(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val) { + struct ad2s1210_state *st =3D iio_priv(indio_dev); + s64 timestamp; int ret; =20 mutex_lock(&st->lock); gpiod_set_value(st->sample_gpio, 1); + timestamp =3D iio_get_time_ns(indio_dev); /* delay (6 * tck + 20) nano seconds */ udelay(1); =20 @@ -310,17 +427,17 @@ static int ad2s1210_single_conversion(struct ad2s1210= _state *st, } if (ret < 0) goto error_ret; - ret =3D spi_read(st->sdev, &st->sample, 2); + ret =3D spi_read(st->sdev, &st->sample, 3); if (ret < 0) goto error_ret; =20 switch (chan->type) { case IIO_ANGL: - *val =3D be16_to_cpu(st->sample); + *val =3D be16_to_cpu(st->sample.raw); ret =3D IIO_VAL_INT; break; case IIO_ANGL_VEL: - *val =3D (s16)be16_to_cpu(st->sample); + *val =3D (s16)be16_to_cpu(st->sample.raw); ret =3D IIO_VAL_INT; break; default: @@ -328,6 +445,8 @@ static int ad2s1210_single_conversion(struct ad2s1210_s= tate *st, break; } =20 + ad2s1210_push_events(indio_dev, st->sample.fault, timestamp); + error_ret: gpiod_set_value(st->sample_gpio, 0); /* delay (2 * tck + 20) nano seconds */ @@ -611,7 +730,7 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev, =20 switch (mask) { case IIO_CHAN_INFO_RAW: - return ad2s1210_single_conversion(st, chan, val); + return ad2s1210_single_conversion(indio_dev, chan, val); case IIO_CHAN_INFO_SCALE: switch (chan->type) { case IIO_ANGL: @@ -725,6 +844,14 @@ static const struct iio_event_spec ad2s1210_position_e= vent_spec[] =3D { }, }; =20 +static const struct iio_event_spec ad2s1210_velocity_event_spec[] =3D { + { + /* Velocity exceeds maximum tracking rate fault. */ + .type =3D IIO_EV_TYPE_MAG, + .dir =3D IIO_EV_DIR_RISING, + }, +}; + static const struct iio_event_spec ad2s1210_phase_event_spec[] =3D { { /* Phase error fault. */ @@ -758,6 +885,14 @@ static const struct iio_event_spec ad2s1210_monitor_si= gnal_event_spec[] =3D { }, }; =20 +static const struct iio_event_spec ad2s1210_sin_cos_event_spec[] =3D { + { + /* Sine/cosine clipping fault. */ + .type =3D IIO_EV_TYPE_MAG, + .dir =3D IIO_EV_DIR_EITHER, + }, +}; + static const struct iio_chan_spec ad2s1210_channels[] =3D { { .type =3D IIO_ANGL, @@ -788,6 +923,8 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { }, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), + .event_spec =3D ad2s1210_velocity_event_spec, + .num_event_specs =3D ARRAY_SIZE(ad2s1210_velocity_event_spec), }, IIO_CHAN_SOFT_TIMESTAMP(2), { @@ -824,6 +961,22 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { .scan_index =3D -1, .event_spec =3D ad2s1210_monitor_signal_event_spec, .num_event_specs =3D ARRAY_SIZE(ad2s1210_monitor_signal_event_spec), + }, { + /* sine input */ + .type =3D IIO_ALTVOLTAGE, + .indexed =3D 1, + .channel =3D 1, + .scan_index =3D -1, + .event_spec =3D ad2s1210_sin_cos_event_spec, + .num_event_specs =3D ARRAY_SIZE(ad2s1210_sin_cos_event_spec), + }, { + /* cosine input */ + .type =3D IIO_ALTVOLTAGE, + .indexed =3D 1, + .channel =3D 2, + .scan_index =3D -1, + .event_spec =3D ad2s1210_sin_cos_event_spec, + .num_event_specs =3D ARRAY_SIZE(ad2s1210_sin_cos_event_spec), }, }; =20 @@ -943,7 +1096,7 @@ static const struct attribute_group ad2s1210_event_att= ribute_group =3D { =20 static int ad2s1210_initial(struct ad2s1210_state *st) { - unsigned char data; + unsigned int data; int ret; =20 mutex_lock(&st->lock); @@ -1043,6 +1196,36 @@ static int ad2s1210_write_event_value(struct iio_dev= *indio_dev, } } =20 +static int ad2s1210_read_event_label(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + enum iio_event_type type, + enum iio_event_direction dir, + char *label) +{ + if (chan->type =3D=3D IIO_ANGL) + return sprintf(label, "LOT\n"); + if (chan->type =3D=3D IIO_ANGL_VEL) + return sprintf(label, "max tracking rate\n"); + if (chan->type =3D=3D IIO_PHASE) + return sprintf(label, "phase lock\n"); + if (chan->type =3D=3D IIO_ALTVOLTAGE) { + if (chan->channel =3D=3D 0) { + if (type =3D=3D IIO_EV_TYPE_THRESH && + dir =3D=3D IIO_EV_DIR_FALLING) + return sprintf(label, "LOS\n"); + if (type =3D=3D IIO_EV_TYPE_THRESH && + dir =3D=3D IIO_EV_DIR_RISING) + return sprintf(label, "DOS overrange\n"); + if (type =3D=3D IIO_EV_TYPE_MAG) + return sprintf(label, "DOS mismatch\n"); + } + if (chan->channel =3D=3D 1 || chan->channel =3D=3D 2) + return sprintf(label, "clipped\n"); + } + + return -EINVAL; +} + static int ad2s1210_debugfs_reg_access(struct iio_dev *indio_dev, unsigned int reg, unsigned int writeval, unsigned int *readval) @@ -1080,12 +1263,11 @@ static irqreturn_t ad2s1210_trigger_handler(int irq= , void *p) if (ret < 0) goto error_ret; =20 - /* REVIST: we can read 3 bytes here and also get fault flags */ - ret =3D spi_read(st->sdev, st->rx, 2); + ret =3D spi_read(st->sdev, &st->sample, 3); if (ret < 0) goto error_ret; =20 - memcpy(&st->scan.chan[chan++], st->rx, 2); + memcpy(&st->scan.chan[chan++], &st->sample.raw, 2); } =20 if (test_bit(1, indio_dev->active_scan_mask)) { @@ -1093,14 +1275,14 @@ static irqreturn_t ad2s1210_trigger_handler(int irq= , void *p) if (ret < 0) goto error_ret; =20 - /* REVIST: we can read 3 bytes here and also get fault flags */ - ret =3D spi_read(st->sdev, st->rx, 2); + ret =3D spi_read(st->sdev, &st->sample, 3); if (ret < 0) goto error_ret; =20 - memcpy(&st->scan.chan[chan++], st->rx, 2); + memcpy(&st->scan.chan[chan++], &st->sample.raw, 2); } =20 + ad2s1210_push_events(indio_dev, st->sample.fault, pf->timestamp); iio_push_to_buffers_with_timestamp(indio_dev, &st->scan, pf->timestamp); =20 error_ret: @@ -1119,6 +1301,7 @@ static const struct iio_info ad2s1210_info =3D { .attrs =3D &ad2s1210_attribute_group, .read_event_value =3D ad2s1210_read_event_value, .write_event_value =3D ad2s1210_write_event_value, + .read_event_label =3D ad2s1210_read_event_label, .debugfs_reg_access =3D &ad2s1210_debugfs_reg_access, }; =20 --=20 2.42.0 From nobody Sat Jan 3 02:07:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62768E92FD0 for ; Fri, 6 Oct 2023 00:52:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229929AbjJFAwB (ORCPT ); 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:15 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 14/17] staging: iio: resolver: ad2s1210: add register/fault support summary Date: Thu, 5 Oct 2023 19:50:31 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-14-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The ad2s1210 driver shoe-horns the register and fault support into IIO events. The mapping between the registers/faults and the events is not obvious. To save users from having to read the entire driver to figure out how to use it, add a summary of the register/fault support to the top of the file. Signed-off-by: David Lechner --- v4 changes: New patch in v4. drivers/staging/iio/resolver/ad2s1210.c | 40 +++++++++++++++++++++++++++++= ++++ 1 file changed, 40 insertions(+) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index d9d51bbbade8..51490fea1647 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -4,7 +4,47 @@ * * Copyright (c) 2010-2010 Analog Devices Inc. * Copyright (c) 2023 BayLibre, SAS + * + * Device register to IIO ABI mapping: + * + * Register | Addr | IIO ABI (sysfs) + * ----------------------------|------|-----------------------------------= -------- + * DOS Overrange Threshold | 0x89 | events/in_altvoltage0_thresh_risin= g_value + * DOS Mismatch Threshold | 0x8A | events/in_altvoltage0_mag_rising_v= alue + * DOS Reset Maximum Threshold | 0x8B | events/in_altvoltage0_mag_rising_r= eset_max + * DOS Reset Minimum Threshold | 0x8C | events/in_altvoltage0_mag_rising_r= eset_min + * LOT High Threshold | 0x8D | events/in_angl1_thresh_rising_value + * LOT Low Threshold [1] | 0x8E | events/in_angl1_thresh_rising_hyst= eresis + * Excitation Frequency | 0x91 | out_altvoltage0_frequency + * Control | 0x92 | *as bit fields* + * Phase lock range | D5 | events/in_phase0_mag_rising_value + * Hysteresis | D4 | in_angl0_hysteresis + * Encoder resolution | D3:2 | *not implemented* + * Resolution | D1:0 | *device tree: assigned-resolution-= bits* + * Soft Reset | 0xF0 | [2] + * Fault | 0xFF | *not implemented* + * + * [1]: The value written to the LOT low register is high value minus the + * hysteresis. + * [2]: Soft reset is performed when `out_altvoltage0_frequency` is writte= n. + * + * Fault to event mapping: + * + * Fault | | Channel | Type | D= irection + * ----------------------------------------|----|-------------------------= -------- + * Sine/cosine inputs clipped [3] | D7 | altvoltage1 | mag | e= ither + * Sine/cosine inputs below LOS | D6 | altvoltage0 | thresh | f= alling + * Sine/cosine inputs exceed DOS overrange | D5 | altvoltage0 | thresh | r= ising + * Sine/cosine inputs exceed DOS mismatch | D4 | altvoltage0 | mag | r= ising + * Tracking error exceeds LOT | D3 | angl1 | thresh | r= ising + * Velocity exceeds maximum tracking rate | D2 | anglvel0 | mag | r= ising + * Phase error exceeds phase lock range | D1 | phase0 | mag | r= ising + * Configuration parity error | D0 | *writes to kernel log* + * + * [3]: The chip does not differentiate between fault on sine vs. cosine so + * there will also be an event on the altvoltage2 channel. */ + #include #include #include --=20 2.42.0 From nobody Sat Jan 3 02:07:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A58CE92FD1 for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:16 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 15/17] staging: iio: resolver: ad2s1210: add label attribute support Date: Thu, 5 Oct 2023 19:50:32 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-15-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The ad2s1210 resolver driver has quite a few channels, mostly for internal signals for event support. This makes it difficult to know which channel is which. This patch adds a label attribute to the channels to make it easier to identify them. Signed-off-by: David Lechner --- v4 changes: * Adjusted for channel rearrangement in previous patches. v3 changes: This is a new patch in v3 drivers/staging/iio/resolver/ad2s1210.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 51490fea1647..59c8eed26701 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -1158,6 +1158,34 @@ static int ad2s1210_initial(struct ad2s1210_state *s= t) return ret; } =20 +static int ad2s1210_read_label(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + char *label) +{ + if (chan->type =3D=3D IIO_ANGL) { + if (chan->channel =3D=3D 0) + return sprintf(label, "position\n"); + if (chan->channel =3D=3D 1) + return sprintf(label, "tracking error\n"); + } + if (chan->type =3D=3D IIO_ANGL_VEL) + return sprintf(label, "velocity\n"); + if (chan->type =3D=3D IIO_PHASE) + return sprintf(label, "synthetic reference\n"); + if (chan->type =3D=3D IIO_ALTVOLTAGE) { + if (chan->output) + return sprintf(label, "excitation\n"); + if (chan->channel =3D=3D 0) + return sprintf(label, "monitor signal\n"); + if (chan->channel =3D=3D 1) + return sprintf(label, "cosine\n"); + if (chan->channel =3D=3D 2) + return sprintf(label, "sine\n"); + } + + return -EINVAL; +} + static int ad2s1210_read_event_value(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, @@ -1338,6 +1366,7 @@ static const struct iio_info ad2s1210_info =3D { .read_raw =3D ad2s1210_read_raw, .read_avail =3D ad2s1210_read_avail, .write_raw =3D ad2s1210_write_raw, + .read_label =3D ad2s1210_read_label, .attrs =3D &ad2s1210_attribute_group, .read_event_value =3D ad2s1210_read_event_value, .write_event_value =3D ad2s1210_write_event_value, --=20 2.42.0 From nobody Sat Jan 3 02:07:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9ACF6E92FD1 for ; Fri, 6 Oct 2023 00:52:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229720AbjJFAwM (ORCPT ); Thu, 5 Oct 2023 20:52:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229785AbjJFAvW (ORCPT ); Thu, 5 Oct 2023 20:51:22 -0400 Received: from mail-oa1-x34.google.com (mail-oa1-x34.google.com [IPv6:2001:4860:4864:20::34]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3C922D8 for ; Thu, 5 Oct 2023 17:51:18 -0700 (PDT) Received: by mail-oa1-x34.google.com with SMTP id 586e51a60fabf-1e1e25ab32bso1036305fac.1 for ; Thu, 05 Oct 2023 17:51:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1696553477; x=1697158277; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vIyovCBkjoJ0e3i6Eyil7FW0dowEMhYVcRMjTAbJ5NA=; b=2UabR1QVj3rn88Z/sxD20RAIx0E85cG926So6X+XYEKUBx3gsjlsNHAi5nacRULGAP 4PKKUR3LdVEnNWsj6MD/ky4GGEcym1EC3NvWnEE/GVUaipAYPfTKml7RPi53/wX+qeAg hL+Txc55bE2ISW2MRJBlpOVcoytdk+AP40S9qZVBRwWxXHrIYNLKvA5FuW7rXKMqG3Wx xl1+iebdIm/OfWx6eLM109PAGqHXxOJDrZkyemJzLdAPguCQX7H2Www1WH9giKEqLMgw +iYE3sixMB2g14j7o0CngMmWs/qiIgHFRP5YECjQ6LrRMH4a4URFB311RMhF0Yph2Q1p ycFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696553477; x=1697158277; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vIyovCBkjoJ0e3i6Eyil7FW0dowEMhYVcRMjTAbJ5NA=; b=eXbgTgriNHjPKdQOi9WSkSiJzH35e3ztjPGn9s/imJyu0a+tt4Zp6nOK5+a72hlzJ9 u9+OKymZYtg3Z7NEY9rPjY+C+aE6MzD/Jd/+Od+dZPQyUKLENgr3oNlwdydBFfBWv6NT EdQBOLYZ6AR5LSXLIH+WmciMshvzYQucxSA1oQ4r9WTjgl/MIqaQl828qXjvfchH89Z6 xG6eSttLvJZ1kzlseehjzWibJk6ggqe+X85fl47tkmcfiPDM5RyuUePsUvdArX2HjYKP Ny5iHeXe0GOXyP4knp1BeBJQaRKqCJ5Bh5tu9zCX/pRpxCiMzE/FozM2tF7gTCM0u4Z0 EjOg== X-Gm-Message-State: AOJu0Yy5T8K0n+Yd1epoNUKIiap0U54g+ZBTp2G3BIUMNqx/O8P+EyQF EVgenyiwO7+43NoLCDrIr8LhNQ== X-Google-Smtp-Source: AGHT+IFWe2/rG+yD9m1MnCeKecTm5lv5mdKxJ8Rv7DnRbl13JdS2N8dmdzj4jluk7YSpkEA1rBeQlw== X-Received: by 2002:a05:6870:4347:b0:1bb:84af:bf8f with SMTP id x7-20020a056870434700b001bb84afbf8fmr7694280oah.58.1696553477237; Thu, 05 Oct 2023 17:51:17 -0700 (PDT) Received: from freyr.lechnology.com (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:16 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 16/17] staging: iio: resolver: ad2s1210: remove fault attribute Date: Thu, 5 Oct 2023 19:50:33 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-16-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Faults have been converted to events and we are now polling the fault register each time we read a sample, so we no longer need the fault attribute. This attribute was not suitable for promotion out of staging anyway since it was returning multiple values in a single attribute. The fault clearing feature should not be needed unless we need to support the fault output pins on the chip which is not currently supported. So we can add this feature back in if we need it later. Signed-off-by: David Lechner --- v4 changes: New patch in v4. drivers/staging/iio/resolver/ad2s1210.c | 57 -----------------------------= ---- 1 file changed, 57 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 59c8eed26701..c4e1bc22e8b0 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -312,50 +312,6 @@ static int ad2s1210_reinit_excitation_frequency(struct= ad2s1210_state *st, return regmap_write(st->regmap, AD2S1210_REG_SOFT_RESET, 0); } =20 -/* read the fault register since last sample */ -static ssize_t ad2s1210_show_fault(struct device *dev, - struct device_attribute *attr, char *buf) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - unsigned int value; - int ret; - - mutex_lock(&st->lock); - ret =3D regmap_read(st->regmap, AD2S1210_REG_FAULT, &value); - mutex_unlock(&st->lock); - - return ret < 0 ? ret : sprintf(buf, "0x%02x\n", value); -} - -static ssize_t ad2s1210_clear_fault(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - unsigned int value; - int ret; - - mutex_lock(&st->lock); - - gpiod_set_value(st->sample_gpio, 1); - /* delay (2 * tck + 20) nano seconds */ - udelay(1); - gpiod_set_value(st->sample_gpio, 0); - - ret =3D regmap_read(st->regmap, AD2S1210_REG_FAULT, &value); - if (ret < 0) - goto error_ret; - - gpiod_set_value(st->sample_gpio, 1); - gpiod_set_value(st->sample_gpio, 0); - -error_ret: - mutex_unlock(&st->lock); - - return ret < 0 ? ret : len; -} - static void ad2s1210_push_events(struct iio_dev *indio_dev, u8 flags, s64 timestamp) { @@ -868,9 +824,6 @@ static int ad2s1210_write_raw(struct iio_dev *indio_dev, } } =20 -static IIO_DEVICE_ATTR(fault, 0644, - ad2s1210_show_fault, ad2s1210_clear_fault, 0); - static const struct iio_event_spec ad2s1210_position_event_spec[] =3D { { /* Tracking error exceeds LOT threshold fault. */ @@ -1020,15 +973,6 @@ static const struct iio_chan_spec ad2s1210_channels[]= =3D { }, }; =20 -static struct attribute *ad2s1210_attributes[] =3D { - &iio_dev_attr_fault.dev_attr.attr, - NULL, -}; - -static const struct attribute_group ad2s1210_attribute_group =3D { - .attrs =3D ad2s1210_attributes, -}; - static ssize_t event_attr_voltage_reg_show(struct device *dev, struct device_attribute *attr, char *buf) @@ -1367,7 +1311,6 @@ static const struct iio_info ad2s1210_info =3D { .read_avail =3D ad2s1210_read_avail, .write_raw =3D ad2s1210_write_raw, .read_label =3D ad2s1210_read_label, - .attrs =3D &ad2s1210_attribute_group, .read_event_value =3D ad2s1210_read_event_value, .write_event_value =3D ad2s1210_write_event_value, .read_event_label =3D ad2s1210_read_event_label, --=20 2.42.0 From nobody Sat Jan 3 02:07:37 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 501E4E92FD0 for ; Fri, 6 Oct 2023 00:52:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229863AbjJFAwZ (ORCPT ); Thu, 5 Oct 2023 20:52:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55596 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229883AbjJFAvc (ORCPT ); Thu, 5 Oct 2023 20:51:32 -0400 Received: from mail-ot1-x336.google.com (mail-ot1-x336.google.com [IPv6:2607:f8b0:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD930126 for ; Thu, 5 Oct 2023 17:51:19 -0700 (PDT) Received: by mail-ot1-x336.google.com with SMTP id 46e09a7af769-6c4b9e09521so1035678a34.3 for ; Thu, 05 Oct 2023 17:51:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1696553478; x=1697158278; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bvy2ayD735MSl5ZTX0UlQERY4ZoXQRp7gkWExI7lVYw=; b=1U2OiZOkF5GlWMVZzavEG5oq8tliFyjyI6dj1iwtBkZvYR7qACJDjpxPL1RXTg0QDK 7oeWTT5D1JPFihKbVj5cRkQ+kn6tezmNhT20J0CTEjd7R5Z7G9x3HTy08xne977b/P+A 8/QozdsQ3xTX/99/DC3gIwahN2uIsy1msYln+up472wyZXZZsiHcrmAzjcxVf7a6mNdW 7fjWCj9aR9+Nl7P8gJTflvXS7a/VusYuJdig/ARhUH9RzUOd5KOHPYvWQltV2KHXDmuB chPIvgEZv0l8pGODXJQ7Mz/bc0WB8zJDPjXCv2RVScKUxx7ymSYt0CYU7UdPwmt3O/+Q sX/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696553478; x=1697158278; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bvy2ayD735MSl5ZTX0UlQERY4ZoXQRp7gkWExI7lVYw=; b=hwIURt5wFbI6qv4AvghLhQkqzEGr8Pg97AslIH0hwnRoIiTEQPCAom42ZY3u9Gw+v3 8MaRy46v1sLbn1ISN84xBNS+Di5KECnrSM37FCAy+WkhVmMgZ1ryuV+JmG+4SLBdL3Op WOwBwDPJky1jc41i2O7AbrO9H3ME/B1+u9HMQEPItLLTJLMkoHn0wFsbOzuGBpnoK/tY o/QxnY+DMaElcEsXFa9f9xalDtW07eZgn8xz8lPcAeydAM0Pjjw59jiOmYF176UavN0v Gl/u3rICttMGZNMnIf+OOTdzHfKKO2HFSBNesmOmjcNb++WoritDka4pfNCKZUGG0d6m qifw== X-Gm-Message-State: AOJu0YzJkgAM6sbzWATodoZjEu54I6s/Ue+ok7F+QJ7cyzVtUOuLfdWi eaOsHyuCOE3lrFO88bl2KKn8lA== X-Google-Smtp-Source: AGHT+IHETgGeqGZSvktD/tKU7BzXYk2Is2jzn6GMo6B98IovaMoUy/6NXzQov+m+TDvrTga6TxDudg== X-Received: by 2002:a05:6870:d188:b0:1d5:3fd3:390a with SMTP id a8-20020a056870d18800b001d53fd3390amr7418497oac.49.1696553477962; Thu, 05 Oct 2023 17:51:17 -0700 (PDT) Received: from freyr.lechnology.com (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id mo9-20020a056871320900b001dd0ff401edsm545072oac.51.2023.10.05.17.51.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Oct 2023 17:51:17 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: [PATCH v4 17/17] staging: iio: resolver: ad2s1210: simplify code with guard(mutex) Date: Thu, 5 Oct 2023 19:50:34 -0500 Message-ID: <20231005-ad2s1210-mainline-v4-17-ec00746840fc@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We can simplify the code and get rid of most of the gotos by using guard(mutex) from cleanup.h. Signed-off-by: David Lechner --- v4 changes: New patch in v4. drivers/staging/iio/resolver/ad2s1210.c | 157 ++++++++++------------------= ---- 1 file changed, 50 insertions(+), 107 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index c4e1bc22e8b0..c4e0ffa92dc2 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -47,6 +47,7 @@ =20 #include #include +#include #include #include #include @@ -404,11 +405,13 @@ static int ad2s1210_single_conversion(struct iio_dev = *indio_dev, s64 timestamp; int ret; =20 - mutex_lock(&st->lock); + guard(mutex)(&st->lock); + gpiod_set_value(st->sample_gpio, 1); timestamp =3D iio_get_time_ns(indio_dev); /* delay (6 * tck + 20) nano seconds */ udelay(1); + gpiod_set_value(st->sample_gpio, 0); =20 switch (chan->type) { case IIO_ANGL: @@ -418,14 +421,13 @@ static int ad2s1210_single_conversion(struct iio_dev = *indio_dev, ret =3D ad2s1210_set_mode(st, MOD_VEL); break; default: - ret =3D -EINVAL; - break; + return -EINVAL; } if (ret < 0) - goto error_ret; + return ret; ret =3D spi_read(st->sdev, &st->sample, 3); if (ret < 0) - goto error_ret; + return ret; =20 switch (chan->type) { case IIO_ANGL: @@ -437,17 +439,11 @@ static int ad2s1210_single_conversion(struct iio_dev = *indio_dev, ret =3D IIO_VAL_INT; break; default: - ret =3D -EINVAL; - break; + return -EINVAL; } =20 ad2s1210_push_events(indio_dev, st->sample.fault, timestamp); =20 -error_ret: - gpiod_set_value(st->sample_gpio, 0); - /* delay (2 * tck + 20) nano seconds */ - udelay(1); - mutex_unlock(&st->lock); return ret; } =20 @@ -455,11 +451,9 @@ static int ad2s1210_get_hysteresis(struct ad2s1210_sta= te *st, int *val) { int ret; =20 - mutex_lock(&st->lock); + guard(mutex)(&st->lock); ret =3D regmap_test_bits(st->regmap, AD2S1210_REG_CONTROL, AD2S1210_ENABLE_HYSTERESIS); - mutex_unlock(&st->lock); - if (ret < 0) return ret; =20 @@ -469,15 +463,10 @@ static int ad2s1210_get_hysteresis(struct ad2s1210_st= ate *st, int *val) =20 static int ad2s1210_set_hysteresis(struct ad2s1210_state *st, int val) { - int ret; - - mutex_lock(&st->lock); - ret =3D regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL, - AD2S1210_ENABLE_HYSTERESIS, - val ? AD2S1210_ENABLE_HYSTERESIS : 0); - mutex_unlock(&st->lock); - - return ret; + guard(mutex)(&st->lock); + return regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL, + AD2S1210_ENABLE_HYSTERESIS, + val ? AD2S1210_ENABLE_HYSTERESIS : 0); } =20 static int ad2s1210_get_phase_lock_range(struct ad2s1210_state *st, @@ -485,11 +474,9 @@ static int ad2s1210_get_phase_lock_range(struct ad2s12= 10_state *st, { int ret; =20 - mutex_lock(&st->lock); + guard(mutex)(&st->lock); ret =3D regmap_test_bits(st->regmap, AD2S1210_REG_CONTROL, AD2S1210_PHASE_LOCK_RANGE_44); - mutex_unlock(&st->lock); - if (ret < 0) return ret; =20 @@ -509,7 +496,7 @@ static int ad2s1210_get_phase_lock_range(struct ad2s121= 0_state *st, static int ad2s1210_set_phase_lock_range(struct ad2s1210_state *st, int val, int val2) { - int deg, ret; + int deg; =20 /* convert radians to degrees - only two allowable values */ if (val =3D=3D PHASE_44_DEG_TO_RAD_INT && val2 =3D=3D PHASE_44_DEG_TO_RAD= _MICRO) @@ -520,12 +507,10 @@ static int ad2s1210_set_phase_lock_range(struct ad2s1= 210_state *st, else return -EINVAL; =20 - mutex_lock(&st->lock); - ret =3D regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL, - AD2S1210_PHASE_LOCK_RANGE_44, - deg =3D=3D 44 ? AD2S1210_PHASE_LOCK_RANGE_44 : 0); - mutex_unlock(&st->lock); - return ret; + guard(mutex)(&st->lock); + return regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL, + AD2S1210_PHASE_LOCK_RANGE_44, + deg =3D=3D 44 ? AD2S1210_PHASE_LOCK_RANGE_44 : 0); } =20 /* map resolution to microradians/LSB for LOT registers */ @@ -542,10 +527,8 @@ static int ad2s1210_get_voltage_threshold(struct ad2s1= 210_state *st, unsigned int reg_val; int ret; =20 - mutex_lock(&st->lock); + guard(mutex)(&st->lock); ret =3D regmap_read(st->regmap, reg, ®_val); - mutex_unlock(&st->lock); - if (ret < 0) return ret; =20 @@ -557,15 +540,11 @@ static int ad2s1210_set_voltage_threshold(struct ad2s= 1210_state *st, unsigned int reg, int val) { unsigned int reg_val; - int ret; =20 reg_val =3D val / THRESHOLD_MILLIVOLT_PER_LSB; =20 - mutex_lock(&st->lock); - ret =3D regmap_write(st->regmap, reg, reg_val); - mutex_unlock(&st->lock); - - return ret; + guard(mutex)(&st->lock); + return regmap_write(st->regmap, reg, reg_val); } =20 static int ad2s1210_get_lot_high_threshold(struct ad2s1210_state *st, @@ -574,10 +553,8 @@ static int ad2s1210_get_lot_high_threshold(struct ad2s= 1210_state *st, unsigned int reg_val; int ret; =20 - mutex_lock(&st->lock); + guard(mutex)(&st->lock); ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, ®_val); - mutex_unlock(&st->lock); - if (ret < 0) return ret; =20 @@ -596,18 +573,18 @@ static int ad2s1210_set_lot_high_threshold(struct ad2= s1210_state *st, if (val !=3D 0) return -EINVAL; =20 - mutex_lock(&st->lock); + guard(mutex)(&st->lock); /* * We need to read both high and low registers first so we can preserve * the hysteresis. */ ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, &high_reg_val= ); if (ret < 0) - goto error_ret; + return ret; =20 ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_LOW_THRD, &low_reg_val); if (ret < 0) - goto error_ret; + return ret; =20 hysteresis =3D high_reg_val - low_reg_val; high_reg_val =3D val2 / ad2s1210_lot_threshold_urad_per_lsb[st->resolutio= n]; @@ -615,14 +592,9 @@ static int ad2s1210_set_lot_high_threshold(struct ad2s= 1210_state *st, =20 ret =3D regmap_write(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, high_reg_val= ); if (ret < 0) - goto error_ret; - - ret =3D regmap_write(st->regmap, AD2S1210_REG_LOT_LOW_THRD, low_reg_val); - -error_ret: - mutex_unlock(&st->lock); + return ret; =20 - return ret; + return regmap_write(st->regmap, AD2S1210_REG_LOT_LOW_THRD, low_reg_val); } =20 static int ad2s1210_get_lot_low_threshold(struct ad2s1210_state *st, @@ -631,16 +603,13 @@ static int ad2s1210_get_lot_low_threshold(struct ad2s= 1210_state *st, unsigned int high_reg_val, low_reg_val; int ret; =20 - mutex_lock(&st->lock); + guard(mutex)(&st->lock); + ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, &high_reg_val= ); if (ret < 0) - goto error_ret; + return ret; =20 ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_LOW_THRD, &low_reg_val); - -error_ret: - mutex_unlock(&st->lock); - if (ret < 0) return ret; =20 @@ -663,18 +632,14 @@ static int ad2s1210_set_lot_low_threshold(struct ad2s= 1210_state *st, =20 hysteresis =3D val2 / ad2s1210_lot_threshold_urad_per_lsb[st->resolution]; =20 - mutex_lock(&st->lock); + guard(mutex)(&st->lock); + ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, ®_val); if (ret < 0) - goto error_ret; + return ret; =20 - ret =3D regmap_write(st->regmap, AD2S1210_REG_LOT_LOW_THRD, + return regmap_write(st->regmap, AD2S1210_REG_LOT_LOW_THRD, reg_val - hysteresis); - -error_ret: - mutex_unlock(&st->lock); - - return ret; } =20 static int ad2s1210_get_excitation_frequency(struct ad2s1210_state *st, in= t *val) @@ -682,31 +647,23 @@ static int ad2s1210_get_excitation_frequency(struct a= d2s1210_state *st, int *val unsigned int reg_val; int ret; =20 - mutex_lock(&st->lock); + guard(mutex)(&st->lock); + ret =3D regmap_read(st->regmap, AD2S1210_REG_EXCIT_FREQ, ®_val); if (ret < 0) - goto error_ret; + return ret; =20 *val =3D reg_val * st->clkin_hz / (1 << 15); - ret =3D IIO_VAL_INT; - -error_ret: - mutex_unlock(&st->lock); - return ret; + return IIO_VAL_INT; } =20 static int ad2s1210_set_excitation_frequency(struct ad2s1210_state *st, in= t val) { - int ret; - if (val < AD2S1210_MIN_EXCIT || val > AD2S1210_MAX_EXCIT) return -EINVAL; =20 - mutex_lock(&st->lock); - ret =3D ad2s1210_reinit_excitation_frequency(st, val); - mutex_unlock(&st->lock); - - return ret; + guard(mutex)(&st->lock); + return ad2s1210_reinit_excitation_frequency(st, val); } =20 static const int ad2s1210_velocity_scale[] =3D { @@ -982,10 +939,8 @@ static ssize_t event_attr_voltage_reg_show(struct devi= ce *dev, unsigned int value; int ret; =20 - mutex_lock(&st->lock); + guard(mutex)(&st->lock); ret =3D regmap_read(st->regmap, iattr->address, &value); - mutex_unlock(&st->lock); - if (ret < 0) return ret; =20 @@ -1005,11 +960,9 @@ static ssize_t event_attr_voltage_reg_store(struct de= vice *dev, if (ret) return -EINVAL; =20 - mutex_lock(&st->lock); + guard(mutex)(&st->lock); ret =3D regmap_write(st->regmap, iattr->address, data / THRESHOLD_MILLIVOLT_PER_LSB); - mutex_unlock(&st->lock); - if (ret < 0) return ret; =20 @@ -1083,7 +1036,7 @@ static int ad2s1210_initial(struct ad2s1210_state *st) unsigned int data; int ret; =20 - mutex_lock(&st->lock); + guard(mutex)(&st->lock); =20 /* Use default config register value plus resolution from devicetree. */ data =3D FIELD_PREP(AD2S1210_PHASE_LOCK_RANGE_44, 1); @@ -1093,13 +1046,9 @@ static int ad2s1210_initial(struct ad2s1210_state *s= t) =20 ret =3D regmap_write(st->regmap, AD2S1210_REG_CONTROL, data); if (ret < 0) - goto error_ret; - - ret =3D ad2s1210_reinit_excitation_frequency(st, AD2S1210_DEF_EXCIT); + return ret; =20 -error_ret: - mutex_unlock(&st->lock); - return ret; + return ad2s1210_reinit_excitation_frequency(st, AD2S1210_DEF_EXCIT); } =20 static int ad2s1210_read_label(struct iio_dev *indio_dev, @@ -1243,18 +1192,13 @@ static int ad2s1210_debugfs_reg_access(struct iio_d= ev *indio_dev, unsigned int *readval) { struct ad2s1210_state *st =3D iio_priv(indio_dev); - int ret; =20 - mutex_lock(&st->lock); + guard(mutex)(&st->lock); =20 if (readval) - ret =3D regmap_read(st->regmap, reg, readval); - else - ret =3D regmap_write(st->regmap, reg, writeval); - - mutex_unlock(&st->lock); + return regmap_read(st->regmap, reg, readval); =20 - return ret; + return regmap_write(st->regmap, reg, writeval); } =20 static irqreturn_t ad2s1210_trigger_handler(int irq, void *p) @@ -1265,7 +1209,7 @@ static irqreturn_t ad2s1210_trigger_handler(int irq, = void *p) size_t chan =3D 0; int ret; =20 - mutex_lock(&st->lock); + guard(mutex)(&st->lock); =20 memset(&st->scan, 0, sizeof(st->scan)); gpiod_set_value(st->sample_gpio, 1); @@ -1299,7 +1243,6 @@ static irqreturn_t ad2s1210_trigger_handler(int irq, = void *p) =20 error_ret: gpiod_set_value(st->sample_gpio, 0); - mutex_unlock(&st->lock); iio_trigger_notify_done(indio_dev->trig); =20 return IRQ_HANDLED; --=20 2.42.0