From nobody Thu Dec 18 08:37:43 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FD30E7AD60 for ; Tue, 3 Oct 2023 14:52:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240301AbjJCOwU (ORCPT ); Tue, 3 Oct 2023 10:52:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240249AbjJCOvl (ORCPT ); Tue, 3 Oct 2023 10:51:41 -0400 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 53B76DC for ; Tue, 3 Oct 2023 07:51:38 -0700 (PDT) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-4066692ad35so9894685e9.1 for ; Tue, 03 Oct 2023 07:51:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20230601.gappssmtp.com; s=20230601; t=1696344696; x=1696949496; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bqqnOvKvXDp4MSe7jhplDhHv0MUiBDnh5IiTR46rq2A=; b=Gzf7Men2nVKsOP/fL2iY9puZLSOcLSbXPI4mAvN0FKKv6LCZ6hpvWigNyl/EWUlRaA H60VzpHjdHzM454nISGVY7mCPAOTN/4TJHwUZv5yLn0dukS9CxFopHjqGJJzD3v2GbO9 ijUb23BeMuAk8RIiw+SbhqqJpuF8gWntazBJ0iHkj14bwr49eD3nNtHZN3pLMPukB8Ai 9fqWdefRdLvJqJRtAXz8OOnyLGlxtEB3/0wdWAUAMbDaXxFHV0M45K7qnXymHom7y7DX 7OO1M9BMeLIPDZN7Dpcb5tREHneTPS1Z212P/+snNHHBqJ/QN+Go5GDlhHRr6OkVVwo6 YdOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696344696; x=1696949496; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bqqnOvKvXDp4MSe7jhplDhHv0MUiBDnh5IiTR46rq2A=; b=scDGOrlqzFanqFSIFrLe7Iq2vQ7aSOjo3mbaluflJ2giwHMNbT8RDCGgxUPJzp84Rz yS7Z2u1SFQHsgZdWCxHdB/rrah8qZGTZZzMFZS8uxfnbZ0a1R0bOrRwQGwqvKNGHIS0u Zl9p3i5PYpIvtvu7KsU5yT62c5ntABatbOVBsXtooC2win9cBVEgop+7k1vjRQhkNxNP 8/olFi1RQzKvsBQMhabJgfoy/kYDY55BhoImHdFE26++4quG9YjVI7fVsiZyYRtWbfBq Mg0jTebQU1QE1U9kzbw0oXGHLpRd/KGWgn/Y8jRiz5xzmlUdvlNORVpYYp9RYy23gj0a 5HNA== X-Gm-Message-State: AOJu0Yx07BpABEUIcQHz9IcrzlfvBZQN2XNjYrol9sXxcXzbKucUrNJM z+OhGxZc8JBybfk5WPjq/3UpZQ== X-Google-Smtp-Source: AGHT+IFnlOwLrQQ9qokqmc7bFZCQ5YA43OcLjE3hejUjE/x2JsMW8rvflYJmqgZ+/wOccZYbGAvvvA== X-Received: by 2002:a05:600c:2303:b0:405:dbe2:df10 with SMTP id 3-20020a05600c230300b00405dbe2df10mr12537741wmo.35.1696344696539; Tue, 03 Oct 2023 07:51:36 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:1f2d:3479:a5de:fa35]) by smtp.gmail.com with ESMTPSA id c15-20020a05600c0acf00b003fe29f6b61bsm1462773wmr.46.2023.10.03.07.51.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Oct 2023 07:51:36 -0700 (PDT) From: Bartosz Golaszewski To: Linus Walleij , Andy Shevchenko Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski , Viresh Kumar , Shiraz Hashim , soc@kernel.org Subject: [PATCH 17/36] pinctrl: spear: use new pinctrl GPIO helpers Date: Tue, 3 Oct 2023 16:50:55 +0200 Message-Id: <20231003145114.21637-18-brgl@bgdev.pl> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231003145114.21637-1-brgl@bgdev.pl> References: <20231003145114.21637-1-brgl@bgdev.pl> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Bartosz Golaszewski Replace the pinctrl helpers taking the global GPIO number as argument with the improved variants that instead take a pointer to the GPIO chip and the controller-relative offset. Signed-off-by: Bartosz Golaszewski Acked-by: Viresh Kumar --- drivers/pinctrl/spear/pinctrl-plgpio.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/spear/pinctrl-plgpio.c b/drivers/pinctrl/spear= /pinctrl-plgpio.c index 722681e0b89b..7488f6394318 100644 --- a/drivers/pinctrl/spear/pinctrl-plgpio.c +++ b/drivers/pinctrl/spear/pinctrl-plgpio.c @@ -204,14 +204,13 @@ static void plgpio_set_value(struct gpio_chip *chip, = unsigned offset, int value) static int plgpio_request(struct gpio_chip *chip, unsigned offset) { struct plgpio *plgpio =3D gpiochip_get_data(chip); - int gpio =3D chip->base + offset; unsigned long flags; int ret =3D 0; =20 if (offset >=3D chip->ngpio) return -EINVAL; =20 - ret =3D pinctrl_gpio_request(gpio); + ret =3D pinctrl_gpio_request_new(chip, offset); if (ret) return ret; =20 @@ -249,14 +248,13 @@ static int plgpio_request(struct gpio_chip *chip, uns= igned offset) if (!IS_ERR(plgpio->clk)) clk_disable(plgpio->clk); err0: - pinctrl_gpio_free(gpio); + pinctrl_gpio_free_new(chip, offset); return ret; } =20 static void plgpio_free(struct gpio_chip *chip, unsigned offset) { struct plgpio *plgpio =3D gpiochip_get_data(chip); - int gpio =3D chip->base + offset; unsigned long flags; =20 if (offset >=3D chip->ngpio) @@ -280,7 +278,7 @@ static void plgpio_free(struct gpio_chip *chip, unsigne= d offset) if (!IS_ERR(plgpio->clk)) clk_disable(plgpio->clk); =20 - pinctrl_gpio_free(gpio); + pinctrl_gpio_free_new(chip, offset); } =20 /* PLGPIO IRQ */ --=20 2.39.2