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([2400:4050:c3e1:100:7ab1:199:d138:f054]) by smtp.gmail.com with ESMTPSA id mg11-20020a17090b370b00b002609cadc56esm5278319pjb.11.2023.10.01.19.17.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Oct 2023 19:17:19 -0700 (PDT) From: AKASHI Takahiro To: sudeep.holla@arm.com, cristian.marussi@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linus.walleij@linaro.org Cc: Oleksii_Moisieiev@epam.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, AKASHI Takahiro Subject: [RFC 1/4] pinctrl: define PIN_CONFIG_INPUT Date: Mon, 2 Oct 2023 11:15:59 +0900 Message-Id: <20231002021602.260100-2-takahiro.akashi@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231002021602.260100-1-takahiro.akashi@linaro.org> References: <20231002021602.260100-1-takahiro.akashi@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This allows for enabling SCMI pinctrl based GPIO driver to obtain an input gpio pin. Signed-off-by: AKASHI Takahiro --- include/linux/pinctrl/pinconf-generic.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctr= l/pinconf-generic.h index d74b7a4ea154..842b328ea504 100644 --- a/include/linux/pinctrl/pinconf-generic.h +++ b/include/linux/pinctrl/pinconf-generic.h @@ -67,6 +67,8 @@ struct pinctrl_map; * passed as argument. The argument is in mA. * @PIN_CONFIG_DRIVE_STRENGTH_UA: the pin will sink or source at most the = current * passed as argument. The argument is in uA. + * @PIN_CONFIG_INPUT: This will obtain a value on an input pin. The return= ed + * argument indicates the value. * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mod= e, * which means it will wait for signals to settle when reading inputs. The * argument gives the debounce time in usecs. Setting the @@ -128,6 +130,7 @@ enum pin_config_param { PIN_CONFIG_DRIVE_PUSH_PULL, PIN_CONFIG_DRIVE_STRENGTH, PIN_CONFIG_DRIVE_STRENGTH_UA, + PIN_CONFIG_INPUT, PIN_CONFIG_INPUT_DEBOUNCE, PIN_CONFIG_INPUT_ENABLE, PIN_CONFIG_INPUT_SCHMITT, --=20 2.34.1 From nobody Wed Jan 7 03:33:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8D09E784A6 for ; Mon, 2 Oct 2023 02:17:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235334AbjJBCRa (ORCPT ); Sun, 1 Oct 2023 22:17:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235212AbjJBCR3 (ORCPT ); Sun, 1 Oct 2023 22:17:29 -0400 Received: from mail-ot1-x32c.google.com (mail-ot1-x32c.google.com [IPv6:2607:f8b0:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 02CFDF0 for ; Sun, 1 Oct 2023 19:17:23 -0700 (PDT) Received: by mail-ot1-x32c.google.com with SMTP id 46e09a7af769-6bf106fb6a0so2154854a34.0 for ; Sun, 01 Oct 2023 19:17:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1696213043; x=1696817843; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BpQqEZJbjzE/OtRVWr6AW4/d2IDgozzxIJunGcQEruc=; b=FBc3uiB0ZFl5MKFAV3mf1XCLGPD4SjGj561kYgRwd8N0xmKKNKgRdM4R1lIxpkFGhc lks/PZTqhXYinMocs+JzcKstMghxAecK5UaeGpaWM9HKWz88lwgOjk1fNlXKDDAYmOWC B2Mo5Fe65QZtJNG7it1dYnNn0pnE+ANDpyrZgs4uF+e5JQ78jjv9ewRHpudhkF4n1t8p AU1QGuFPQrxZVZ+1ZkCuCv+wGnVoNxcK5rwV1I79EeU4nw9wRtjSaC8WZbbh4tjoUWJ0 h/zRhpNoWiNO1b6e82+IXYsM9lvjajIg7/95Ha+SnBerx6jFsNkG5+Hz2qQ6uSzDdAeC mGdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696213043; x=1696817843; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BpQqEZJbjzE/OtRVWr6AW4/d2IDgozzxIJunGcQEruc=; b=N9gJW2VvFCDhxlW7u+PGgqCyfy6t/zTgvuku62eU4tDE/j/6A5yqj2ieHdqHKOTshN 9Z9cfY/BPLr0ZTLowyN8yH0UL50B+YyX6rNbd29RSyQavOpnO1+L3a6JonxTiIElpP1r xeLUgYZ2RqCk2kT2i6pTxvM0SF/pJy+qRZ4lLy+dedX+FjI5awL+z8qdMfL/GxMmlRKH TA0jgHuZ1RR186JDEvfk7exuFlD0hPxDYjF6TlnHWMdgv+K/ILSBJ5dzLmgVsPVBekCn 2HrsT0B9VBxXrCpB0Lfo/osfKQ1BQ8m7dc/XL/lze3QFm47ph9QAYxGTkfTi528xhgTa uciQ== X-Gm-Message-State: AOJu0YxGCML+UEx1KtH9pAlI1yp6KJg4IVi/dMdZjbc/Y+9LcnRKKzWs 7wmypr3IEZWU5r/irwxRcx3SCy+cfXujtbFOuwsELw== X-Google-Smtp-Source: AGHT+IF9a5sDpJduGBa9qTDU8td8zTYfrA9e7KFY0KVMdTtzUgrxfXt6AqoHwiWtGvtE6xmSHQMtnQ== X-Received: by 2002:a05:6808:3613:b0:3ae:108d:acee with SMTP id ct19-20020a056808361300b003ae108daceemr9410319oib.1.1696213042996; Sun, 01 Oct 2023 19:17:22 -0700 (PDT) Received: from octopus.. ([2400:4050:c3e1:100:7ab1:199:d138:f054]) by smtp.gmail.com with ESMTPSA id mg11-20020a17090b370b00b002609cadc56esm5278319pjb.11.2023.10.01.19.17.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Oct 2023 19:17:22 -0700 (PDT) From: AKASHI Takahiro To: sudeep.holla@arm.com, cristian.marussi@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linus.walleij@linaro.org Cc: Oleksii_Moisieiev@epam.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, AKASHI Takahiro Subject: [RFC 2/4] pinctrl: add pinctrl_gpio_get_config() Date: Mon, 2 Oct 2023 11:16:00 +0900 Message-Id: <20231002021602.260100-3-takahiro.akashi@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231002021602.260100-1-takahiro.akashi@linaro.org> References: <20231002021602.260100-1-takahiro.akashi@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This is a counterpart of pinctrl_gpio_set_config(), which will initially be used to implement gpio_get interface in SCMI pinctrl based GPIO driver. Signed-off-by: AKASHI Takahiro Reviewed-by: Linus Walleij --- drivers/pinctrl/core.c | 19 +++++++++++++++++++ include/linux/pinctrl/consumer.h | 8 ++++++++ 2 files changed, 27 insertions(+) diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index e9dc9638120a..2f9c2efdfe0e 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -926,6 +926,25 @@ int pinctrl_gpio_set_config(unsigned gpio, unsigned lo= ng config) } EXPORT_SYMBOL_GPL(pinctrl_gpio_set_config); =20 +int pinctrl_gpio_get_config(unsigned int gpio, unsigned long *config) +{ + struct pinctrl_gpio_range *range; + struct pinctrl_dev *pctldev; + int ret, pin; + + ret =3D pinctrl_get_device_gpio_range(gpio, &pctldev, &range); + if (ret) + return ret; + + mutex_lock(&pctldev->mutex); + pin =3D gpio_to_pin(range, gpio); + ret =3D pin_config_get_for_pin(pctldev, pin, config); + mutex_unlock(&pctldev->mutex); + + return ret; +} +EXPORT_SYMBOL_GPL(pinctrl_gpio_get_config); + static struct pinctrl_state *find_state(struct pinctrl *p, const char *name) { diff --git a/include/linux/pinctrl/consumer.h b/include/linux/pinctrl/consu= mer.h index 4729d54e8995..852fac97a79b 100644 --- a/include/linux/pinctrl/consumer.h +++ b/include/linux/pinctrl/consumer.h @@ -31,6 +31,8 @@ extern void pinctrl_gpio_free(unsigned gpio); extern int pinctrl_gpio_direction_input(unsigned gpio); extern int pinctrl_gpio_direction_output(unsigned gpio); extern int pinctrl_gpio_set_config(unsigned gpio, unsigned long config); +extern int pinctrl_gpio_get_config(unsigned int gpio, + unsigned long *config); =20 extern struct pinctrl * __must_check pinctrl_get(struct device *dev); extern void pinctrl_put(struct pinctrl *p); @@ -92,6 +94,12 @@ static inline int pinctrl_gpio_set_config(unsigned gpio,= unsigned long config) return 0; } =20 +static inline int pinctrl_gpio_get_config(unsigned int gpio, + unsigned long *config) +{ + return 0; +} + static inline struct pinctrl * __must_check pinctrl_get(struct device *dev) { return NULL; --=20 2.34.1 From nobody Wed Jan 7 03:33:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2DF5E784A7 for ; Mon, 2 Oct 2023 02:17:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235423AbjJBCRd (ORCPT ); Sun, 1 Oct 2023 22:17:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235376AbjJBCRa (ORCPT ); Sun, 1 Oct 2023 22:17:30 -0400 Received: from mail-pj1-x1032.google.com (mail-pj1-x1032.google.com [IPv6:2607:f8b0:4864:20::1032]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E49D1D8 for ; Sun, 1 Oct 2023 19:17:26 -0700 (PDT) Received: by mail-pj1-x1032.google.com with SMTP id 98e67ed59e1d1-2773b10bd05so2679150a91.0 for ; Sun, 01 Oct 2023 19:17:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1696213046; x=1696817846; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0lhRzM6KnB/PywI33Jm04a+skJPYEHXmin9uZYbICJM=; b=Tj1zTJh0GFFur/+0pIaCvomp+E4Qu8RTpWWBX69irEP4CEbb/1yoYqlu2nDxgABrAu gSyTv6pK+1kxvEyYbGiI9u4Rmn/0IeQK4eQjfcfsSWWqCSWaQ5dNUbvXId6K6ou36NZ4 cCjmAJUO0iuT4ZOuI7SvT9mCYrMUd2SWAzMOBVg4vACl186nLdqKTiy2po/Rh3Y0yC1U Sukq/yppbbx8JW5R1kbXLzNtRszDB1IYagLB7m+m9PuvAwSrW8KV6nbyiF77QNXblcZ0 JuhH63m9EMqX3rmC35163IoToGM8xSz4nOiX+jODVHYzxB+EGCy5dKcbbJsB6SyxnJjL lacw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696213046; x=1696817846; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0lhRzM6KnB/PywI33Jm04a+skJPYEHXmin9uZYbICJM=; b=vExWviDiJUHk2F6dYImnS0/CFUfHEgpbrYE/nf+QYYJdSP9Oh+5W4JiVX6fdJEkPqH XO9Eqe2MtSamiH1i6J9xTk1Y7wxMb181JeBMH/TlNEIFlrtH99+WfMXoeJ2hAs451sL6 KUojDe3Et3p0kwGtmfF++V1FhK2DPrV6XTyuz6wmRtD7TPoqtjxeZmkJQrv+hG0DhSWT AzJF0whIMjrnj64erUFUZuNQwge4PmGk+d0aBzJIgx1C4uwSrge11PuwL/a0fDesiVDn uWnZqWqjvAElezMJrixR4sieDRbb4jYdnU3ABTGcvzHMC6ANOQw+ZImDYgDcrDRpgTnI x0Tw== X-Gm-Message-State: AOJu0YyQylpC2drAdr0GP/xvLSpaChuYNfshp5o3c2RLECmRsCn033Dh AbEedw4qqP56kVaCXR4/kRTgsKoWsYWzrZydCDJdfw== X-Google-Smtp-Source: AGHT+IG3u8rwKFBxmfqf4kdkOvutNf56z/KpgPe2CDRNonX06xQsHrHs0e6xhBmsWB2SL+EDWAuH3g== X-Received: by 2002:a17:90a:1383:b0:274:60c7:e15a with SMTP id i3-20020a17090a138300b0027460c7e15amr9153743pja.4.1696213046246; Sun, 01 Oct 2023 19:17:26 -0700 (PDT) Received: from octopus.. ([2400:4050:c3e1:100:7ab1:199:d138:f054]) by smtp.gmail.com with ESMTPSA id mg11-20020a17090b370b00b002609cadc56esm5278319pjb.11.2023.10.01.19.17.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Oct 2023 19:17:25 -0700 (PDT) From: AKASHI Takahiro To: sudeep.holla@arm.com, cristian.marussi@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linus.walleij@linaro.org Cc: Oleksii_Moisieiev@epam.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, AKASHI Takahiro Subject: [RFC 3/4] gpio: scmi: add SCMI pinctrl based gpio driver Date: Mon, 2 Oct 2023 11:16:01 +0900 Message-Id: <20231002021602.260100-4-takahiro.akashi@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231002021602.260100-1-takahiro.akashi@linaro.org> References: <20231002021602.260100-1-takahiro.akashi@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" SCMI pin control protocol supports not only pin controllers, but also gpio controllers by design. This patch includes a generic gpio driver which allows consumer drivers to access gpio pins that are handled through SCMI interfaces. Signed-off-by: AKASHI Takahiro --- drivers/gpio/Kconfig | 8 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-scmi.c | 154 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 163 insertions(+) create mode 100644 drivers/gpio/gpio-scmi.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 673bafb8be58..1a968b950f3a 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -566,6 +566,14 @@ config GPIO_SAMA5D2_PIOBU The difference from regular GPIOs is that they maintain their value during backup/self-refresh. =20 +config GPIO_SCMI + tristate "GPIO support based on SCMI pinctrl" + depends on OF_GPIO + depends on PINCTRL_SCMI + help + Select this option to support GPIO devices based on SCMI pin + control protocol. + config GPIO_SIFIVE tristate "SiFive GPIO support" depends on OF_GPIO diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index eb73b5d633eb..2abe1e9d5e77 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -141,6 +141,7 @@ obj-$(CONFIG_ARCH_SA1100) +=3D gpio-sa1100.o obj-$(CONFIG_GPIO_SAMA5D2_PIOBU) +=3D gpio-sama5d2-piobu.o obj-$(CONFIG_GPIO_SCH311X) +=3D gpio-sch311x.o obj-$(CONFIG_GPIO_SCH) +=3D gpio-sch.o +obj-$(CONFIG_GPIO_SCMI) +=3D gpio-scmi.o obj-$(CONFIG_GPIO_SIFIVE) +=3D gpio-sifive.o obj-$(CONFIG_GPIO_SIM) +=3D gpio-sim.o obj-$(CONFIG_GPIO_SIOX) +=3D gpio-siox.o diff --git a/drivers/gpio/gpio-scmi.c b/drivers/gpio/gpio-scmi.c new file mode 100644 index 000000000000..ece63ea62b70 --- /dev/null +++ b/drivers/gpio/gpio-scmi.c @@ -0,0 +1,154 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2023 Linaro Inc. +// Author: AKASHI takahiro + +#include +#include +#include +#include +#include +#include +#include +#include "gpiolib.h" + +struct scmi_gpio_priv { + struct gpio_chip chip; +}; + +static int scmi_gpio_get_direction(struct gpio_chip *chip, unsigned int of= fset) +{ + unsigned long config; + + config =3D PIN_CONFIG_OUTPUT_ENABLE; + if (pinctrl_gpio_get_config(chip->gpiodev->base + offset, &config)) + return -1; + if (config) + return GPIO_LINE_DIRECTION_OUT; + + config =3D PIN_CONFIG_INPUT_ENABLE; + if (pinctrl_gpio_get_config(chip->gpiodev->base + offset, &config)) + return -1; + if (config) + return GPIO_LINE_DIRECTION_IN; + + return -1; +} + +static int scmi_gpio_direction_input(struct gpio_chip *chip, + unsigned int offset) +{ + return pinctrl_gpio_direction_input(chip->gpiodev->base + offset); +} + +static int scmi_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int val) +{ + return pinctrl_gpio_direction_output(chip->gpiodev->base + offset); +} + +static int scmi_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + unsigned long config; + + /* FIXME: currently, PIN_CONFIG_INPUT not defined */ + config =3D PIN_CONFIG_INPUT; + if (pinctrl_gpio_get_config(chip->gpiodev->base + offset, &config)) + return -1; + + /* FIXME: the packed format not defined */ + if (config >> 8) + return 1; + + return 0; +} + +static void scmi_gpio_set(struct gpio_chip *chip, unsigned int offset, int= val) +{ + unsigned long config; + + config =3D PIN_CONF_PACKED(PIN_CONFIG_OUTPUT, val & 0x1); +; + pinctrl_gpio_set_config(chip->gpiodev->base + offset, config); +} + +static u16 sum_up_ngpios(struct gpio_chip *chip) +{ + struct gpio_pin_range *range; + struct gpio_device *gdev =3D chip->gpiodev; + u16 ngpios =3D 0; + + list_for_each_entry(range, &gdev->pin_ranges, node) { + ngpios +=3D range->range.npins; + } + + return ngpios; +} + +static int scmi_gpio_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct device_node *parent_np; + struct scmi_gpio_priv *priv; + struct gpio_chip *chip; + int ret; + + /* FIXME: who should be the parent */ + parent_np =3D NULL; + + priv =3D devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + chip =3D &priv->chip; + chip->label =3D dev_name(dev); + chip->parent =3D dev; + chip->base =3D -1; + + chip->request =3D gpiochip_generic_request; + chip->free =3D gpiochip_generic_free; + chip->get_direction =3D scmi_gpio_get_direction; + chip->direction_input =3D scmi_gpio_direction_input; + chip->direction_output =3D scmi_gpio_direction_output; + chip->get =3D scmi_gpio_get; + chip->set =3D scmi_gpio_set; + + ret =3D devm_gpiochip_add_data(dev, chip, priv); + if (ret) + return ret; + + chip->ngpio =3D sum_up_ngpios(chip); + + platform_set_drvdata(pdev, priv); + + return 0; +} + +static int scmi_gpio_remove(struct platform_device *pdev) +{ + struct scmi_gpio_priv *priv =3D platform_get_drvdata(pdev); + + gpiochip_remove(&priv->chip); + + return 0; +} + +static const struct of_device_id scmi_gpio_match[] =3D { + { .compatible =3D "arm,scmi-gpio-generic" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, scmi_gpio_match); + +static struct platform_driver scmi_gpio_driver =3D { + .probe =3D scmi_gpio_probe, + .remove =3D scmi_gpio_remove, + .driver =3D { + .name =3D "scmi-gpio", + .of_match_table =3D scmi_gpio_match, + }, +}; +module_platform_driver(scmi_gpio_driver); + +MODULE_AUTHOR("AKASHI Takahiro "); +MODULE_DESCRIPTION("SCMI Pinctrl based GPIO driver"); +MODULE_LICENSE("GPL"); --=20 2.34.1 From nobody Wed Jan 7 03:33:03 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3BEB2E784A7 for ; Mon, 2 Oct 2023 02:17:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235439AbjJBCRn (ORCPT ); Sun, 1 Oct 2023 22:17:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43958 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235404AbjJBCRg (ORCPT ); Sun, 1 Oct 2023 22:17:36 -0400 Received: from mail-oa1-x2c.google.com (mail-oa1-x2c.google.com [IPv6:2001:4860:4864:20::2c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A08711F for ; Sun, 1 Oct 2023 19:17:31 -0700 (PDT) Received: by mail-oa1-x2c.google.com with SMTP id 586e51a60fabf-1dd4115b369so1159517fac.1 for ; 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([2400:4050:c3e1:100:7ab1:199:d138:f054]) by smtp.gmail.com with ESMTPSA id mg11-20020a17090b370b00b002609cadc56esm5278319pjb.11.2023.10.01.19.17.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Oct 2023 19:17:29 -0700 (PDT) From: AKASHI Takahiro To: sudeep.holla@arm.com, cristian.marussi@arm.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linus.walleij@linaro.org Cc: Oleksii_Moisieiev@epam.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, AKASHI Takahiro Subject: [RFC 4/4] dt-bindings: gpio: Add bindings for SCMI pinctrl based gpio Date: Mon, 2 Oct 2023 11:16:02 +0900 Message-Id: <20231002021602.260100-5-takahiro.akashi@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231002021602.260100-1-takahiro.akashi@linaro.org> References: <20231002021602.260100-1-takahiro.akashi@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" A dt binding for SCMI pinctrl based gpio driver is defined in this commit. It basically conforms to generic pinctrl-gpio mapping framework. Signed-off-by: AKASHI Takahiro --- .../bindings/gpio/arm,scmi-gpio.yaml | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/arm,scmi-gpio.ya= ml diff --git a/Documentation/devicetree/bindings/gpio/arm,scmi-gpio.yaml b/Do= cumentation/devicetree/bindings/gpio/arm,scmi-gpio.yaml new file mode 100644 index 000000000000..2601c5594567 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/arm,scmi-gpio.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/arm,scmi-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SCMI pinctrl based generic GPIO controller + +maintainers: + - AKASHI Takahiro + +properties: + $nodename: + pattern: "^scmi_gpio(@[0-9a-f]+)$" + + compatible: + const: arm,scmi-gpio-generic + + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-ranges: true + + gpio-ranges-group-names: true + +patternProperties: + "^.+-hog(-[0-9]+)?$": + type: object + properties: + gpio-hog: true + gpios: true + input: true + output-high: true + output-low: true + line-name: true + + required: + - gpio-hog + - gpios + + additionalProperties: false + +required: + - compatible + - gpio-controller + - "#gpio-cells" + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include + + scmi_gpio_0: scmi_gpio@0 { + compatible =3D "arm,scmi-gpio"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&scmi_pinctrl 0 10 5>, + <&scmi_pinctrl 5 0 0>; + gpio-ranges-group-names =3D "", + "pinmux_gpio"; + }; + + // Consumer: + sdhci0_pwrseq { + compatible =3D "mmc-pwrseq-emmc"; + reset-gpios =3D <&scmi_gpio_0 0 GPIO_ACTIVE_LOW>; + }; --=20 2.34.1