From nobody Sun Dec 14 06:15:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5143BE77373 for ; Sat, 30 Sep 2023 12:52:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234063AbjI3MwD (ORCPT ); Sat, 30 Sep 2023 08:52:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45906 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234002AbjI3Mv6 (ORCPT ); Sat, 30 Sep 2023 08:51:58 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1465BF9 for ; Sat, 30 Sep 2023 05:51:57 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F3A34C433CC; Sat, 30 Sep 2023 12:51:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696078316; bh=IOW8Qy8WgXjW/pu+Hsiy+A9zCuQxJj+mnIrMdCsos4M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=N7P+Uc3HY8yOIulo2M6D0Z/azUsN0Gk5ZdZxddChXOOQzRDWJKD4VBDIk4K40wZ4m Ic6VD7noeijn8iAKvm2P7DTmwoxMBpc1M2VTLb9tcH9dMPHPsiSoJEVHKgFbJI42dq uy/gCJ5NytKS1DopBhSI2mK+0++GlS/dg/lULaqsk8V799Zpu3Eg3aVsBfIQO4GHBj bw9LzOyKHlE5TKjV/ShB3g+YwlYurhL2h+GRCbKaUSk8USPDOVb9djIdsA5dVdgWAC pOk2q/wX+IFzKk+2bkdTBYxEkS5K5xZfdWPBj7YixIi9C0kSzjTJO2sDboG12Jb+PX tnuscWhFhFn3w== From: Jisheng Zhang To: Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Anup Patel Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Inochi Amaoto , chao.wei@sophgo.com, xiaoguang.xing@sophgo.com Subject: [PATCH 1/5] dt-bindings: interrupt-controller: Add SOPHGO CV1800B plic Date: Sat, 30 Sep 2023 20:39:33 +0800 Message-Id: <20230930123937.1551-2-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230930123937.1551-1-jszhang@kernel.org> References: <20230930123937.1551-1-jszhang@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add compatible string for SOPHGO CV1800B plic. Signed-off-by: Jisheng Zhang Acked-by: Conor Dooley --- .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,= plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/si= five,plic-1.0.0.yaml index 16f9c4760c0f..5c4539881a22 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.= 0.0.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.= 0.0.yaml @@ -65,6 +65,7 @@ properties: - items: - enum: - allwinner,sun20i-d1-plic + - sophgo,cv1800-plic - sophgo,sg2042-plic - thead,th1520-plic - const: thead,c900-plic --=20 2.40.1 From nobody Sun Dec 14 06:15:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 314C4E77372 for ; Sat, 30 Sep 2023 12:52:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234130AbjI3MwF (ORCPT ); Sat, 30 Sep 2023 08:52:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234049AbjI3MwC (ORCPT ); Sat, 30 Sep 2023 08:52:02 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7F29F1 for ; Sat, 30 Sep 2023 05:52:00 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 25FA9C433CB; Sat, 30 Sep 2023 12:51:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696078320; bh=fQTDtT9gnWgXUs+I9buDYmY6imSxTfJ5hIWH/nKngUA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cgjrlymuo0WltimOMkmuXz4oV1+bt9qfmo/hhNyXcikzu7EaGa4n/wgk3XwktQTCN SknjOXRlAENSX/2931edHNrX93SFp8kSZSAgBS2Dfq84VmxdmnkC7iRdLNHn4QGjGr OnYippK2hUgXFApgGby73dVAgX1a+T23DLZqgVtaXipteIfRBzCKt3J14h9489ZnoU hY/wC7LmF8I4YrvI+8jU4R8I/pZNKq1Da7by1qheFDABExAZ5YRBgwehNtZZMBWYIM e4Ds4ctkJIgdnzipElalZr0Dd+g8izrTw3U4STXCsLch6LaF2TbCL0tu50+Yr3dHQE +2qkDcwE9i8tg== From: Jisheng Zhang To: Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Anup Patel Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Inochi Amaoto , chao.wei@sophgo.com, xiaoguang.xing@sophgo.com Subject: [PATCH 2/5] dt-bindings: timer: Add SOPHGO CV1800B clint Date: Sat, 30 Sep 2023 20:39:34 +0800 Message-Id: <20230930123937.1551-3-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230930123937.1551-1-jszhang@kernel.org> References: <20230930123937.1551-1-jszhang@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add compatible string for the SOPHGO CV1800B clint. Signed-off-by: Jisheng Zhang Acked-by: Conor Dooley --- Documentation/devicetree/bindings/timer/sifive,clint.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Do= cumentation/devicetree/bindings/timer/sifive,clint.yaml index a0185e15a42f..98c76d5893ac 100644 --- a/Documentation/devicetree/bindings/timer/sifive,clint.yaml +++ b/Documentation/devicetree/bindings/timer/sifive,clint.yaml @@ -37,6 +37,7 @@ properties: - items: - enum: - allwinner,sun20i-d1-clint + - sophgo,cv1800-clint - thead,th1520-clint - const: thead,c900-clint - items: --=20 2.40.1 From nobody Sun Dec 14 06:15:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC7CFE77373 for ; Sat, 30 Sep 2023 12:52:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234129AbjI3MwL (ORCPT ); Sat, 30 Sep 2023 08:52:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44540 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234159AbjI3MwG (ORCPT ); Sat, 30 Sep 2023 08:52:06 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ACBE51A4 for ; Sat, 30 Sep 2023 05:52:04 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E9D39C433CD; Sat, 30 Sep 2023 12:52:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696078324; bh=0cXR+wjSxc3y0eRPOSPa5epHEc/W4j4DDvL7tCSFcHw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=REmv6J/ExFC/eGAjHAiMAIVg67CrBH31GFPnanZkKftD5wWdukAWx+UAjV0OtHQu1 rXunINX7W15Rzcb5lR+QRcBRZ7pcFbZctii84zTu6GjrTZUu594QrJ2moVSBSnCc37 my9zZcN2LSVReCLhxC4eMY6hvKC5kqRh1Tg/i36anJCfBggWdN/nAz+JvHgW2DX0w0 njgOMh7nPiXoXJvHM/nAoEo0LpXBNuwgPLyS9+/9Pt1EiB2zuSkRPLi3urIEGkmO2m v+/50sD4iWUUyYGoRhAV6SwO7b3tpI4ZEAwrJmvuzH8KdgEW0rksWCxxxmIg2/0yyf r1VWlOi8eXAaQ== From: Jisheng Zhang To: Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Anup Patel Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Inochi Amaoto , chao.wei@sophgo.com, xiaoguang.xing@sophgo.com Subject: [PATCH 3/5] dt-bindings: riscv: Add Milk-V Duo board compatibles Date: Sat, 30 Sep 2023 20:39:35 +0800 Message-Id: <20230930123937.1551-4-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230930123937.1551-1-jszhang@kernel.org> References: <20230930123937.1551-1-jszhang@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Document the compatible strings for the Milk-V Duo board[1] which uses the SOPHGO CV1800B SoC[2]. Link: https://milkv.io/duo [1] Link: https://en.sophgo.com/product/introduce/cv180xB.html [2] Signed-off-by: Jisheng Zhang Acked-by: Chen Wang Acked-by: Conor Dooley --- Documentation/devicetree/bindings/riscv/sophgo.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/sophgo.yaml b/Document= ation/devicetree/bindings/riscv/sophgo.yaml index 4e8fd3c6a6ff..6db241c9d00c 100644 --- a/Documentation/devicetree/bindings/riscv/sophgo.yaml +++ b/Documentation/devicetree/bindings/riscv/sophgo.yaml @@ -18,6 +18,10 @@ properties: const: '/' compatible: oneOf: + - items: + - enum: + - milkv,duo + - const: sophgo,cv1800b - items: - enum: - milkv,pioneer --=20 2.40.1 From nobody Sun Dec 14 06:15:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0FEEFE77372 for ; Sat, 30 Sep 2023 12:52:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234184AbjI3MwO (ORCPT ); Sat, 30 Sep 2023 08:52:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234163AbjI3MwL (ORCPT ); Sat, 30 Sep 2023 08:52:11 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 138DB1A4 for ; Sat, 30 Sep 2023 05:52:08 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B07DFC433C7; Sat, 30 Sep 2023 12:52:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696078327; bh=PO36H6jRR8QhXJ+xnlXTqLl+g9y5bq24w4dNdmW+KwE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CoGXAnvWfqasfxJ2+1tOXd6mushKBPwk/rdZ/6ShcRrtT1dgusjMI/Z7X0hG3TIpt GrkBhHQjCj+yD2MFeKQr/oXWqOB1f5WZZId+5KE7niXHbh+OE6sk1+UhbZ4cTi62iz LPKGNDrQnRnIqTNFojocifXICSLMTIHQ1LBqMhDji9H7/mV1ASYGRETmoJPA/TjEGq KczaPvnw8prKwbd7wfisV89bndQoIEZHWz4Rb9tbjyjiS8l7rbaQ8bmYxDPTd6GF8I bpRXBJKFRFRwRASlAptDVQ3GN/yHucwUsa0LfNuhJbnqH8w56pWLMAKGZM36YfywHA T/v5FaUtmigIw== From: Jisheng Zhang To: Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Anup Patel Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Inochi Amaoto , chao.wei@sophgo.com, xiaoguang.xing@sophgo.com Subject: [PATCH 4/5] riscv: dts: sophgo: add initial CV1800B SoC device tree Date: Sat, 30 Sep 2023 20:39:36 +0800 Message-Id: <20230930123937.1551-5-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230930123937.1551-1-jszhang@kernel.org> References: <20230930123937.1551-1-jszhang@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add initial device tree for the CV1800B RISC-V SoC by SOPHGO. Signed-off-by: Jisheng Zhang --- arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 117 ++++++++++++++++++++++++ 1 file changed, 117 insertions(+) create mode 100644 arch/riscv/boot/dts/sophgo/cv1800b.dtsi diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/= sophgo/cv1800b.dtsi new file mode 100644 index 000000000000..8829bebaa017 --- /dev/null +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2023 Jisheng Zhang + */ + +#include + +/ { + compatible =3D "sophgo,cv1800b"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + cpus: cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + timebase-frequency =3D <25000000>; + + cpu0: cpu@0 { + compatible =3D "thead,c906", "riscv"; + device_type =3D "cpu"; + reg =3D <0>; + d-cache-block-size =3D <64>; + d-cache-sets =3D <512>; + d-cache-size =3D <65536>; + i-cache-block-size =3D <64>; + i-cache-sets =3D <128>; + i-cache-size =3D <32768>; + mmu-type =3D "riscv,sv39"; + riscv,isa =3D "rv64imafdc"; + riscv,isa-base =3D "rv64i"; + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "zicntr", "zicsr= ", + "zifencei", "zihpm"; + + cpu0_intc: interrupt-controller { + compatible =3D "riscv,cpu-intc"; + interrupt-controller; + #address-cells =3D <0>; + #interrupt-cells =3D <1>; + }; + }; + }; + + osc: oscillator { + compatible =3D "fixed-clock"; + clock-output-names =3D "osc_25m"; + #clock-cells =3D <0>; + }; + + soc { + compatible =3D "simple-bus"; + interrupt-parent =3D <&plic>; + #address-cells =3D <1>; + #size-cells =3D <1>; + dma-noncoherent; + ranges; + + uart0: serial@04140000 { + compatible =3D "snps,dw-apb-uart"; + reg =3D <0x04140000 0x100>; + interrupts =3D <44 IRQ_TYPE_LEVEL_HIGH>; + clocks =3D <&osc>; + reg-shift =3D <2>; + reg-io-width =3D <4>; + status =3D "disabled"; + }; + + uart1: serial@04150000 { + compatible =3D "snps,dw-apb-uart"; + reg =3D <0x04150000 0x100>; + interrupts =3D <45 IRQ_TYPE_LEVEL_HIGH>; + clocks =3D <&osc>; + reg-shift =3D <2>; + reg-io-width =3D <4>; + status =3D "disabled"; + }; + + uart2: serial@04160000 { + compatible =3D "snps,dw-apb-uart"; + reg =3D <0x04160000 0x100>; + interrupts =3D <46 IRQ_TYPE_LEVEL_HIGH>; + clocks =3D <&osc>; + reg-shift =3D <2>; + reg-io-width =3D <4>; + status =3D "disabled"; + }; + + uart3: serial@04170000 { + compatible =3D "snps,dw-apb-uart"; + reg =3D <0x04170000 0x100>; + interrupts =3D <47 IRQ_TYPE_LEVEL_HIGH>; + clocks =3D <&osc>; + reg-shift =3D <2>; + reg-io-width =3D <4>; + status =3D "disabled"; + }; + + uart4: serial@041c0000 { + compatible =3D "snps,dw-apb-uart"; + reg =3D <0x041c0000 0x100>; + interrupts =3D <48 IRQ_TYPE_LEVEL_HIGH>; + clocks =3D <&osc>; + reg-shift =3D <2>; + reg-io-width =3D <4>; + status =3D "disabled"; + }; + + plic: interrupt-controller@70000000 { + compatible =3D "sophgo,cv1800b-plic", "thead,c900-plic"; + reg =3D <0x70000000 0x4000000>; + interrupts-extended =3D <&cpu0_intc 11>, <&cpu0_intc 9>; + interrupt-controller; + #address-cells =3D <0>; + #interrupt-cells =3D <2>; + riscv,ndev =3D <101>; + }; + }; +}; --=20 2.40.1 From nobody Sun Dec 14 06:15:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8AB05E77373 for ; Sat, 30 Sep 2023 12:52:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234159AbjI3MwZ (ORCPT ); Sat, 30 Sep 2023 08:52:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234195AbjI3MwP (ORCPT ); Sat, 30 Sep 2023 08:52:15 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F353CCE for ; Sat, 30 Sep 2023 05:52:12 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1781DC433C8; Sat, 30 Sep 2023 12:52:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696078331; bh=m/SQdPZRniU8V63PbNGJZepQgR0uVjC52GDULoPYhLA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pf9D5YxB+dW6I7uWNYpDr2vWwXsZm1pPALw4GYcxrH+LFwm9F5wXyYxQNxwy3ynzI 5nbINhGExdfhweHSgEgW6mJ3bcpoEjqLia2pNDTjPIzbCxI/G0m2ClbZb+4zD9W65H TzeY2J/OOhZV4SBFmh2p5Ce276sc6Q3f+R+LoPqt0rnqAgoNd4/7a7bqey3r1m6KlG vwPSCOyXja71/KsLWfS2dry6M7jig46j44vHDaLZqg/istRzl++TjDskaHuxXhIIkV oD/sChwBPsfBAdN40+MtqKQJ4ItnSw+Yi9QDDWJjJgqXtSEHiSZysUOfuO/9Zj3a9b djMEc8zmLsLcQ== From: Jisheng Zhang To: Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Albert Ou , Daniel Lezcano , Anup Patel Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Inochi Amaoto , chao.wei@sophgo.com, xiaoguang.xing@sophgo.com Subject: [PATCH 5/5] riscv: dts: sophgo: add Milk-V Duo board device tree Date: Sat, 30 Sep 2023 20:39:37 +0800 Message-Id: <20230930123937.1551-6-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230930123937.1551-1-jszhang@kernel.org> References: <20230930123937.1551-1-jszhang@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Milk-V Duo[1] board is an embedded development platform based on the CV1800B chip. Add minimal device tree files for the development board. Support basic uart drivers, so supports booting to a basic shell. Link: https://milkv.io/duo [1] Signed-off-by: Jisheng Zhang --- arch/riscv/boot/dts/sophgo/Makefile | 2 +- .../boot/dts/sophgo/cv1800b-milkv-duo.dts | 38 +++++++++++++++++++ 2 files changed, 39 insertions(+), 1 deletion(-) create mode 100644 arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts diff --git a/arch/riscv/boot/dts/sophgo/Makefile b/arch/riscv/boot/dts/soph= go/Makefile index 5a471b19df22..5ea9ce398ff6 100644 --- a/arch/riscv/boot/dts/sophgo/Makefile +++ b/arch/riscv/boot/dts/sophgo/Makefile @@ -1,3 +1,3 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_SOPHGO) +=3D sg2042-milkv-pioneer.dtb - +dtb-$(CONFIG_ARCH_SOPHGO) +=3D cv1800b-milkv-duo.dtb diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/= boot/dts/sophgo/cv1800b-milkv-duo.dts new file mode 100644 index 000000000000..3af9e34b3bc7 --- /dev/null +++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2023 Jisheng Zhang + */ + +/dts-v1/; + +#include "cv1800b.dtsi" + +/ { + model =3D "Milk-V Duo"; + compatible =3D "milkv,duo", "sophgo,cv1800b"; + + aliases { + serial0 =3D &uart0; + serial1 =3D &uart1; + serial2 =3D &uart2; + serial3 =3D &uart3; + serial4 =3D &uart4; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + memory@80000000 { + device_type =3D "memory"; + reg =3D <0x80000000 0x3f40000>; + }; +}; + +&osc { + clock-frequency =3D <25000000>; +}; + +&uart0 { + status =3D "okay"; +}; --=20 2.40.1