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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:25:47 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner , Apelete Seketeli Subject: [PATCH v3 01/27] dt-bindings: iio: resolver: add devicetree bindings for ad2s1210 Date: Fri, 29 Sep 2023 12:23:06 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-1-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner This adds new DeviceTree bindings for the Analog Devices, Inc. AD2S1210 resolver-to-digital converter. Co-developed-by: Apelete Seketeli Signed-off-by: Apelete Seketeli Signed-off-by: David Lechner Acked-by: Michael Hennerich Reviewed-by: Rob Herring --- v3 changes: * Expanded top-level description of A0/A1 lines. * Added required voltage -supply properties. (I did not pick up Rob's Reviewed-by since I wasn't sure if this was trivial enough.) v2 changes: * Add Co-developed-by: * Remove extraneous quotes on strings * Remove extraneous pipe on some multi-line descriptions .../bindings/iio/resolver/adi,ad2s1210.yaml | 177 +++++++++++++++++= ++++ 1 file changed, 177 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.ya= ml b/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml new file mode 100644 index 000000000000..8980b3cd8337 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/resolver/adi,ad2s1210.yaml @@ -0,0 +1,177 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/resolver/adi,ad2s1210.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD2S1210 Resolver-to-Digital Converter + +maintainers: + - Michael Hennerich + +description: | + The AD2S1210 is a complete 10-bit to 16-bit resolution tracking + resolver-to-digital converter, integrating an on-board programmable + sinusoidal oscillator that provides sine wave excitation for + resolvers. + + The AD2S1210 allows the user to read the angular position or the + angular velocity data directly from the parallel outputs or through + the serial interface. + + The mode of operation of the communication channel (parallel or serial) = is + selected by the A0 and A1 input pins. In normal mode, data is latched by + toggling the SAMPLE line and can then be read directly. In configuration= mode, + data is read or written using a register access scheme (address byte with + read/write flag and data byte). + + A1 A0 Result + 0 0 Normal mode - position output + 0 1 Normal mode - velocity output + 1 0 Reserved + 1 1 Configuration mode + + In normal mode, the resolution of the digital output is selected using + the RES0 and RES1 input pins. In configuration mode, the resolution is + selected by setting the RES0 and RES1 bits in the control register. + + RES1 RES0 Resolution (Bits) + 0 0 10 + 0 1 12 + 1 0 14 + 1 1 16 + + Note on SPI connections: The CS line on the AD2S1210 should hard-wired to + logic low and the WR/FSYNC line on the AD2S1210 should be connected to t= he + SPI CSn output of the SPI controller. + + Datasheet: + https://www.analog.com/media/en/technical-documentation/data-sheets/ad2s= 1210.pdf + +properties: + compatible: + const: adi,ad2s1210 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 25000000 + + spi-cpha: true + + avdd-supply: + description: + A 4.75 to 5.25 V regulator that powers the Analog Supply Voltage (AV= DD) + pin. + + dvdd-supply: + description: + A 4.75 to 5.25 V regulator that powers the Digital Supply Voltage (D= VDD) + pin. + + vdrive-supply: + description: + A 2.3 to 5.25 V regulator that powers the Logic Power Supply Input + (VDrive) pin. + + clocks: + maxItems: 1 + description: External oscillator clock (CLKIN). + + reset-gpios: + description: + GPIO connected to the /RESET pin. As the line needs to be low for the + reset to be active, it should be configured as GPIO_ACTIVE_LOW. + maxItems: 1 + + sample-gpios: + description: + GPIO connected to the /SAMPLE pin. As the line needs to be low to tr= igger + a sample, it should be configured as GPIO_ACTIVE_LOW. + maxItems: 1 + + mode-gpios: + description: + GPIO lines connected to the A0 and A1 pins. These pins select the da= ta + transfer mode. + minItems: 2 + maxItems: 2 + + resolution-gpios: + description: + GPIO lines connected to the RES0 and RES1 pins. These pins select the + resolution of the digital output. If omitted, it is assumed that the + RES0 and RES1 pins are hard-wired to match the assigned-resolution-b= its + property. + minItems: 2 + maxItems: 2 + + fault-gpios: + description: + GPIO lines connected to the LOT and DOS pins. These pins combined in= dicate + the type of fault present, if any. As these pins a pulled low to ind= icate + a fault condition, they should be configured as GPIO_ACTIVE_LOW. + minItems: 2 + maxItems: 2 + + adi,fixed-mode: + description: + This is used to indicate the selected mode if A0 and A1 are hard-wir= ed + instead of connected to GPIOS (i.e. mode-gpios is omitted). + $ref: /schemas/types.yaml#/definitions/string + enum: [config, velocity, position] + + assigned-resolution-bits: + description: + Resolution of the digital output required by the application. This + determines the precision of the angle and/or the maximum speed that = can + be measured. If resolution-gpios is omitted, it is assumed that RES0= and + RES1 are hard-wired to match this value. + enum: [10, 12, 14, 16] + +required: + - compatible + - reg + - spi-cpha + - avdd-supply + - dvdd-supply + - vdrive-supply + - clocks + - sample-gpios + - assigned-resolution-bits + +oneOf: + - required: + - mode-gpios + - required: + - adi,fixed-mode + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + + spi { + #address-cells =3D <1>; + #size-cells =3D <0>; + + resolver@0 { + compatible =3D "adi,ad2s1210"; + reg =3D <0>; + spi-max-frequency =3D <20000000>; + spi-cpha; + avdd-supply =3D <&avdd_regulator>; + dvdd-supply =3D <&dvdd_regulator>; + vdrive-supply =3D <&vdrive_regulator>; + clocks =3D <&ext_osc>; + sample-gpios =3D <&gpio0 90 GPIO_ACTIVE_LOW>; + mode-gpios =3D <&gpio0 86 0>, <&gpio0 87 0>; + resolution-gpios =3D <&gpio0 88 0>, <&gpio0 89 0>; + assigned-resolution-bits =3D <16>; + }; + }; --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5744BE728CA for ; Fri, 29 Sep 2023 17:25:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233383AbjI2RZy (ORCPT ); Fri, 29 Sep 2023 13:25:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49174 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233260AbjI2RZv (ORCPT ); Fri, 29 Sep 2023 13:25:51 -0400 Received: from mail-oo1-xc29.google.com (mail-oo1-xc29.google.com [IPv6:2607:f8b0:4864:20::c29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 467281B8 for ; Fri, 29 Sep 2023 10:25:49 -0700 (PDT) Received: by mail-oo1-xc29.google.com with SMTP id 006d021491bc7-57d086365f7so3021614eaf.0 for ; Fri, 29 Sep 2023 10:25:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1696008348; x=1696613148; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JKHIiAEIE2mVS9nRK2qrqb6L2W/l1AsQzObZva2M/Qk=; b=j4PQqsf2TA8TkYJ+C8KvefTKjDPFlZvpI1lokxnsLrQs4lzDlByW6WJVdZZAqgEAOs 1r08PgUMG2N/OU4W5TBEnGYs4OInjBn8CvnXFowv2wCITrH5pSS1FjVS/fzllZaU+dUN kp+CTnbscvLpBFg0zFokBWDaIeJ4q/KpLhDeK+F3lFtxS0qresUnOsefaterSltQZNwH KcWNaW6/eyy14kHOGExsveguQy/WeFKmexiO7OtGw+o7CkP/3wsNhMSdpEuy655gDA/e ABCESi/JjxeNxiJoT8dYaZ8oF5f4/e8eF4ZKj1tPTOa8ya3UyA6qf5gL7EqD1yg+N+ma QlHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696008348; x=1696613148; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JKHIiAEIE2mVS9nRK2qrqb6L2W/l1AsQzObZva2M/Qk=; b=q6DqknJpNc8xBwZ5N9BlJuwtU40Tn6RnPNpNQ5ff9kpU5rNogKhbC8Mrl+Ye/kwGsk Amzch+uhJBwNCnTSu/o6iz9YGxVzYTS1XWIoYLRj2RJw0xbOWOvu1ohf6bB1w0fr24DI pBFXYoQlmbye7Zw8wDcGAMQH2LHtnyYyGgH66IwQuQ+hGjW4GCfEfrhGaW9ygDRqgkSJ YcvRDzNe2qcbk90rZKPt9IaObI6X1u4OqMK4mfPY51+oaekh2QdgWPDs8si6SIa8ij0x w2MO2DTnuNm7xRB7wxjeLUvDTcdIJDSFSRcdLv9DQHbbdQrFjV7Yl1ghiPP44S39mOlu LO3g== X-Gm-Message-State: AOJu0Yzu1kLzxf+TELg4SDDqJEWWoquSxlDydoN7YTAnBC6LZ5R2+ugc LfL8alCScte5kMnx1rgTn/R7TA== X-Google-Smtp-Source: AGHT+IFylFVlQBDPI884Fz3s36mtqtFzBQzs0lhqAdNGptX/DuoiScazX4S3FyYmEUS2TjtVMukB/A== X-Received: by 2002:a4a:6f49:0:b0:57b:5e98:f733 with SMTP id i9-20020a4a6f49000000b0057b5e98f733mr4812423oof.3.1696008348476; Fri, 29 Sep 2023 10:25:48 -0700 (PDT) Received: from freyr.lechnology.com (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:25:48 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 02/27] staging: iio: resolver: ad2s1210: fix use before initialization Date: Fri, 29 Sep 2023 12:23:07 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-2-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner This fixes a use before initialization in ad2s1210_probe(). The ad2s1210_setup_gpios() function uses st->sdev but it was being called before this field was initialized. Signed-off-by: David Lechner --- v3 changes: * This is a new patch split out from "staging: iio: resolver: ad2s1210: fix probe" drivers/staging/iio/resolver/ad2s1210.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index f695ca0547e4..3f08b59f4e19 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -658,9 +658,6 @@ static int ad2s1210_probe(struct spi_device *spi) if (!indio_dev) return -ENOMEM; st =3D iio_priv(indio_dev); - ret =3D ad2s1210_setup_gpios(st); - if (ret < 0) - return ret; =20 spi_set_drvdata(spi, indio_dev); =20 @@ -671,6 +668,10 @@ static int ad2s1210_probe(struct spi_device *spi) st->resolution =3D 12; st->fexcit =3D AD2S1210_DEF_EXCIT; =20 + ret =3D ad2s1210_setup_gpios(st); + if (ret < 0) + return ret; + indio_dev->info =3D &ad2s1210_info; indio_dev->modes =3D INDIO_DIRECT_MODE; indio_dev->channels =3D ad2s1210_channels; --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC717E728CA for ; Fri, 29 Sep 2023 17:26:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233470AbjI2R0C (ORCPT ); Fri, 29 Sep 2023 13:26:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49204 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233286AbjI2RZv (ORCPT ); Fri, 29 Sep 2023 13:25:51 -0400 Received: from mail-oo1-xc34.google.com (mail-oo1-xc34.google.com [IPv6:2607:f8b0:4864:20::c34]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 331651BF for ; Fri, 29 Sep 2023 10:25:50 -0700 (PDT) Received: by mail-oo1-xc34.google.com with SMTP id 006d021491bc7-57b67c84999so7808726eaf.3 for ; Fri, 29 Sep 2023 10:25:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1696008349; x=1696613149; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sdyEj3wikWRAcNOtcWjzMUp/VXe76XnGqEiNgzZP6WM=; b=15XdpdXmk98e/fncfJ5R9qnkVj+AXNYi55cpGje5PD480tQ4ZEE7X6dJKT64YOanru Y6dww5ewy900Rlyq07qB0ubeXEyjVLANBV8BwVpQJhJ0T9aT3wXsrVLZ5IuvBiHeoAC+ IWWp4BXfCBb/PSGN3jAc+34+fvjbQNSg3WtPlBMsIbrLqeYJKoySI20Uz9LH+laceNxc v69qPR0Feqa823+HV3KHtAF7+80lLTrkmNDlj6Q6H6+/C+tQewlt4UeehnSSlS3tbU+c hZF2jHMEsVulycIRsZvY1sWEkFFYr7RUqSzqMH7LqY2dCTD/n9NRne2FDpIJp8Ygd37a Y4og== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696008349; x=1696613149; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sdyEj3wikWRAcNOtcWjzMUp/VXe76XnGqEiNgzZP6WM=; b=Sz5VCFdPohSqtfw3142gOxBflMvHmbgCRA3AadcEQFC9SvSrPvx8vc4BEaxM3S72ie qGWiu+kXdMHofaHn/7b2Ygkvu5IkUQMCLS2fP24tpVOT4Mh/8HaHPRZT3iMH7+/0wpfp weEFn+UeciQTf/gg18gM4kuz4cv/pYEBQNNUvMbserAvZWY4u9T0jW0d9rVYJrGM2Hzp 8cGmN1nFtHBSihrM+RWkocGbpqaeKuJ+USidM80W5ur0hFOiLTGs+niNJK61h37XIfjD OPqlOXD0U5U+kLf9DIqW28Vegws8VilqumpPrCMrGVRyuIIl2W4Mf1kNZSUEGdlM+yEH gRXw== X-Gm-Message-State: AOJu0YzDID/4oig/ecDwS6Mv1oU/faO2SJT6mXwBeDL3RwbTK9BqOIwO kVKdXrDJaqC7xxNke73EHZiVQA== X-Google-Smtp-Source: AGHT+IEdsrADh4nu4YW1a/z3YRqrcmH2BqYxTLsP/81uaD4TcborXfHuhbM/eSAh86i/ThqzYbreAw== X-Received: by 2002:a4a:9c4d:0:b0:571:1fad:ebdb with SMTP id c13-20020a4a9c4d000000b005711fadebdbmr4938892ook.3.1696008349364; Fri, 29 Sep 2023 10:25:49 -0700 (PDT) Received: from freyr.lechnology.com (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:25:48 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 03/27] staging: iio: resolver: ad2s1210: remove call to spi_setup() Date: Fri, 29 Sep 2023 12:23:08 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-3-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner This removes the call to spi_setup() in the ad2s1210 driver. Setting MODE_3 was incorrect. It should be MODE_1 but we can let the device tree select this and avoid the need to call spi_setup(). Signed-off-by: David Lechner --- v3 changes: * This is a new patch split out from "staging: iio: resolver: ad2s1210: fix probe" drivers/staging/iio/resolver/ad2s1210.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 3f08b59f4e19..8fde08887f7f 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -683,8 +683,6 @@ static int ad2s1210_probe(struct spi_device *spi) return ret; =20 st->fclkin =3D spi->max_speed_hz; - spi->mode =3D SPI_MODE_3; - spi_setup(spi); ad2s1210_initial(st); =20 return 0; --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74721E728CA for ; Fri, 29 Sep 2023 17:26:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233516AbjI2R0F (ORCPT ); Fri, 29 Sep 2023 13:26:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49222 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233139AbjI2RZw (ORCPT ); Fri, 29 Sep 2023 13:25:52 -0400 Received: from mail-oo1-xc2c.google.com (mail-oo1-xc2c.google.com [IPv6:2607:f8b0:4864:20::c2c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E59DC1A7 for ; Fri, 29 Sep 2023 10:25:50 -0700 (PDT) Received: by mail-oo1-xc2c.google.com with SMTP id 006d021491bc7-57ba5f05395so5984411eaf.1 for ; Fri, 29 Sep 2023 10:25:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1696008350; x=1696613150; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VZs7RCyHEDyjwo9BM8JVP9aWGPKGhSjAg7KPK55tj0w=; b=jWcHhfOsleOJfNNW0K3SQhI2r+yv+Ryh5Q5h8c6w1qEIqM0OOPC0fpet4vidV0wQHW wM7Bn5y9FD1ehMufk1m0FEJGWEfauqpicIiIDOvdc+2DLHjP3j0SyYJbLCHo1Hz/mNZH Tw33MXuDjCE0c83riFFl754mWZhwOsVwKqHzUm7pNTQiMG/1xvWbxH19EgGNOFRMbU9q gE2aJFoyaciX/V9PiukCWEvgM4on1hWVG/7HodI88oIRjqo5gWTjN0sMtICTPD/In/HL Y+NblSQZQyKkCX1LudXIOxvdrl6nU/flo1oeLlTuxoAL+pYsueFvUCg+CdALBYWSzhz/ oXwg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696008350; x=1696613150; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VZs7RCyHEDyjwo9BM8JVP9aWGPKGhSjAg7KPK55tj0w=; b=VETpIFbQdgjFpQpZkV9EharrUkWnrYtxlLOKv3YPZro9jet5yX/gzRbU9pcM/r43wT 5TYMRkjkG6/mMMRfAtnT4/cAlw0d9M9BdvK6LTzbR78X/S45u2k2SfDcOotBjPu17fcP Ogloeh4udL5NofwS/ARW1xUHo3egAX/iEzTXPnukyeLHJbsQVeKD36XqPKcyrCXMMVI9 aQulOJqV2DvmHQWk7y76ep4Az5EshnbH8U5pBZbsXDxWdfhx0LiAUKkO/dR8Wil2fgAm PTwdL72PRV0E1fdjnTDu7KX601A5sv1BzLx8syBHvrF1+cTnkjb+9prTCvzntZem9+00 vmig== X-Gm-Message-State: AOJu0YwL7fWilIZ3LGMWzS0GY1m2ECDtBwB4+2fzzSVFFmR7ha/zGtbJ 0SbxF8Is5poBeYtge//9Jrfgkg== X-Google-Smtp-Source: AGHT+IEV4b51ilWN++n/0+rU+iGp7VHyBLZBDmjeuTWYmnl26MZ3t8X5p2iE4s9s18GyLz1K/SQJLg== X-Received: by 2002:a4a:9257:0:b0:57b:63a6:306d with SMTP id g23-20020a4a9257000000b0057b63a6306dmr5249640ooh.6.1696008350202; Fri, 29 Sep 2023 10:25:50 -0700 (PDT) Received: from freyr.lechnology.com (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:25:49 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 04/27] staging: iio: resolver: ad2s1210: check return of ad2s1210_initial() Date: Fri, 29 Sep 2023 12:23:09 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-4-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner This adds a check to the return value of ad2s1210_initial() since it can fail. The call is also moved before devm_iio_device_register() so that we don't have to unregister the device if it fails. Signed-off-by: David Lechner --- v3 changes: * This is a new patch split out from "staging: iio: resolver: ad2s1210: fix probe" drivers/staging/iio/resolver/ad2s1210.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 8fde08887f7f..b5e071d7c5fd 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -672,6 +672,10 @@ static int ad2s1210_probe(struct spi_device *spi) if (ret < 0) return ret; =20 + ret =3D ad2s1210_initial(st); + if (ret < 0) + return ret; + indio_dev->info =3D &ad2s1210_info; indio_dev->modes =3D INDIO_DIRECT_MODE; indio_dev->channels =3D ad2s1210_channels; @@ -683,7 +687,6 @@ static int ad2s1210_probe(struct spi_device *spi) return ret; =20 st->fclkin =3D spi->max_speed_hz; - ad2s1210_initial(st); =20 return 0; } --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B6B7E728CE for ; Fri, 29 Sep 2023 17:26:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233591AbjI2R0U (ORCPT ); Fri, 29 Sep 2023 13:26:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233416AbjI2RZ4 (ORCPT ); Fri, 29 Sep 2023 13:25:56 -0400 Received: from mail-oo1-xc2d.google.com (mail-oo1-xc2d.google.com [IPv6:2607:f8b0:4864:20::c2d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA8441B3 for ; Fri, 29 Sep 2023 10:25:51 -0700 (PDT) Received: by mail-oo1-xc2d.google.com with SMTP id 006d021491bc7-57b5ef5b947so7902204eaf.0 for ; Fri, 29 Sep 2023 10:25:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1696008351; x=1696613151; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=b7PDmHSczFeqgAzbimbZilruGj50u/2gIL6ZrFf0Suo=; b=tPqTfgr7eS8w94njpeNR2mA4fJMEkZl4vcBfgDwqGnY7WAt/hyF+JYt41g+LD1pjG2 +r2w+dszYB7Ks63dx5V6O9uP/HLESAEZOdXe3bPB7xfoCyVMUGmL6LAnMVoOr6a/vLLu 0tH1hmGkaGedT4jHw6xjH1rCqCTiaa5m6k1kesaRIS8LwFBHHkV1hoS/2JrJETGrpm/9 ae7ivzQNuhvmStWtZVFxFXzNQWpeQDi1v/91KqGis/OpFPby4ixe6H6TAwLM68div8mQ msVXMafiXTHV691q71BE/bfySAr8eZJW0dCA9tRr0M8Iyu5xpdfKMoyUsObaNa87qztZ jkJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696008351; x=1696613151; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=b7PDmHSczFeqgAzbimbZilruGj50u/2gIL6ZrFf0Suo=; b=p1+A3/Zjcdn33npD/UKY7USmm9hY5NC3nQ0o+nAWp0jli38BPALhk+EfFyYV6fzpNP OHb4h8tjULoFvWkaaUFiLa/4cY1bFtKSicPA8d8puHUGgkQFLFmAXGJte6CDgB1zuJvs 4QY8bvZXKae9yWmq8bOnZddQqcxs4YgAXq6508Dw5/lG+HI0UaCbXnrtxB7X2wLOKIG1 +cvIz6l032m0Kxht0l3gBhOvDRmV6fuI3kSZhZAc72wAjq+6dw+SfXjipeBeTcWPt91q QBV9h1syGKjj8W+eWczHCnsQ387N7vWxYne3RJBmk93J199rCixVMEUc218zY+ltSupM PVFA== X-Gm-Message-State: AOJu0YwdOibrNZT5voLxga5lEAiYXSqoocv4ElCGNyZITUfanc+MG5iZ T5Ubgior4Cp5bPFXtKJdd2yOqCPDtuAZKnDaS4bV4g== X-Google-Smtp-Source: AGHT+IHxogutDZ1XLOIzr9/nOTx5KhbYFs+7hKsrWe7PtJOi6WwkLjfxiyyCL5MSgpTSmN6+IIr3og== X-Received: by 2002:a4a:7319:0:b0:57b:3a07:181c with SMTP id s25-20020a4a7319000000b0057b3a07181cmr4656794ooc.9.1696008351082; Fri, 29 Sep 2023 10:25:51 -0700 (PDT) Received: from freyr.lechnology.com (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:25:50 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 05/27] staging: iio: resolver: ad2s1210: remove spi_set_drvdata() Date: Fri, 29 Sep 2023 12:23:10 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-5-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner Since we never call spi_get_drvdata(), we can remove spi_set_drvdata(). Signed-off-by: David Lechner --- v3 changes: * This is a new patch split out from "staging: iio: resolver: ad2s1210: fix probe" drivers/staging/iio/resolver/ad2s1210.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index b5e071d7c5fd..28015322f562 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -659,8 +659,6 @@ static int ad2s1210_probe(struct spi_device *spi) return -ENOMEM; st =3D iio_priv(indio_dev); =20 - spi_set_drvdata(spi, indio_dev); - mutex_init(&st->lock); st->sdev =3D spi; st->hysteresis =3D true; --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67EA0E728CD for ; Fri, 29 Sep 2023 17:26:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233461AbjI2R0I (ORCPT ); Fri, 29 Sep 2023 13:26:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233392AbjI2RZy (ORCPT ); Fri, 29 Sep 2023 13:25:54 -0400 Received: from mail-oo1-xc31.google.com (mail-oo1-xc31.google.com [IPv6:2607:f8b0:4864:20::c31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB5F61B9 for ; Fri, 29 Sep 2023 10:25:52 -0700 (PDT) Received: by mail-oo1-xc31.google.com with SMTP id 006d021491bc7-57ba2cd3507so5855924eaf.2 for ; Fri, 29 Sep 2023 10:25:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1696008352; x=1696613152; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Gkx5P/I+qjqJv4UaL/3S8ec+xgMfUSpu8JHr+ZyL9fM=; b=qO0Ld7aZUFIP41AkqcMkH836Bw6dUV6LNLbPOBBRC9iWgyb4tgaitmR0FmhOio8aGs fEilizl6C+cuFNqP5x/VfMiRBNZWEwYuV59whLDT3HfBE+UAbpwSSF9uA7HPjOeDx33K rVpre+LrU/bOVpeVdKWvC4tLxKLAIX7ZfgLekG2w3o6SrfWOHwPtd/WOCG8U7I48bI5l D/T18RaBW8U1exBE+xtr/WZ9gGuYOXotnUEsF5Lgig8yskWhhRlbrAIjmzNqZVJtXbxg JODg4LODhZS+KheV8+nz5OcvksUFme36MjssjpaXCN3Efm3h36NdsQb196q3W7E71U+B fMSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696008352; x=1696613152; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Gkx5P/I+qjqJv4UaL/3S8ec+xgMfUSpu8JHr+ZyL9fM=; b=TZOy7Pxicz0fBNrehhN6uGuHsif3R5c1enadbL/6HyJq+Kms/10CO98i4I+epk903M 8Md3J90PjyNEn90+70Rzi214T88t1XDhWYBX5nXwsnh2TEc0jrVqGm0toCDEMVyOiGkR DIy09xEZjNF5Bfc2pQXPy7IsSLHsJNqLgpFGnpj9yhnXEtPwHwPYLC18lF11B7IJo5Lw D061S0lx+5KWEtCE2MwsXUiEB74LA+UX6DP6iSb92UxfSUmANuJkTrUZ5VqrUbfdInOG 4DMzkpTp7/Pgwk1zyy/Uw9YohwMDSxGd80GmOz3OBxh86WfDptpDB/xoN/TdcBHoSnAW yy8Q== X-Gm-Message-State: AOJu0YyCOOBg1qtZywlOuvr91T0QlO35asQMwdqNripnzfadAHz3zUlR 9zbv0L2q/5s67MPJeZO+SX8kPw== X-Google-Smtp-Source: AGHT+IFxikc/8KvEMGZ+gJBnorvyfx+jDYYgmBwRwAiusDLE/tDFFURBfLomSTduLrTMqWfQBD006Q== X-Received: by 2002:a4a:3c07:0:b0:57b:6f5c:c90a with SMTP id d7-20020a4a3c07000000b0057b6f5cc90amr4717791ooa.8.1696008351927; Fri, 29 Sep 2023 10:25:51 -0700 (PDT) Received: from freyr.lechnology.com (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:25:51 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 06/27] staging: iio: resolver: ad2s1210: sort imports Date: Fri, 29 Sep 2023 12:23:11 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-6-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner There are quite a few imports and we will be adding more so it will make it easier to read if they are sorted. Signed-off-by: David Lechner --- v3 changes: * This is a new patch split out from "staging: iio: resolver: ad2s1210: use devicetree to get fclkin" drivers/staging/iio/resolver/ad2s1210.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 28015322f562..832f86bf15e5 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -4,16 +4,16 @@ * * Copyright (c) 2010-2010 Analog Devices Inc. */ -#include -#include +#include #include +#include +#include +#include #include -#include #include +#include #include -#include -#include -#include +#include =20 #include #include --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8C2FE728CD for ; Fri, 29 Sep 2023 17:26:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233793AbjI2R0R (ORCPT ); Fri, 29 Sep 2023 13:26:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49350 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233353AbjI2RZ4 (ORCPT ); Fri, 29 Sep 2023 13:25:56 -0400 Received: from mail-oo1-xc29.google.com (mail-oo1-xc29.google.com [IPv6:2607:f8b0:4864:20::c29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBFD11BC for ; Fri, 29 Sep 2023 10:25:53 -0700 (PDT) Received: by mail-oo1-xc29.google.com with SMTP id 006d021491bc7-57e3c2adbf0so288984eaf.2 for ; Fri, 29 Sep 2023 10:25:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1696008353; x=1696613153; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3mVPfJvq9odcQF/rUfj3o/6NyMJOAJ6+IQlyYMebtjw=; b=gSv16dBX8P/ZsC7lNkev8mTFmIzBYdjV2+cIC1qQuR/Kzz9xMY5dqmOtvX1fKuxgES DMG+CuptnuOCrvdsyGJWBA7eIvHB7YTZAB4CnxZ2XJF08a352MfxQpsp0jqVOq5HTVzt jk4qanpJE/1wglGCIWTu8Wl485W5WpbUY594/g/0Ji6xMN2DjDU0TpFkJJKRtWf698rV k6l7zdqT/f/NsnS7seNJ9b9xPA+OyFwdO5fQzJC1LteezW3WQfBLuD73cFxpo2cKb99c n+WeAvRYIqa8ddmnI3l2mGPTrX7ArSG5sD6u2CtsovwRZLvdkglmHNx6ozm2GGwaJYwj RfDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696008353; x=1696613153; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3mVPfJvq9odcQF/rUfj3o/6NyMJOAJ6+IQlyYMebtjw=; b=f4lusNVK1/DuNIVOMDCmBNxV/A1+XJ8gctzRHsGbbpEJ46xGmqFdywdHSqmMOC6fzr lWt4Zxs54csWRNf/Z8adx8urZjHUB3hBEzpemMT2aCBPmZC/4fKeyeTIUddYppLPGEYt gjJFyEXe3qcun1ImwX5GwdCUxiRKZyZEL3RLgdFwWQpekPQ1iuZ47lvTeZUnOq6IDSan n5A/7p6YFAXQobGJHu1OpEmKYVNOCp1fbnyb/Dua4PWdZrYwOV/isrsaWM6q3sXb+sP/ iCzBpCF9W70PFZar1P2Z7r8LApR5hPOaQOxYgjCytPMqNSwVIN99PeS9g7fuKPlLJVxU bmuQ== X-Gm-Message-State: AOJu0Ywy+fKgUujz4I51d8FiV5xCgEn0Zy7M7n0tkmJ1SGpk6LxnfCFW kdIoQjKkAOYPTJ0oxTwTco0eFg== X-Google-Smtp-Source: AGHT+IGYCuERA7WzD2qHaKxxWRtK4iNVH6r1bESs4G+AGKirbGiiIRExnVEUMypzycdoX+A2Kfy1xg== X-Received: by 2002:a4a:9d14:0:b0:57b:8c6b:c99b with SMTP id w20-20020a4a9d14000000b0057b8c6bc99bmr4828635ooj.9.1696008353269; Fri, 29 Sep 2023 10:25:53 -0700 (PDT) Received: from freyr.lechnology.com (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:25:52 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 07/27] staging: iio: resolver: ad2s1210: always use 16-bit value for raw read Date: Fri, 29 Sep 2023 12:23:12 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-7-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner This removes the special handling for resolutions lower than 16 bits. This will allow us to use a fixed scale independent of the resolution. A new sample field is added to store the raw data instead of reusing the config mode rx buffer so that we don't have to do a cast or worry about unaligned access. Also, for the record, according to the datasheet, the logic for the special handling based on hysteresis that was removed was incorrect. Signed-off-by: David Lechner --- v3 changes: * Added __be16 sample field to state struct and use instead of rx buffer. drivers/staging/iio/resolver/ad2s1210.c | 24 ++++++++---------------- 1 file changed, 8 insertions(+), 16 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 832f86bf15e5..f9774dff2df4 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -95,7 +95,11 @@ struct ad2s1210_state { bool hysteresis; u8 resolution; enum ad2s1210_mode mode; - u8 rx[2] __aligned(IIO_DMA_MINALIGN); + /** For reading raw sample value via SPI. */ + __be16 sample __aligned(IIO_DMA_MINALIGN); + /** SPI transmit buffer. */ + u8 rx[2]; + /** SPI receive buffer. */ u8 tx[2]; }; =20 @@ -464,10 +468,7 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev, long m) { struct ad2s1210_state *st =3D iio_priv(indio_dev); - u16 negative; int ret =3D 0; - u16 pos; - s16 vel; =20 mutex_lock(&st->lock); gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0); @@ -487,26 +488,17 @@ static int ad2s1210_read_raw(struct iio_dev *indio_de= v, } if (ret < 0) goto error_ret; - ret =3D spi_read(st->sdev, st->rx, 2); + ret =3D spi_read(st->sdev, &st->sample, 2); if (ret < 0) goto error_ret; =20 switch (chan->type) { case IIO_ANGL: - pos =3D be16_to_cpup((__be16 *)st->rx); - if (st->hysteresis) - pos >>=3D 16 - st->resolution; - *val =3D pos; + *val =3D be16_to_cpu(st->sample); ret =3D IIO_VAL_INT; break; case IIO_ANGL_VEL: - vel =3D be16_to_cpup((__be16 *)st->rx); - vel >>=3D 16 - st->resolution; - if (vel & 0x8000) { - negative =3D (0xffff >> st->resolution) << st->resolution; - vel |=3D negative; - } - *val =3D vel; + *val =3D (s16)be16_to_cpu(st->sample); ret =3D IIO_VAL_INT; break; default: --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A761DE728CD for ; Fri, 29 Sep 2023 17:26:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233778AbjI2R0Y (ORCPT ); Fri, 29 Sep 2023 13:26:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41826 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233406AbjI2R0N (ORCPT ); Fri, 29 Sep 2023 13:26:13 -0400 Received: from mail-oo1-xc2b.google.com (mail-oo1-xc2b.google.com [IPv6:2607:f8b0:4864:20::c2b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D89ECCC1 for ; Fri, 29 Sep 2023 10:25:54 -0700 (PDT) Received: by mail-oo1-xc2b.google.com with SMTP id 006d021491bc7-57b706f604aso7021443eaf.0 for ; Fri, 29 Sep 2023 10:25:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1696008354; x=1696613154; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=28jJJTis54b3wmpIVJwL9RF7C6DVS3KioTbcI+7oS24=; b=3PFkbdyxbMZwlZeXWoI2d1QtPAsODCvqtmGPRR+Ney0eMDNlVeJlmpTPUQgNZtlipl JU5/FFJyEXHzZ516M31k1EYLkRpFnDstuWKiA1tNeCnpKGEpAyFQSA5yTt1Bw160PA+Z tzTwh2W08wQaDF+0fXVCWIcqpjkkOQbDde+zzVw8wkNbG8kDCNMZY47L9ATj8qua2PBA pC0ZMqvx8iASdH49rrNBYrgq1qZnIg0hBJPN2sxEKQP7dhKliAn8RPHjL7myDM8ymqbU t8r5DTBhgSe9euMuO71HLXYhNpmWOCbPT074K/wD+wWGgqoCJ1zGhYs39gyPPZlNeHJ6 99nQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696008354; x=1696613154; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=28jJJTis54b3wmpIVJwL9RF7C6DVS3KioTbcI+7oS24=; b=xMICwzmifmmb28ue6em54kj9qxwPVmlwsbS6/FnE4A0mgYmWgFABdDV6TiRZlVANy3 dzQ6QhkeLhiiMpwpU4wCyt48Ts+T5B/Fm4jig1lZiS2BliR5AN0xAoTPCF1De82gjH8g Cc+nrE6k6XZ9RWiCkWuCZMODHaY3OUtuglKR1xRIEUBG+H1blksdtoy4QX8C+6gtZwFC RxqKuRAQBJoUKEP/n6FM/uYGs0xI3jDGm+mrxy9VLQRBeH+7bnasPZQXfBuxjro4UltE v5f5gWOr6BeBjY2eHIy9afvGxu4QLmLGxRejfLlFMAyOywssuUREmge3yrf2lq/QzAau z3bg== X-Gm-Message-State: AOJu0YyKqkjwjTPiMVSkAtR5wZESeD06VRsoc8eE0q8Fij4C4/d83Ujv U33D+eMDG3gVWeV87qbdlg1tlQ== X-Google-Smtp-Source: AGHT+IG6QmUCiM9xhfcEn2UE7ttPOZ69R5Dzu9UBXrdUUMo4iJAI90PE/xg3KBZxsjTwj0v9W0j4JQ== X-Received: by 2002:a05:6820:295:b0:57b:e345:43ad with SMTP id q21-20020a056820029500b0057be34543admr4992821ood.4.1696008354146; Fri, 29 Sep 2023 10:25:54 -0700 (PDT) Received: from freyr.lechnology.com (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:25:53 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 08/27] staging: iio: resolver: ad2s1210: implement IIO_CHAN_INFO_SCALE Date: Fri, 29 Sep 2023 12:23:13 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-8-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner This adds an implementation of IIO_CHAN_INFO_SCALE to the ad2s1210 resolver driver. This allows userspace to get the scale factor for the raw values. Signed-off-by: David Lechner --- v3 changes: * Split ad2s1210_read_raw() into two functions to reduce complexity. * Use early return instead of break in switch statements. drivers/staging/iio/resolver/ad2s1210.c | 53 ++++++++++++++++++++++++++++-= ---- 1 file changed, 45 insertions(+), 8 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index f9774dff2df4..a710598a64f0 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -461,13 +461,10 @@ static ssize_t ad2s1210_store_reg(struct device *dev, return ret < 0 ? ret : len; } =20 -static int ad2s1210_read_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - int *val, - int *val2, - long m) +static int ad2s1210_single_conversion(struct ad2s1210_state *st, + struct iio_chan_spec const *chan, + int *val) { - struct ad2s1210_state *st =3D iio_priv(indio_dev); int ret =3D 0; =20 mutex_lock(&st->lock); @@ -514,6 +511,44 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev, return ret; } =20 +static const int ad2s1210_velocity_scale[] =3D { + 17089132, /* 8.192MHz / (2*pi * 2500 / 2^15) */ + 42722830, /* 8.192MHz / (2*pi * 1000 / 2^15) */ + 85445659, /* 8.192MHz / (2*pi * 500 / 2^15) */ + 341782638, /* 8.192MHz / (2*pi * 125 / 2^15) */ +}; + +static int ad2s1210_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, + int *val2, + long mask) +{ + struct ad2s1210_state *st =3D iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_RAW: + return ad2s1210_single_conversion(st, chan, val); + case IIO_CHAN_INFO_SCALE: + switch (chan->type) { + case IIO_ANGL: + /* approx 0.3 arc min converted to radians */ + *val =3D 0; + *val2 =3D 95874; + return IIO_VAL_INT_PLUS_NANO; + case IIO_ANGL_VEL: + *val =3D st->fclkin; + *val2 =3D ad2s1210_velocity_scale[st->resolution]; + return IIO_VAL_FRACTIONAL; + default: + return -EINVAL; + } + + default: + return -EINVAL; + } +} + static IIO_DEVICE_ATTR(fclkin, 0644, ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0); static IIO_DEVICE_ATTR(fexcit, 0644, @@ -552,12 +587,14 @@ static const struct iio_chan_spec ad2s1210_channels[]= =3D { .type =3D IIO_ANGL, .indexed =3D 1, .channel =3D 0, - .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW), + .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), }, { .type =3D IIO_ANGL_VEL, .indexed =3D 1, .channel =3D 0, - .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW), + .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE), } }; =20 --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3465FE728CF for ; Fri, 29 Sep 2023 17:26:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233924AbjI2R0q (ORCPT ); Fri, 29 Sep 2023 13:26:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233557AbjI2R0N (ORCPT ); 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:25:54 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 09/27] staging: iio: resolver: ad2s1210: use devicetree to get CLKIN rate Date: Fri, 29 Sep 2023 12:23:14 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-9-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner This removes the fclkin sysfs attribute and replaces it with getting the CLKIN clock rate using the clk subsystem (i.e. from the devicetree). CLKIN comes from an external oscillator that is connected directly to the AD2S1210 chip, so users of the sysfs attributes should not need to be concerned with this. The fclkin field (the datasheet name) is renamed to clkin_hz to be more obvious that it is a frequency in Hz. Signed-off-by: David Lechner --- v3 changes: * Don't sort imports in this patch. * Renamed fexcit to clkin_hz. * Fixed ad2s1210_setup_clocks() being called in an earlier patch. drivers/staging/iio/resolver/Kconfig | 1 + drivers/staging/iio/resolver/ad2s1210.c | 81 ++++++++++++-----------------= ---- 2 files changed, 30 insertions(+), 52 deletions(-) diff --git a/drivers/staging/iio/resolver/Kconfig b/drivers/staging/iio/res= olver/Kconfig index 6d1e2622e0b0..bebb35822c9e 100644 --- a/drivers/staging/iio/resolver/Kconfig +++ b/drivers/staging/iio/resolver/Kconfig @@ -7,6 +7,7 @@ menu "Resolver to digital converters" config AD2S1210 tristate "Analog Devices ad2s1210 driver" depends on SPI + depends on COMMON_CLK depends on GPIOLIB || COMPILE_TEST help Say yes here to build support for Analog Devices spi resolver diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index a710598a64f0..c8723b6f3a3b 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -3,7 +3,9 @@ * ad2s1210.c support for the ADI Resolver to Digital Converters: AD2S1210 * * Copyright (c) 2010-2010 Analog Devices Inc. + * Copyright (c) 2023 BayLibre, SAS */ +#include #include #include #include @@ -90,7 +92,8 @@ struct ad2s1210_state { struct mutex lock; struct spi_device *sdev; struct gpio_desc *gpios[5]; - unsigned int fclkin; + /** The external oscillator frequency in Hz. */ + unsigned long clkin_hz; unsigned int fexcit; bool hysteresis; u8 resolution; @@ -165,7 +168,7 @@ int ad2s1210_update_frequency_control_word(struct ad2s1= 210_state *st) int ret; unsigned char fcw; =20 - fcw =3D (unsigned char)(st->fexcit * (1 << 15) / st->fclkin); + fcw =3D (unsigned char)(st->fexcit * (1 << 15) / st->clkin_hz); if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) { dev_err(&st->sdev->dev, "ad2s1210: FCW out of range\n"); return -ERANGE; @@ -201,45 +204,6 @@ static inline int ad2s1210_soft_reset(struct ad2s1210_= state *st) return ad2s1210_config_write(st, 0x0); } =20 -static ssize_t ad2s1210_show_fclkin(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - - return sprintf(buf, "%u\n", st->fclkin); -} - -static ssize_t ad2s1210_store_fclkin(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - unsigned int fclkin; - int ret; - - ret =3D kstrtouint(buf, 10, &fclkin); - if (ret) - return ret; - if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) { - dev_err(dev, "ad2s1210: fclkin out of range\n"); - return -EINVAL; - } - - mutex_lock(&st->lock); - st->fclkin =3D fclkin; - - ret =3D ad2s1210_update_frequency_control_word(st); - if (ret < 0) - goto error_ret; - ret =3D ad2s1210_soft_reset(st); -error_ret: - mutex_unlock(&st->lock); - - return ret < 0 ? ret : len; -} - static ssize_t ad2s1210_show_fexcit(struct device *dev, struct device_attribute *attr, char *buf) @@ -537,7 +501,7 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev, *val2 =3D 95874; return IIO_VAL_INT_PLUS_NANO; case IIO_ANGL_VEL: - *val =3D st->fclkin; + *val =3D st->clkin_hz; *val2 =3D ad2s1210_velocity_scale[st->resolution]; return IIO_VAL_FRACTIONAL; default: @@ -549,8 +513,6 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev, } } =20 -static IIO_DEVICE_ATTR(fclkin, 0644, - ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0); static IIO_DEVICE_ATTR(fexcit, 0644, ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0); static IIO_DEVICE_ATTR(control, 0644, @@ -599,7 +561,6 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { }; =20 static struct attribute *ad2s1210_attributes[] =3D { - &iio_dev_attr_fclkin.dev_attr.attr, &iio_dev_attr_fexcit.dev_attr.attr, &iio_dev_attr_control.dev_attr.attr, &iio_dev_attr_bits.dev_attr.attr, @@ -657,6 +618,24 @@ static const struct iio_info ad2s1210_info =3D { .attrs =3D &ad2s1210_attribute_group, }; =20 +static int ad2s1210_setup_clocks(struct ad2s1210_state *st) +{ + struct device *dev =3D &st->sdev->dev; + struct clk *clk; + + clk =3D devm_clk_get_enabled(dev, NULL); + if (IS_ERR(clk)) + return dev_err_probe(dev, PTR_ERR(clk), "failed to get clock\n"); + + st->clkin_hz =3D clk_get_rate(clk); + if (st->clkin_hz < AD2S1210_MIN_CLKIN || st->clkin_hz > AD2S1210_MAX_CLKI= N) + return dev_err_probe(dev, -EINVAL, + "clock frequency out of range: %lu\n", + st->clkin_hz); + + return 0; +} + static int ad2s1210_setup_gpios(struct ad2s1210_state *st) { struct spi_device *spi =3D st->sdev; @@ -695,6 +674,10 @@ static int ad2s1210_probe(struct spi_device *spi) st->resolution =3D 12; st->fexcit =3D AD2S1210_DEF_EXCIT; =20 + ret =3D ad2s1210_setup_clocks(st); + if (ret < 0) + return ret; + ret =3D ad2s1210_setup_gpios(st); if (ret < 0) return ret; @@ -709,13 +692,7 @@ static int ad2s1210_probe(struct spi_device *spi) indio_dev->num_channels =3D ARRAY_SIZE(ad2s1210_channels); indio_dev->name =3D spi_get_device_id(spi)->name; =20 - ret =3D devm_iio_device_register(&spi->dev, indio_dev); - if (ret) - return ret; - - st->fclkin =3D spi->max_speed_hz; - - return 0; + return devm_iio_device_register(&spi->dev, indio_dev); } =20 static const struct of_device_id ad2s1210_of_match[] =3D { --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A7A4E728D3 for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:25:55 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 10/27] staging: iio: resolver: ad2s1210: use regmap for config registers Date: Fri, 29 Sep 2023 12:23:15 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-10-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner This makes use of the regmap API to read and write the configuration registers. This simplifies code quite a bit and makes it safer (previously, it was easy to write a bad value to the config registers which causes the chip to lock up and need to be reset). This chip has multiple modes of operation. In normal mode, we do not use regmap since there is no addressing - data is just bitshifted out during the SPI read. In config mode, we use regmap since it requires writing the address (with read/write flag) before reading and writing. We don't use the lock provided by the regmap because we need to also synchronize with the normal mode SPI reads and with the various GPIOs. There is also a quirk when reading registers (other than the fault register). If the address/data bit is set in the value read, then it indicates there is a configuration parity error and the data is not valid. Previously, this was checked in a few places, but not consistently. Now, we always check it in the regmap read function. Signed-off-by: David Lechner --- v3 changes: * Expanded description in commit message. * Fixed multiline comment style. * Replaced use of AD2S1210_DEF_CONTROL with FIELD_PREP(). * Removed unrelated `if (reg < 0)` change. drivers/staging/iio/resolver/ad2s1210.c | 259 +++++++++++++++++++---------= ---- 1 file changed, 155 insertions(+), 104 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index c8723b6f3a3b..0663a51d04ad 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -5,6 +5,8 @@ * Copyright (c) 2010-2010 Analog Devices Inc. * Copyright (c) 2023 BayLibre, SAS */ +#include +#include #include #include #include @@ -12,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -22,21 +25,17 @@ =20 #define DRV_NAME "ad2s1210" =20 -#define AD2S1210_DEF_CONTROL 0x7E - -#define AD2S1210_MSB_IS_HIGH 0x80 -#define AD2S1210_MSB_IS_LOW 0x7F -#define AD2S1210_PHASE_LOCK_RANGE_44 0x20 -#define AD2S1210_ENABLE_HYSTERESIS 0x10 -#define AD2S1210_SET_ENRES1 0x08 -#define AD2S1210_SET_ENRES0 0x04 -#define AD2S1210_SET_RES1 0x02 -#define AD2S1210_SET_RES0 0x01 - -#define AD2S1210_SET_RESOLUTION (AD2S1210_SET_RES1 | AD2S1210_SET_RES0) - -#define AD2S1210_REG_POSITION 0x80 -#define AD2S1210_REG_VELOCITY 0x82 +/* control register flags */ +#define AD2S1210_ADDRESS_DATA BIT(7) +#define AD2S1210_PHASE_LOCK_RANGE_44 BIT(5) +#define AD2S1210_ENABLE_HYSTERESIS BIT(4) +#define AD2S1210_SET_ENRES GENMASK(3, 2) +#define AD2S1210_SET_RES GENMASK(1, 0) + +#define AD2S1210_REG_POSITION_MSB 0x80 +#define AD2S1210_REG_POSITION_LSB 0x81 +#define AD2S1210_REG_VELOCITY_MSB 0x82 +#define AD2S1210_REG_VELOCITY_LSB 0x83 #define AD2S1210_REG_LOS_THRD 0x88 #define AD2S1210_REG_DOS_OVR_THRD 0x89 #define AD2S1210_REG_DOS_MIS_THRD 0x8A @@ -92,6 +91,8 @@ struct ad2s1210_state { struct mutex lock; struct spi_device *sdev; struct gpio_desc *gpios[5]; + /** Used to access config registers. */ + struct regmap *regmap; /** The external oscillator frequency in Hz. */ unsigned long clkin_hz; unsigned int fexcit; @@ -120,24 +121,51 @@ static inline void ad2s1210_set_mode(enum ad2s1210_mo= de mode, st->mode =3D mode; } =20 -/* write 1 bytes (address or data) to the chip */ -static int ad2s1210_config_write(struct ad2s1210_state *st, u8 data) +/* + * Writes the given data to the given register address. + * + * If the mode is configurable, the device will first be placed in + * configuration mode. + */ +static int ad2s1210_regmap_reg_write(void *context, unsigned int reg, + unsigned int val) { - int ret; + struct ad2s1210_state *st =3D context; + struct spi_transfer xfers[] =3D { + { + .len =3D 1, + .rx_buf =3D &st->rx[0], + .tx_buf =3D &st->tx[0], + .cs_change =3D 1, + }, { + .len =3D 1, + .rx_buf =3D &st->rx[1], + .tx_buf =3D &st->tx[1], + }, + }; + + /* values can only be 7 bits, the MSB indicates an address */ + if (val & ~0x7F) + return -EINVAL; + + st->tx[0] =3D reg; + st->tx[1] =3D val; =20 ad2s1210_set_mode(MOD_CONFIG, st); - st->tx[0] =3D data; - ret =3D spi_write(st->sdev, st->tx, 1); - if (ret < 0) - return ret; =20 - return 0; + return spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers)); } =20 -/* read value from one of the registers */ -static int ad2s1210_config_read(struct ad2s1210_state *st, - unsigned char address) +/* + * Reads value from one of the registers. + * + * If the mode is configurable, the device will first be placed in + * configuration mode. + */ +static int ad2s1210_regmap_reg_read(void *context, unsigned int reg, + unsigned int *val) { + struct ad2s1210_state *st =3D context; struct spi_transfer xfers[] =3D { { .len =3D 1, @@ -150,22 +178,36 @@ static int ad2s1210_config_read(struct ad2s1210_state= *st, .tx_buf =3D &st->tx[1], }, }; - int ret =3D 0; + int ret; =20 ad2s1210_set_mode(MOD_CONFIG, st); - st->tx[0] =3D address | AD2S1210_MSB_IS_HIGH; + st->tx[0] =3D reg; + /* + * Must be valid register address here otherwise this could write data. + * It doesn't matter which one. + */ st->tx[1] =3D AD2S1210_REG_FAULT; - ret =3D spi_sync_transfer(st->sdev, xfers, 2); + + ret =3D spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers)); if (ret < 0) return ret; =20 - return st->rx[1]; + /* + * If the D7 bit is set on any read/write register, it indicates a + * parity error. The fault register is read-only and the D7 bit means + * something else there. + */ + if (reg !=3D AD2S1210_REG_FAULT && st->rx[1] & AD2S1210_ADDRESS_DATA) + return -EBADMSG; + + *val =3D st->rx[1]; + + return 0; } =20 static inline int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st) { - int ret; unsigned char fcw; =20 fcw =3D (unsigned char)(st->fexcit * (1 << 15) / st->clkin_hz); @@ -174,11 +216,7 @@ int ad2s1210_update_frequency_control_word(struct ad2s= 1210_state *st) return -ERANGE; } =20 - ret =3D ad2s1210_config_write(st, AD2S1210_REG_EXCIT_FREQ); - if (ret < 0) - return ret; - - return ad2s1210_config_write(st, fcw); + return regmap_write(st->regmap, AD2S1210_REG_EXCIT_FREQ, fcw); } =20 static const int ad2s1210_res_pins[4][2] =3D { @@ -195,13 +233,7 @@ static inline void ad2s1210_set_resolution_pin(struct = ad2s1210_state *st) =20 static inline int ad2s1210_soft_reset(struct ad2s1210_state *st) { - int ret; - - ret =3D ad2s1210_config_write(st, AD2S1210_REG_SOFT_RESET); - if (ret < 0) - return ret; - - return ad2s1210_config_write(st, 0x0); + return regmap_write(st->regmap, AD2S1210_REG_SOFT_RESET, 0); } =20 static ssize_t ad2s1210_show_fexcit(struct device *dev, @@ -246,12 +278,13 @@ static ssize_t ad2s1210_show_control(struct device *d= ev, char *buf) { struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); + unsigned int value; int ret; =20 mutex_lock(&st->lock); - ret =3D ad2s1210_config_read(st, AD2S1210_REG_CONTROL); + ret =3D regmap_read(st->regmap, AD2S1210_REG_CONTROL, &value); mutex_unlock(&st->lock); - return ret < 0 ? ret : sprintf(buf, "0x%x\n", ret); + return ret < 0 ? ret : sprintf(buf, "0x%x\n", value); } =20 static ssize_t ad2s1210_store_control(struct device *dev, @@ -268,25 +301,13 @@ static ssize_t ad2s1210_store_control(struct device *= dev, return -EINVAL; =20 mutex_lock(&st->lock); - ret =3D ad2s1210_config_write(st, AD2S1210_REG_CONTROL); - if (ret < 0) - goto error_ret; - data =3D udata & AD2S1210_MSB_IS_LOW; - ret =3D ad2s1210_config_write(st, data); + data =3D udata & ~AD2S1210_ADDRESS_DATA; + ret =3D regmap_write(st->regmap, AD2S1210_REG_CONTROL, data); if (ret < 0) goto error_ret; =20 - ret =3D ad2s1210_config_read(st, AD2S1210_REG_CONTROL); - if (ret < 0) - goto error_ret; - if (ret & AD2S1210_MSB_IS_HIGH) { - ret =3D -EIO; - dev_err(dev, - "ad2s1210: write control register fail\n"); - goto error_ret; - } st->resolution =3D - ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION]; + ad2s1210_resolution_value[data & AD2S1210_SET_RES]; ad2s1210_set_resolution_pin(st); ret =3D len; st->hysteresis =3D !!(data & AD2S1210_ENABLE_HYSTERESIS); @@ -319,30 +340,17 @@ static ssize_t ad2s1210_store_resolution(struct devic= e *dev, dev_err(dev, "ad2s1210: resolution out of range\n"); return -EINVAL; } + + data =3D (udata - 10) >> 1; + mutex_lock(&st->lock); - ret =3D ad2s1210_config_read(st, AD2S1210_REG_CONTROL); - if (ret < 0) - goto error_ret; - data =3D ret; - data &=3D ~AD2S1210_SET_RESOLUTION; - data |=3D (udata - 10) >> 1; - ret =3D ad2s1210_config_write(st, AD2S1210_REG_CONTROL); - if (ret < 0) - goto error_ret; - ret =3D ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW); - if (ret < 0) - goto error_ret; - ret =3D ad2s1210_config_read(st, AD2S1210_REG_CONTROL); + ret =3D regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL, + AD2S1210_SET_RES, data); if (ret < 0) goto error_ret; - data =3D ret; - if (data & AD2S1210_MSB_IS_HIGH) { - ret =3D -EIO; - dev_err(dev, "ad2s1210: setting resolution fail\n"); - goto error_ret; - } + st->resolution =3D - ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION]; + ad2s1210_resolution_value[data & AD2S1210_SET_RES]; ad2s1210_set_resolution_pin(st); ret =3D len; error_ret: @@ -355,13 +363,14 @@ static ssize_t ad2s1210_show_fault(struct device *dev, struct device_attribute *attr, char *buf) { struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); + unsigned int value; int ret; =20 mutex_lock(&st->lock); - ret =3D ad2s1210_config_read(st, AD2S1210_REG_FAULT); + ret =3D regmap_read(st->regmap, AD2S1210_REG_FAULT, &value); mutex_unlock(&st->lock); =20 - return ret < 0 ? ret : sprintf(buf, "0x%02x\n", ret); + return ret < 0 ? ret : sprintf(buf, "0x%02x\n", value); } =20 static ssize_t ad2s1210_clear_fault(struct device *dev, @@ -370,6 +379,7 @@ static ssize_t ad2s1210_clear_fault(struct device *dev, size_t len) { struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); + unsigned int value; int ret; =20 mutex_lock(&st->lock); @@ -377,7 +387,7 @@ static ssize_t ad2s1210_clear_fault(struct device *dev, /* delay (2 * tck + 20) nano seconds */ udelay(1); gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1); - ret =3D ad2s1210_config_read(st, AD2S1210_REG_FAULT); + ret =3D regmap_read(st->regmap, AD2S1210_REG_FAULT, &value); if (ret < 0) goto error_ret; gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0); @@ -394,13 +404,14 @@ static ssize_t ad2s1210_show_reg(struct device *dev, { struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); struct iio_dev_attr *iattr =3D to_iio_dev_attr(attr); + unsigned int value; int ret; =20 mutex_lock(&st->lock); - ret =3D ad2s1210_config_read(st, iattr->address); + ret =3D regmap_read(st->regmap, iattr->address, &value); mutex_unlock(&st->lock); =20 - return ret < 0 ? ret : sprintf(buf, "%d\n", ret); + return ret < 0 ? ret : sprintf(buf, "%d\n", value); } =20 static ssize_t ad2s1210_store_reg(struct device *dev, @@ -415,12 +426,9 @@ static ssize_t ad2s1210_store_reg(struct device *dev, ret =3D kstrtou8(buf, 10, &data); if (ret) return -EINVAL; + mutex_lock(&st->lock); - ret =3D ad2s1210_config_write(st, iattr->address); - if (ret < 0) - goto error_ret; - ret =3D ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW); -error_ret: + ret =3D regmap_write(st->regmap, iattr->address, data); mutex_unlock(&st->lock); return ret < 0 ? ret : len; } @@ -587,22 +595,15 @@ static int ad2s1210_initial(struct ad2s1210_state *st) mutex_lock(&st->lock); ad2s1210_set_resolution_pin(st); =20 - ret =3D ad2s1210_config_write(st, AD2S1210_REG_CONTROL); - if (ret < 0) - goto error_ret; - data =3D AD2S1210_DEF_CONTROL & ~(AD2S1210_SET_RESOLUTION); - data |=3D (st->resolution - 10) >> 1; - ret =3D ad2s1210_config_write(st, data); - if (ret < 0) - goto error_ret; - ret =3D ad2s1210_config_read(st, AD2S1210_REG_CONTROL); - if (ret < 0) - goto error_ret; + /* Use default config register value plus resolution from devicetree. */ + data =3D FIELD_PREP(AD2S1210_PHASE_LOCK_RANGE_44, 1); + data |=3D FIELD_PREP(AD2S1210_ENABLE_HYSTERESIS, 1); + data |=3D FIELD_PREP(AD2S1210_SET_ENRES, 0x3); + data |=3D FIELD_PREP(AD2S1210_SET_RES, (st->resolution - 10) >> 1); =20 - if (ret & AD2S1210_MSB_IS_HIGH) { - ret =3D -EIO; + ret =3D regmap_write(st->regmap, AD2S1210_REG_CONTROL, data); + if (ret < 0) goto error_ret; - } =20 ret =3D ad2s1210_update_frequency_control_word(st); if (ret < 0) @@ -656,6 +657,52 @@ static int ad2s1210_setup_gpios(struct ad2s1210_state = *st) return 0; } =20 +static const struct regmap_range ad2s1210_regmap_readable_ranges[] =3D { + regmap_reg_range(AD2S1210_REG_POSITION_MSB, AD2S1210_REG_VELOCITY_LSB), + regmap_reg_range(AD2S1210_REG_LOS_THRD, AD2S1210_REG_LOT_LOW_THRD), + regmap_reg_range(AD2S1210_REG_EXCIT_FREQ, AD2S1210_REG_CONTROL), + regmap_reg_range(AD2S1210_REG_FAULT, AD2S1210_REG_FAULT), +}; + +static const struct regmap_access_table ad2s1210_regmap_rd_table =3D { + .yes_ranges =3D ad2s1210_regmap_readable_ranges, + .n_yes_ranges =3D ARRAY_SIZE(ad2s1210_regmap_readable_ranges), +}; + +static const struct regmap_range ad2s1210_regmap_writeable_ranges[] =3D { + regmap_reg_range(AD2S1210_REG_LOS_THRD, AD2S1210_REG_LOT_LOW_THRD), + regmap_reg_range(AD2S1210_REG_EXCIT_FREQ, AD2S1210_REG_CONTROL), + regmap_reg_range(AD2S1210_REG_SOFT_RESET, AD2S1210_REG_SOFT_RESET), + regmap_reg_range(AD2S1210_REG_FAULT, AD2S1210_REG_FAULT), +}; + +static const struct regmap_access_table ad2s1210_regmap_wr_table =3D { + .yes_ranges =3D ad2s1210_regmap_writeable_ranges, + .n_yes_ranges =3D ARRAY_SIZE(ad2s1210_regmap_writeable_ranges), +}; + +static int ad2s1210_setup_regmap(struct ad2s1210_state *st) +{ + struct device *dev =3D &st->sdev->dev; + const struct regmap_config config =3D { + .reg_bits =3D 8, + .val_bits =3D 8, + .disable_locking =3D true, + .reg_read =3D ad2s1210_regmap_reg_read, + .reg_write =3D ad2s1210_regmap_reg_write, + .rd_table =3D &ad2s1210_regmap_rd_table, + .wr_table =3D &ad2s1210_regmap_wr_table, + .can_sleep =3D true, + }; + + st->regmap =3D devm_regmap_init(dev, NULL, st, &config); + if (IS_ERR(st->regmap)) + return dev_err_probe(dev, PTR_ERR(st->regmap), + "failed to allocate register map\n"); + + return 0; +} + static int ad2s1210_probe(struct spi_device *spi) { struct iio_dev *indio_dev; @@ -682,6 +729,10 @@ static int ad2s1210_probe(struct spi_device *spi) if (ret < 0) return ret; =20 + ret =3D ad2s1210_setup_regmap(st); + if (ret < 0) + return ret; + ret =3D ad2s1210_initial(st); if (ret < 0) return ret; --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5ABD3E728CC for ; Fri, 29 Sep 2023 17:26:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233918AbjI2R0n (ORCPT ); Fri, 29 Sep 2023 13:26:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233586AbjI2R0N (ORCPT ); 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:25:56 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 11/27] staging: iio: resolver: ad2s1210: add debugfs reg access Date: Fri, 29 Sep 2023 12:23:16 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-11-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner This add an implementation of debugfs_reg_access for the AD2S1210 driver. Signed-off-by: David Lechner --- v3 changes: None drivers/staging/iio/resolver/ad2s1210.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 0663a51d04ad..31415fbb6384 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -614,9 +614,29 @@ static int ad2s1210_initial(struct ad2s1210_state *st) return ret; } =20 +static int ad2s1210_debugfs_reg_access(struct iio_dev *indio_dev, + unsigned int reg, unsigned int writeval, + unsigned int *readval) +{ + struct ad2s1210_state *st =3D iio_priv(indio_dev); + int ret; + + mutex_lock(&st->lock); + + if (readval) + ret =3D regmap_read(st->regmap, reg, readval); + else + ret =3D regmap_write(st->regmap, reg, writeval); + + mutex_unlock(&st->lock); + + return ret; +} + static const struct iio_info ad2s1210_info =3D { .read_raw =3D ad2s1210_read_raw, .attrs =3D &ad2s1210_attribute_group, + .debugfs_reg_access =3D &ad2s1210_debugfs_reg_access, }; =20 static int ad2s1210_setup_clocks(struct ad2s1210_state *st) --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4505EE728D1 for ; Fri, 29 Sep 2023 17:26:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233410AbjI2R0a (ORCPT ); Fri, 29 Sep 2023 13:26:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41934 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233653AbjI2R0O (ORCPT ); Fri, 29 Sep 2023 13:26:14 -0400 Received: from mail-oo1-xc2a.google.com (mail-oo1-xc2a.google.com [IPv6:2607:f8b0:4864:20::c2a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97C53CD5 for ; Fri, 29 Sep 2023 10:25:58 -0700 (PDT) Received: by mail-oo1-xc2a.google.com with SMTP id 006d021491bc7-57b74782be6so6386261eaf.2 for ; Fri, 29 Sep 2023 10:25:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1696008358; x=1696613158; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XiqsYkzaUXytpS8ltMLHCDCpitprsValB11Dy+9gc7k=; b=slnF/eCZFAutV0IoSbUdZBfQkVjVzS6MrLQhyETxaWggOtGu6fur9AKJQ2CWNTIVli kMXKEjPBoKJR1scA8hFARy5nmK1XhiVOR0yB/7n/IBoMS84S7Mwu1Xxn3IiFkJER9grp mPxS0eRsbgJxkUCzFUP4QyW8wqFCKrGbOOa7eF0O7VY4NF7DLHv/dO7R8CsOyQF4j97h TeBIksiUHeezfNnxmNNpkGQYQghNn7iTqUPg7QZ0NJg62WOvDLZD4WUOqA3/oxS2CYxe dndbl8Qchh7nycXrXQGEecDoparkcLrCGIJUDFXNg2Cv6SaIHvFN8GJHIqRGOgG+DUF9 DZGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696008358; x=1696613158; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XiqsYkzaUXytpS8ltMLHCDCpitprsValB11Dy+9gc7k=; b=jc1RLIRlm8BktU6hJjEUvGO2ZSje031yLdKSUUcxWMov2JsgaXTYQfzTesPdx8E2+O +64rfQzvEhJcYzeeoBUrGIN8I2vw/8KWzCUjl2bWGfSMkrZPK5+rDyfxDTr+f4rR1OXn 3zg4kWYNDD/iZHU8kDok+tfGDVQ4xkeQR+85pa8jXP+GdMNgUVV4VrqN31SicvCOnUWI S1tVSLqYdHbCr39eR2fXbJYgPdacnVFmiNLiHnft7BQMTZ7al135DQ+xHnKNB3eZJ77Q lAMpeuFj6G/md8i84Gm1Bts5gzBVwqVcJHUwnEaCQz6SmLTZADH3OGCCLu9JpaTIH62C OVkg== X-Gm-Message-State: AOJu0Yy70kpmLzsJTi6V7ZPmcafZ3LPKiWH3VZmINdrqUTLZaq62+HAr caEolXY5mFQY4anYpHe0Gw6gcw== X-Google-Smtp-Source: AGHT+IH6BEPcwZBvkbqnPBy7RB7BXkEIE5QaDtZ1O6P4wWzewrPV7PZ5/EMGPYry9IHrSXa5ea9+Ow== X-Received: by 2002:a4a:3048:0:b0:57b:8524:52c with SMTP id z8-20020a4a3048000000b0057b8524052cmr5299042ooz.3.1696008357811; Fri, 29 Sep 2023 10:25:57 -0700 (PDT) Received: from freyr.lechnology.com (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:25:57 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 12/27] staging: iio: resolver: ad2s1210: remove config attribute Date: Fri, 29 Sep 2023 12:23:17 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-12-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner This removes the config register sysfs attribute. Writing to the config register directly can be dangerous and userspace should not need to have to know the register layout. This register can still be accessed though debugfs if needed. We can add new attributes to set specific flags in the config register in the future if needed (e.g. `enable_hysterisis` and `phase_lock_range`). Signed-off-by: David Lechner --- v3 changes: None drivers/staging/iio/resolver/ad2s1210.c | 47 -----------------------------= ---- 1 file changed, 47 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 31415fbb6384..2b9377447f6a 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -273,50 +273,6 @@ static ssize_t ad2s1210_store_fexcit(struct device *de= v, return ret < 0 ? ret : len; } =20 -static ssize_t ad2s1210_show_control(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - unsigned int value; - int ret; - - mutex_lock(&st->lock); - ret =3D regmap_read(st->regmap, AD2S1210_REG_CONTROL, &value); - mutex_unlock(&st->lock); - return ret < 0 ? ret : sprintf(buf, "0x%x\n", value); -} - -static ssize_t ad2s1210_store_control(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t len) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - unsigned char udata; - unsigned char data; - int ret; - - ret =3D kstrtou8(buf, 16, &udata); - if (ret) - return -EINVAL; - - mutex_lock(&st->lock); - data =3D udata & ~AD2S1210_ADDRESS_DATA; - ret =3D regmap_write(st->regmap, AD2S1210_REG_CONTROL, data); - if (ret < 0) - goto error_ret; - - st->resolution =3D - ad2s1210_resolution_value[data & AD2S1210_SET_RES]; - ad2s1210_set_resolution_pin(st); - ret =3D len; - st->hysteresis =3D !!(data & AD2S1210_ENABLE_HYSTERESIS); - -error_ret: - mutex_unlock(&st->lock); - return ret; -} - static ssize_t ad2s1210_show_resolution(struct device *dev, struct device_attribute *attr, char *buf) @@ -523,8 +479,6 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev, =20 static IIO_DEVICE_ATTR(fexcit, 0644, ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0); -static IIO_DEVICE_ATTR(control, 0644, - ad2s1210_show_control, ad2s1210_store_control, 0); static IIO_DEVICE_ATTR(bits, 0644, ad2s1210_show_resolution, ad2s1210_store_resolution, 0); static IIO_DEVICE_ATTR(fault, 0644, @@ -570,7 +524,6 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { =20 static struct attribute *ad2s1210_attributes[] =3D { &iio_dev_attr_fexcit.dev_attr.attr, - &iio_dev_attr_control.dev_attr.attr, &iio_dev_attr_bits.dev_attr.attr, &iio_dev_attr_fault.dev_attr.attr, &iio_dev_attr_los_thrd.dev_attr.attr, --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9BD1E728CA for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:25:58 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 13/27] staging: iio: resolver: ad2s1210: rework gpios Date: Fri, 29 Sep 2023 12:23:18 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-13-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner - Remove "adi," prefix from gpio names. - Sample gpio is now expected to be active low. - Convert A0 and A1 gpios to "mode-gpios" gpio array. - Convert RES0 and RES1 gpios to "resolution-gpios" gpio array. - Remove extraneous lookup tables. - Remove unused mode field from state struct. - Swap argument order of ad2s1210_set_mode() while we are touching this. Signed-off-by: David Lechner --- v3 changes: * Fixed multiline comment style. drivers/staging/iio/resolver/ad2s1210.c | 164 +++++++++++++++++-----------= ---- 1 file changed, 85 insertions(+), 79 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 2b9377447f6a..0ec3598b600a 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -58,39 +58,21 @@ #define AD2S1210_DEF_EXCIT 10000 =20 enum ad2s1210_mode { - MOD_POS =3D 0, - MOD_VEL, - MOD_CONFIG, - MOD_RESERVED, + MOD_POS =3D 0b00, + MOD_VEL =3D 0b01, + MOD_RESERVED =3D 0b10, + MOD_CONFIG =3D 0b11, }; =20 -enum ad2s1210_gpios { - AD2S1210_SAMPLE, - AD2S1210_A0, - AD2S1210_A1, - AD2S1210_RES0, - AD2S1210_RES1, -}; - -struct ad2s1210_gpio { - const char *name; - unsigned long flags; -}; - -static const struct ad2s1210_gpio gpios[] =3D { - [AD2S1210_SAMPLE] =3D { .name =3D "adi,sample", .flags =3D GPIOD_OUT_LOW = }, - [AD2S1210_A0] =3D { .name =3D "adi,a0", .flags =3D GPIOD_OUT_LOW }, - [AD2S1210_A1] =3D { .name =3D "adi,a1", .flags =3D GPIOD_OUT_LOW }, - [AD2S1210_RES0] =3D { .name =3D "adi,res0", .flags =3D GPIOD_OUT_LOW }, - [AD2S1210_RES1] =3D { .name =3D "adi,res1", .flags =3D GPIOD_OUT_LOW }, -}; - -static const unsigned int ad2s1210_resolution_value[] =3D { 10, 12, 14, 16= }; - struct ad2s1210_state { struct mutex lock; struct spi_device *sdev; - struct gpio_desc *gpios[5]; + /** GPIO pin connected to SAMPLE line. */ + struct gpio_desc *sample_gpio; + /** GPIO pins connected to A0 and A1 lines. */ + struct gpio_descs *mode_gpios; + /** GPIO pins connected to RES0 and RES1 lines. */ + struct gpio_descs *resolution_gpios; /** Used to access config registers. */ struct regmap *regmap; /** The external oscillator frequency in Hz. */ @@ -98,7 +80,6 @@ struct ad2s1210_state { unsigned int fexcit; bool hysteresis; u8 resolution; - enum ad2s1210_mode mode; /** For reading raw sample value via SPI. */ __be16 sample __aligned(IIO_DMA_MINALIGN); /** SPI transmit buffer. */ @@ -107,18 +88,15 @@ struct ad2s1210_state { u8 tx[2]; }; =20 -static const int ad2s1210_mode_vals[4][2] =3D { - [MOD_POS] =3D { 0, 0 }, - [MOD_VEL] =3D { 0, 1 }, - [MOD_CONFIG] =3D { 1, 1 }, -}; - -static inline void ad2s1210_set_mode(enum ad2s1210_mode mode, - struct ad2s1210_state *st) +static int ad2s1210_set_mode(struct ad2s1210_state *st, enum ad2s1210_mode= mode) { - gpiod_set_value(st->gpios[AD2S1210_A0], ad2s1210_mode_vals[mode][0]); - gpiod_set_value(st->gpios[AD2S1210_A1], ad2s1210_mode_vals[mode][1]); - st->mode =3D mode; + struct gpio_descs *gpios =3D st->mode_gpios; + DECLARE_BITMAP(bitmap, 2); + + bitmap[0] =3D mode; + + return gpiod_set_array_value(gpios->ndescs, gpios->desc, gpios->info, + bitmap); } =20 /* @@ -143,6 +121,7 @@ static int ad2s1210_regmap_reg_write(void *context, uns= igned int reg, .tx_buf =3D &st->tx[1], }, }; + int ret; =20 /* values can only be 7 bits, the MSB indicates an address */ if (val & ~0x7F) @@ -151,7 +130,9 @@ static int ad2s1210_regmap_reg_write(void *context, uns= igned int reg, st->tx[0] =3D reg; st->tx[1] =3D val; =20 - ad2s1210_set_mode(MOD_CONFIG, st); + ret =3D ad2s1210_set_mode(st, MOD_CONFIG); + if (ret < 0) + return ret; =20 return spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers)); } @@ -180,7 +161,10 @@ static int ad2s1210_regmap_reg_read(void *context, uns= igned int reg, }; int ret; =20 - ad2s1210_set_mode(MOD_CONFIG, st); + ret =3D ad2s1210_set_mode(st, MOD_CONFIG); + if (ret < 0) + return ret; + st->tx[0] =3D reg; /* * Must be valid register address here otherwise this could write data. @@ -219,16 +203,16 @@ int ad2s1210_update_frequency_control_word(struct ad2= s1210_state *st) return regmap_write(st->regmap, AD2S1210_REG_EXCIT_FREQ, fcw); } =20 -static const int ad2s1210_res_pins[4][2] =3D { - { 0, 0 }, {0, 1}, {1, 0}, {1, 1} -}; - -static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st) +static int ad2s1210_set_resolution_gpios(struct ad2s1210_state *st, + u8 resolution) { - gpiod_set_value(st->gpios[AD2S1210_RES0], - ad2s1210_res_pins[(st->resolution - 10) / 2][0]); - gpiod_set_value(st->gpios[AD2S1210_RES1], - ad2s1210_res_pins[(st->resolution - 10) / 2][1]); + struct gpio_descs *gpios =3D st->resolution_gpios; + DECLARE_BITMAP(bitmap, 2); + + bitmap[0] =3D (resolution - 10) >> 1; + + return gpiod_set_array_value(gpios->ndescs, gpios->desc, gpios->info, + bitmap); } =20 static inline int ad2s1210_soft_reset(struct ad2s1210_state *st) @@ -305,10 +289,13 @@ static ssize_t ad2s1210_store_resolution(struct devic= e *dev, if (ret < 0) goto error_ret; =20 - st->resolution =3D - ad2s1210_resolution_value[data & AD2S1210_SET_RES]; - ad2s1210_set_resolution_pin(st); + ret =3D ad2s1210_set_resolution_gpios(st, udata); + if (ret < 0) + goto error_ret; + + st->resolution =3D udata; ret =3D len; + error_ret: mutex_unlock(&st->lock); return ret; @@ -339,15 +326,19 @@ static ssize_t ad2s1210_clear_fault(struct device *de= v, int ret; =20 mutex_lock(&st->lock); - gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0); + + gpiod_set_value(st->sample_gpio, 1); /* delay (2 * tck + 20) nano seconds */ udelay(1); - gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1); + gpiod_set_value(st->sample_gpio, 0); + ret =3D regmap_read(st->regmap, AD2S1210_REG_FAULT, &value); if (ret < 0) goto error_ret; - gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0); - gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1); + + gpiod_set_value(st->sample_gpio, 1); + gpiod_set_value(st->sample_gpio, 0); + error_ret: mutex_unlock(&st->lock); =20 @@ -393,19 +384,19 @@ static int ad2s1210_single_conversion(struct ad2s1210= _state *st, struct iio_chan_spec const *chan, int *val) { - int ret =3D 0; + int ret; =20 mutex_lock(&st->lock); - gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0); + gpiod_set_value(st->sample_gpio, 1); /* delay (6 * tck + 20) nano seconds */ udelay(1); =20 switch (chan->type) { case IIO_ANGL: - ad2s1210_set_mode(MOD_POS, st); + ret =3D ad2s1210_set_mode(st, MOD_POS); break; case IIO_ANGL_VEL: - ad2s1210_set_mode(MOD_VEL, st); + ret =3D ad2s1210_set_mode(st, MOD_VEL); break; default: ret =3D -EINVAL; @@ -432,7 +423,7 @@ static int ad2s1210_single_conversion(struct ad2s1210_s= tate *st, } =20 error_ret: - gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1); + gpiod_set_value(st->sample_gpio, 0); /* delay (2 * tck + 20) nano seconds */ udelay(1); mutex_unlock(&st->lock); @@ -546,7 +537,9 @@ static int ad2s1210_initial(struct ad2s1210_state *st) int ret; =20 mutex_lock(&st->lock); - ad2s1210_set_resolution_pin(st); + ret =3D ad2s1210_set_resolution_gpios(st, st->resolution); + if (ret < 0) + return ret; =20 /* Use default config register value plus resolution from devicetree. */ data =3D FIELD_PREP(AD2S1210_PHASE_LOCK_RANGE_44, 1); @@ -612,20 +605,34 @@ static int ad2s1210_setup_clocks(struct ad2s1210_stat= e *st) =20 static int ad2s1210_setup_gpios(struct ad2s1210_state *st) { - struct spi_device *spi =3D st->sdev; - int i, ret; - - for (i =3D 0; i < ARRAY_SIZE(gpios); i++) { - st->gpios[i] =3D devm_gpiod_get(&spi->dev, gpios[i].name, - gpios[i].flags); - if (IS_ERR(st->gpios[i])) { - ret =3D PTR_ERR(st->gpios[i]); - dev_err(&spi->dev, - "ad2s1210: failed to request %s GPIO: %d\n", - gpios[i].name, ret); - return ret; - } - } + struct device *dev =3D &st->sdev->dev; + + /* should not be sampling on startup */ + st->sample_gpio =3D devm_gpiod_get(dev, "sample", GPIOD_OUT_LOW); + if (IS_ERR(st->sample_gpio)) + return dev_err_probe(dev, PTR_ERR(st->sample_gpio), + "failed to request sample GPIO\n"); + + /* both pins high means that we start in config mode */ + st->mode_gpios =3D devm_gpiod_get_array(dev, "mode", GPIOD_OUT_HIGH); + if (IS_ERR(st->mode_gpios)) + return dev_err_probe(dev, PTR_ERR(st->mode_gpios), + "failed to request mode GPIOs\n"); + + if (st->mode_gpios->ndescs !=3D 2) + return dev_err_probe(dev, -EINVAL, + "requires exactly 2 mode-gpios\n"); + + /* both pins high means that we start with 16-bit resolution */ + st->resolution_gpios =3D devm_gpiod_get_array(dev, "resolution", + GPIOD_OUT_HIGH); + if (IS_ERR(st->resolution_gpios)) + return dev_err_probe(dev, PTR_ERR(st->resolution_gpios), + "failed to request resolution GPIOs\n"); + + if (st->resolution_gpios->ndescs !=3D 2) + return dev_err_probe(dev, -EINVAL, + "requires exactly 2 resolution-gpios\n"); =20 return 0; } @@ -690,7 +697,6 @@ static int ad2s1210_probe(struct spi_device *spi) mutex_init(&st->lock); st->sdev =3D spi; st->hysteresis =3D true; - st->mode =3D MOD_CONFIG; st->resolution =3D 12; st->fexcit =3D AD2S1210_DEF_EXCIT; =20 --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8353DE728CE for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:25:59 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 14/27] staging: iio: resolver: ad2s1210: implement hysteresis as channel attr Date: Fri, 29 Sep 2023 12:23:19 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-14-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner The AD2S1210 resolver has a hysteresis feature that can be used to prevent flicker in the LSB of the position register. This can be either enabled or disabled. Disabling hysteresis is useful for increasing precision by oversampling. Signed-off-by: David Lechner --- v3 changes: * Refactored into more functions to reduce complexity of switch statements. * Use early return instead of break in switch statements. drivers/staging/iio/resolver/ad2s1210.c | 86 +++++++++++++++++++++++++++++= ++-- 1 file changed, 83 insertions(+), 3 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 0ec3598b600a..a82cb124a12f 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -78,7 +78,6 @@ struct ad2s1210_state { /** The external oscillator frequency in Hz. */ unsigned long clkin_hz; unsigned int fexcit; - bool hysteresis; u8 resolution; /** For reading raw sample value via SPI. */ __be16 sample __aligned(IIO_DMA_MINALIGN); @@ -430,6 +429,35 @@ static int ad2s1210_single_conversion(struct ad2s1210_= state *st, return ret; } =20 +static int ad2s1210_get_hysteresis(struct ad2s1210_state *st, int *val) +{ + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_test_bits(st->regmap, AD2S1210_REG_CONTROL, + AD2S1210_ENABLE_HYSTERESIS); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + *val =3D !!ret; + return IIO_VAL_INT; +} + +static int ad2s1210_set_hysteresis(struct ad2s1210_state *st, int val) +{ + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL, + AD2S1210_ENABLE_HYSTERESIS, + val ? AD2S1210_ENABLE_HYSTERESIS : 0); + mutex_unlock(&st->lock); + + return ret; +} + static const int ad2s1210_velocity_scale[] =3D { 17089132, /* 8.192MHz / (2*pi * 2500 / 2^15) */ 42722830, /* 8.192MHz / (2*pi * 1000 / 2^15) */ @@ -462,7 +490,55 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev, default: return -EINVAL; } + case IIO_CHAN_INFO_HYSTERESIS: + switch (chan->type) { + case IIO_ANGL: + return ad2s1210_get_hysteresis(st, val); + default: + return -EINVAL; + } + default: + return -EINVAL; + } +} + +static int ad2s1210_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, + int *length, long mask) +{ + static const int hysteresis_available[] =3D { 0, 1 }; + + switch (mask) { + case IIO_CHAN_INFO_HYSTERESIS: + switch (chan->type) { + case IIO_ANGL: + *vals =3D hysteresis_available; + *type =3D IIO_VAL_INT; + *length =3D ARRAY_SIZE(hysteresis_available); + return IIO_AVAIL_LIST; + default: + return -EINVAL; + } + default: + return -EINVAL; + } +} =20 +static int ad2s1210_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct ad2s1210_state *st =3D iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_HYSTERESIS: + switch (chan->type) { + case IIO_ANGL: + return ad2s1210_set_hysteresis(st, val); + default: + return -EINVAL; + } default: return -EINVAL; } @@ -503,7 +579,10 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { .indexed =3D 1, .channel =3D 0, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | - BIT(IIO_CHAN_INFO_SCALE), + BIT(IIO_CHAN_INFO_SCALE) | + BIT(IIO_CHAN_INFO_HYSTERESIS), + .info_mask_separate_available =3D + BIT(IIO_CHAN_INFO_HYSTERESIS), }, { .type =3D IIO_ANGL_VEL, .indexed =3D 1, @@ -581,6 +660,8 @@ static int ad2s1210_debugfs_reg_access(struct iio_dev *= indio_dev, =20 static const struct iio_info ad2s1210_info =3D { .read_raw =3D ad2s1210_read_raw, + .read_avail =3D ad2s1210_read_avail, + .write_raw =3D ad2s1210_write_raw, .attrs =3D &ad2s1210_attribute_group, .debugfs_reg_access =3D &ad2s1210_debugfs_reg_access, }; @@ -696,7 +777,6 @@ static int ad2s1210_probe(struct spi_device *spi) =20 mutex_init(&st->lock); st->sdev =3D spi; - st->hysteresis =3D true; st->resolution =3D 12; st->fexcit =3D AD2S1210_DEF_EXCIT; =20 --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F642E728CA for ; Fri, 29 Sep 2023 17:26:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233416AbjI2R0f (ORCPT ); Fri, 29 Sep 2023 13:26:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233619AbjI2R0P (ORCPT ); Fri, 29 Sep 2023 13:26:15 -0400 Received: from mail-ot1-x330.google.com (mail-ot1-x330.google.com [IPv6:2607:f8b0:4864:20::330]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4B9D8CF1 for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.25.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:26:00 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 15/27] staging: iio: resolver: ad2s1210: refactor setting excitation frequency Date: Fri, 29 Sep 2023 12:23:20 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-15-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner This combines the ad2s1210_update_frequency_control_word() and ad2s1210_soft_reset() functions into a single function since they both have to be called together. (The software reset does not reset any configuration registers, it only updates the excitation output and resets the tracking loop.) Also clean up a few things while touching this: - move AD2S1210_DEF_EXCIT macro with similar macros - remove unnecessary dev_err() calls Signed-off-by: David Lechner --- v3 changes: * Expanded comment on soft reset register write. * Fixed multiline comment style. drivers/staging/iio/resolver/ad2s1210.c | 66 +++++++++++++++++------------= ---- 1 file changed, 34 insertions(+), 32 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index a82cb124a12f..28ab877e1bc0 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -51,12 +51,11 @@ #define AD2S1210_MIN_CLKIN 6144000 #define AD2S1210_MAX_CLKIN 10240000 #define AD2S1210_MIN_EXCIT 2000 +#define AD2S1210_DEF_EXCIT 10000 #define AD2S1210_MAX_EXCIT 20000 #define AD2S1210_MIN_FCW 0x4 #define AD2S1210_MAX_FCW 0x50 =20 -#define AD2S1210_DEF_EXCIT 10000 - enum ad2s1210_mode { MOD_POS =3D 0b00, MOD_VEL =3D 0b01, @@ -188,18 +187,32 @@ static int ad2s1210_regmap_reg_read(void *context, un= signed int reg, return 0; } =20 -static inline -int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st) +/* + * Sets the excitation frequency and performs software reset. + * + * Must be called with lock held. + */ +static int ad2s1210_reinit_excitation_frequency(struct ad2s1210_state *st, + u16 fexcit) { - unsigned char fcw; + int ret; + u8 fcw; =20 - fcw =3D (unsigned char)(st->fexcit * (1 << 15) / st->clkin_hz); - if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) { - dev_err(&st->sdev->dev, "ad2s1210: FCW out of range\n"); + fcw =3D fexcit * (1 << 15) / st->clkin_hz; + if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) return -ERANGE; - } =20 - return regmap_write(st->regmap, AD2S1210_REG_EXCIT_FREQ, fcw); + ret =3D regmap_write(st->regmap, AD2S1210_REG_EXCIT_FREQ, fcw); + if (ret < 0) + return ret; + + st->fexcit =3D fexcit; + + /* + * Software reset reinitializes the excitation frequency output. + * It does not reset any of the configuration registers. + */ + return regmap_write(st->regmap, AD2S1210_REG_SOFT_RESET, 0); } =20 static int ad2s1210_set_resolution_gpios(struct ad2s1210_state *st, @@ -214,11 +227,6 @@ static int ad2s1210_set_resolution_gpios(struct ad2s12= 10_state *st, bitmap); } =20 -static inline int ad2s1210_soft_reset(struct ad2s1210_state *st) -{ - return regmap_write(st->regmap, AD2S1210_REG_SOFT_RESET, 0); -} - static ssize_t ad2s1210_show_fexcit(struct device *dev, struct device_attribute *attr, char *buf) @@ -233,27 +241,24 @@ static ssize_t ad2s1210_store_fexcit(struct device *d= ev, const char *buf, size_t len) { struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - unsigned int fexcit; + u16 fexcit; int ret; =20 - ret =3D kstrtouint(buf, 10, &fexcit); - if (ret < 0) - return ret; - if (fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) { - dev_err(dev, - "ad2s1210: excitation frequency out of range\n"); + ret =3D kstrtou16(buf, 10, &fexcit); + if (ret < 0 || fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) return -EINVAL; - } + mutex_lock(&st->lock); - st->fexcit =3D fexcit; - ret =3D ad2s1210_update_frequency_control_word(st); + ret =3D ad2s1210_reinit_excitation_frequency(st, fexcit); if (ret < 0) goto error_ret; - ret =3D ad2s1210_soft_reset(st); + + ret =3D len; + error_ret: mutex_unlock(&st->lock); =20 - return ret < 0 ? ret : len; + return ret; } =20 static ssize_t ad2s1210_show_resolution(struct device *dev, @@ -630,10 +635,8 @@ static int ad2s1210_initial(struct ad2s1210_state *st) if (ret < 0) goto error_ret; =20 - ret =3D ad2s1210_update_frequency_control_word(st); - if (ret < 0) - goto error_ret; - ret =3D ad2s1210_soft_reset(st); + ret =3D ad2s1210_reinit_excitation_frequency(st, AD2S1210_DEF_EXCIT); + error_ret: mutex_unlock(&st->lock); return ret; @@ -778,7 +781,6 @@ static int ad2s1210_probe(struct spi_device *spi) mutex_init(&st->lock); st->sdev =3D spi; st->resolution =3D 12; - st->fexcit =3D AD2S1210_DEF_EXCIT; =20 ret =3D ad2s1210_setup_clocks(st); if (ret < 0) --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB013E728CE for ; Fri, 29 Sep 2023 17:26:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233818AbjI2R0h (ORCPT ); Fri, 29 Sep 2023 13:26:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233749AbjI2R0P (ORCPT ); Fri, 29 Sep 2023 13:26:15 -0400 Received: from mail-ot1-x333.google.com (mail-ot1-x333.google.com [IPv6:2607:f8b0:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D1052CFB for ; Fri, 29 Sep 2023 10:26:02 -0700 (PDT) Received: by mail-ot1-x333.google.com with SMTP id 46e09a7af769-6c4bf619b57so7215707a34.1 for ; Fri, 29 Sep 2023 10:26:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1696008361; x=1696613161; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qjPcJpinx/2oZi6yDOcic02ZSonPgH6LaRKRfAMz/Qo=; b=NTaAZ/ElMlLTaST/8bI5S/fYU3n/AKHJEy6EdJja37MJzbEos/gy2vWsQVS6GlyF+6 glBThJ8t7HBFflhb0N9nAbYYRTOQYEuhxJ3+5o62Lh4ONCjOhSIs9kpXBWvW1u0eYxTt eUblPkxkf1RJtiRXdFfCSd1skxjXmr/TjAOysHJ+QiP6ldwL2+byPx7E1iRlekBmwm79 QHGHbH+HyIfDElxYeOWeQltAlbuYPL0HDAaUPIuV3SIlJbUyUAoRmPMR09ed+64GPbUb KVcELnr5c0+hvmE0hbVaACs6gW6ZaqH4Pq47GuP2iovitLlCUqsBkOcRBFJGcTAJJvv9 Nb2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696008361; x=1696613161; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qjPcJpinx/2oZi6yDOcic02ZSonPgH6LaRKRfAMz/Qo=; b=AXq9VaIiuqeM437z8d7A5TF7CDO37ha5TgMsI3CKUIjMj28A79ZUkUWSM6oVQbF6b8 g7UFRtjPzgauaIJHphfVU58E7jgJTHk20o4f51l5OjYgbRqRe64cOvfrle+zQlDzdn2B aTmYr0dsAAO4hqjRhOmMwsuGUuNxweGnn3tpIehUNwMFsgGmMfe4Ph8p/2uBnWolEgyv w/i5c/YJXWSMWIHJz8lgriZLvRWY2zJTt4n7mqdN2MS6xvl0V0ZHpUvXIo7Qn40QU2ax h6reS+5xyjpRJwxb9xO40pn/ZHBnAeN2mBx/AHEmDoM0bkt/l36v+ASkHjG/+uNZxNs0 8lAQ== X-Gm-Message-State: AOJu0Ywm84OYK3LdhlKPM1D/UA1OArg0xFTDjhiMoF3whMYsQizW9ucE XVBEktTg8afis6EXxwN/X/rbfQ== X-Google-Smtp-Source: AGHT+IEU7xTxC2XhMOwTtgm0vgklQ781pNwhnGaa2Z5tu0SKY+s5O96AmKgrtXu11x/eKzuKi97bUg== X-Received: by 2002:a05:6830:11c6:b0:6bc:de9b:a3e6 with SMTP id v6-20020a05683011c600b006bcde9ba3e6mr5194286otq.24.1696008361316; Fri, 29 Sep 2023 10:26:01 -0700 (PDT) Received: from freyr.lechnology.com (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.26.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:26:00 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 16/27] staging: iio: resolver: ad2s1210: read excitation frequency from control register Date: Fri, 29 Sep 2023 12:23:21 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-16-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner This modifies the ad2s1210_show_fexcit() function to read the excitation frequency from the control register. This way we don't have to keep track of the value and don't risk returning a stale value. Signed-off-by: David Lechner --- v3 changes: None drivers/staging/iio/resolver/ad2s1210.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 28ab877e1bc0..b15d71b17266 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -76,7 +76,6 @@ struct ad2s1210_state { struct regmap *regmap; /** The external oscillator frequency in Hz. */ unsigned long clkin_hz; - unsigned int fexcit; u8 resolution; /** For reading raw sample value via SPI. */ __be16 sample __aligned(IIO_DMA_MINALIGN); @@ -206,8 +205,6 @@ static int ad2s1210_reinit_excitation_frequency(struct = ad2s1210_state *st, if (ret < 0) return ret; =20 - st->fexcit =3D fexcit; - /* * Software reset reinitializes the excitation frequency output. * It does not reset any of the configuration registers. @@ -232,8 +229,22 @@ static ssize_t ad2s1210_show_fexcit(struct device *dev, char *buf) { struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); + unsigned int value; + u16 fexcit; + int ret; =20 - return sprintf(buf, "%u\n", st->fexcit); + mutex_lock(&st->lock); + ret =3D regmap_read(st->regmap, AD2S1210_REG_EXCIT_FREQ, &value); + if (ret < 0) + goto error_ret; + + fexcit =3D value * st->clkin_hz / (1 << 15); + + ret =3D sprintf(buf, "%u\n", fexcit); + +error_ret: + mutex_unlock(&st->lock); + return ret; } =20 static ssize_t ad2s1210_store_fexcit(struct device *dev, --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F840E728CD for ; Fri, 29 Sep 2023 17:26:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233929AbjI2R0r (ORCPT ); Fri, 29 Sep 2023 13:26:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233795AbjI2R0R (ORCPT ); Fri, 29 Sep 2023 13:26:17 -0400 Received: from mail-oo1-xc2b.google.com (mail-oo1-xc2b.google.com [IPv6:2607:f8b0:4864:20::c2b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6217B10D7 for ; Fri, 29 Sep 2023 10:26:03 -0700 (PDT) Received: by mail-oo1-xc2b.google.com with SMTP id 006d021491bc7-57b574c6374so6169516eaf.0 for ; Fri, 29 Sep 2023 10:26:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1696008362; x=1696613162; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qREH2iijrQE8j1KV5leApL29RWV15pSaXqnz6nLqFFw=; b=Sx7tot4JiC8XYJ9aKwhtACuJwGYtWxnRgSn3Gl6ZmlUuJIO/PAWCPdH8J1IbfrFmhQ 9mQW4qeOnfNbBWNHEx786cqNRv/bTZW5ls+9tohoWX7hnv+ijs8QSxrYPV8OSPjI0VIJ 1KZD3bvjVDFsr/1LzXVhIM3Dc4nmtzQAnF0y1USeBLA3Yo6ccNPtObsv+yOdbvUhEWpp l2itB75XDz6sLV8EH8hFnOFWZ5UPtLda90XXtHb7L1B5tn5yr0Y74UD1fY45tNiSyAse +M49MPDxlY4joBVTlB+d0NSjb04bwmTNdx1WiSUjrQbhMbx6uKX614PuhrK7Z2wVS4E0 1sgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1696008362; x=1696613162; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qREH2iijrQE8j1KV5leApL29RWV15pSaXqnz6nLqFFw=; b=nhyp2Lb0VX9Zp5bn1O2eQUGazsXfu7aq//Yu6ATnoXIDwMelN6fWUan58ppeewtUXI wPqzKVG5SmNgcRS5FTf0F7CIHa4mkx3WFSFrlfwpXr9YPmdMmCLAtH4Psib7HuYWTB21 nq1Gr8BnXktpMu18AgNIP5HC/u3tqGt7XDcGQZ2sPZxh3cDRnY5vvTV9QDhVciUy9D2g 9zJSi28XxOPLnpvEGWbxa0qaeKeMAY2dabG7xGeY9qNqnfeFPM6wLEEMmYU0cD6oF1Ys 8bKyR0/DiLnyBMzNI0u51A/qFi2xN9BDUEZyZ/XduJe1N81isyCzSmo54F/QDGL7MokZ yIug== X-Gm-Message-State: AOJu0Yx73kz6NRlBwgTJQ4QvR/jMp53g+tviKrGOdNoXBLUKY8kDdRWv 4UuZ7cbpMV8/r3bpm7oA6XfDcQ== X-Google-Smtp-Source: AGHT+IGUGOW69+LuB4tDRchw1nSEYKrDTR2IkarxX44dNHo2w5zjN5jnchMr/v8COjgjPFl/yJiRnA== X-Received: by 2002:a4a:6219:0:b0:57b:86f5:701c with SMTP id x25-20020a4a6219000000b0057b86f5701cmr4880962ooc.4.1696008362178; Fri, 29 Sep 2023 10:26:02 -0700 (PDT) Received: from freyr.lechnology.com (ip98-183-112-25.ok.ok.cox.net. [98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.26.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:26:01 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 17/27] staging: iio: resolver: ad2s1210: convert fexcit to channel attribute Date: Fri, 29 Sep 2023 12:23:22 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-17-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner The ad2s1210 driver has a device-specific attribute `fexcit` for setting the frequency of the excitation output. This converts it to a channel in order to use standard IIO ABI. The excitation frequency is an analog output that generates a sine wave. Only the frequency is configurable. According to the datasheet, the specified range of the excitation frequency is from 2 kHz to 20 kHz and can be set in increments of 250 Hz. Signed-off-by: David Lechner --- v3 changes: * This is a new patch in v3 instead of "iio: resolver: ad2s1210: rename fex= cit attribute" drivers/staging/iio/resolver/ad2s1210.c | 122 ++++++++++++++++++----------= ---- 1 file changed, 70 insertions(+), 52 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index b15d71b17266..6accb9e3db46 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -224,54 +224,6 @@ static int ad2s1210_set_resolution_gpios(struct ad2s12= 10_state *st, bitmap); } =20 -static ssize_t ad2s1210_show_fexcit(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - unsigned int value; - u16 fexcit; - int ret; - - mutex_lock(&st->lock); - ret =3D regmap_read(st->regmap, AD2S1210_REG_EXCIT_FREQ, &value); - if (ret < 0) - goto error_ret; - - fexcit =3D value * st->clkin_hz / (1 << 15); - - ret =3D sprintf(buf, "%u\n", fexcit); - -error_ret: - mutex_unlock(&st->lock); - return ret; -} - -static ssize_t ad2s1210_store_fexcit(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t len) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - u16 fexcit; - int ret; - - ret =3D kstrtou16(buf, 10, &fexcit); - if (ret < 0 || fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) - return -EINVAL; - - mutex_lock(&st->lock); - ret =3D ad2s1210_reinit_excitation_frequency(st, fexcit); - if (ret < 0) - goto error_ret; - - ret =3D len; - -error_ret: - mutex_unlock(&st->lock); - - return ret; -} - static ssize_t ad2s1210_show_resolution(struct device *dev, struct device_attribute *attr, char *buf) @@ -474,6 +426,38 @@ static int ad2s1210_set_hysteresis(struct ad2s1210_sta= te *st, int val) return ret; } =20 +static int ad2s1210_get_excitation_frequency(struct ad2s1210_state *st, in= t *val) +{ + unsigned int reg_val; + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_read(st->regmap, AD2S1210_REG_EXCIT_FREQ, ®_val); + if (ret < 0) + goto error_ret; + + *val =3D reg_val * st->clkin_hz / (1 << 15); + ret =3D IIO_VAL_INT; + +error_ret: + mutex_unlock(&st->lock); + return ret; +} + +static int ad2s1210_set_excitation_frequency(struct ad2s1210_state *st, in= t val) +{ + int ret; + + if (val < AD2S1210_MIN_EXCIT || val > AD2S1210_MAX_EXCIT) + return -EINVAL; + + mutex_lock(&st->lock); + ret =3D ad2s1210_reinit_excitation_frequency(st, val); + mutex_unlock(&st->lock); + + return ret; +} + static const int ad2s1210_velocity_scale[] =3D { 17089132, /* 8.192MHz / (2*pi * 2500 / 2^15) */ 42722830, /* 8.192MHz / (2*pi * 1000 / 2^15) */ @@ -506,6 +490,13 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev, default: return -EINVAL; } + case IIO_CHAN_INFO_FREQUENCY: + switch (chan->type) { + case IIO_ALTVOLTAGE: + return ad2s1210_get_excitation_frequency(st, val); + default: + return -EINVAL; + } case IIO_CHAN_INFO_HYSTERESIS: switch (chan->type) { case IIO_ANGL: @@ -523,9 +514,23 @@ static int ad2s1210_read_avail(struct iio_dev *indio_d= ev, const int **vals, int *type, int *length, long mask) { + static const int excitation_frequency_available[] =3D { + AD2S1210_MIN_EXCIT, + 250, /* step */ + AD2S1210_MAX_EXCIT, + }; static const int hysteresis_available[] =3D { 0, 1 }; =20 switch (mask) { + case IIO_CHAN_INFO_FREQUENCY: + switch (chan->type) { + case IIO_ALTVOLTAGE: + *type =3D IIO_VAL_INT; + *vals =3D excitation_frequency_available; + return IIO_AVAIL_RANGE; + default: + return -EINVAL; + } case IIO_CHAN_INFO_HYSTERESIS: switch (chan->type) { case IIO_ANGL: @@ -548,6 +553,13 @@ static int ad2s1210_write_raw(struct iio_dev *indio_de= v, struct ad2s1210_state *st =3D iio_priv(indio_dev); =20 switch (mask) { + case IIO_CHAN_INFO_FREQUENCY: + switch (chan->type) { + case IIO_ALTVOLTAGE: + return ad2s1210_set_excitation_frequency(st, val); + default: + return -EINVAL; + } case IIO_CHAN_INFO_HYSTERESIS: switch (chan->type) { case IIO_ANGL: @@ -560,8 +572,6 @@ static int ad2s1210_write_raw(struct iio_dev *indio_dev, } } =20 -static IIO_DEVICE_ATTR(fexcit, 0644, - ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0); static IIO_DEVICE_ATTR(bits, 0644, ad2s1210_show_resolution, ad2s1210_store_resolution, 0); static IIO_DEVICE_ATTR(fault, 0644, @@ -605,11 +615,19 @@ static const struct iio_chan_spec ad2s1210_channels[]= =3D { .channel =3D 0, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), - } + }, { + /* excitation frequency output */ + .type =3D IIO_ALTVOLTAGE, + .indexed =3D 1, + .channel =3D 0, + .output =3D 1, + .scan_index =3D -1, + .info_mask_separate =3D BIT(IIO_CHAN_INFO_FREQUENCY), + .info_mask_separate_available =3D BIT(IIO_CHAN_INFO_FREQUENCY), + }, }; =20 static struct attribute *ad2s1210_attributes[] =3D { - &iio_dev_attr_fexcit.dev_attr.attr, &iio_dev_attr_bits.dev_attr.attr, &iio_dev_attr_fault.dev_attr.attr, &iio_dev_attr_los_thrd.dev_attr.attr, --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 312C7E728CF for ; Fri, 29 Sep 2023 17:50:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233549AbjI2Ru2 (ORCPT ); Fri, 29 Sep 2023 13:50:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41946 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233806AbjI2R0R (ORCPT ); Fri, 29 Sep 2023 13:26:17 -0400 Received: from mail-oo1-xc2b.google.com (mail-oo1-xc2b.google.com [IPv6:2607:f8b0:4864:20::c2b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2621F10E6 for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.26.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:26:02 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 18/27] staging: iio: resolver: ad2s1210: convert resolution to devicetree property Date: Fri, 29 Sep 2023 12:23:23 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-18-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner Selecting the resolution was implemented as the `bits` sysfs attribute. However, the selection of the resolution depends on how the hardware is wired and the specific application, so this is rather a job for devicetree to describe. A new devicetree property `adi,resolution` to specify the resolution required for each chip is added and the `bits` sysfs attribute is removed. Since the resolution is now supplied by a devicetree property, the resolution-gpios are now optional and we can allow for the case where the resolution pins on the AD2S1210 are hard-wired instead of requiring them to be connected to gpios. Signed-off-by: David Lechner --- v3 changes: * Fixed multiline comment style. drivers/staging/iio/resolver/ad2s1210.c | 136 ++++++++++++++--------------= ---- 1 file changed, 61 insertions(+), 75 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 6accb9e3db46..a0a426d0af19 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -63,6 +63,13 @@ enum ad2s1210_mode { MOD_CONFIG =3D 0b11, }; =20 +enum ad2s1210_resolution { + AD2S1210_RES_10 =3D 0b00, + AD2S1210_RES_12 =3D 0b01, + AD2S1210_RES_14 =3D 0b10, + AD2S1210_RES_16 =3D 0b11, +}; + struct ad2s1210_state { struct mutex lock; struct spi_device *sdev; @@ -70,13 +77,12 @@ struct ad2s1210_state { struct gpio_desc *sample_gpio; /** GPIO pins connected to A0 and A1 lines. */ struct gpio_descs *mode_gpios; - /** GPIO pins connected to RES0 and RES1 lines. */ - struct gpio_descs *resolution_gpios; /** Used to access config registers. */ struct regmap *regmap; /** The external oscillator frequency in Hz. */ unsigned long clkin_hz; - u8 resolution; + /** The selected resolution */ + enum ad2s1210_resolution resolution; /** For reading raw sample value via SPI. */ __be16 sample __aligned(IIO_DMA_MINALIGN); /** SPI transmit buffer. */ @@ -212,62 +218,6 @@ static int ad2s1210_reinit_excitation_frequency(struct= ad2s1210_state *st, return regmap_write(st->regmap, AD2S1210_REG_SOFT_RESET, 0); } =20 -static int ad2s1210_set_resolution_gpios(struct ad2s1210_state *st, - u8 resolution) -{ - struct gpio_descs *gpios =3D st->resolution_gpios; - DECLARE_BITMAP(bitmap, 2); - - bitmap[0] =3D (resolution - 10) >> 1; - - return gpiod_set_array_value(gpios->ndescs, gpios->desc, gpios->info, - bitmap); -} - -static ssize_t ad2s1210_show_resolution(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - - return sprintf(buf, "%d\n", st->resolution); -} - -static ssize_t ad2s1210_store_resolution(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t len) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - unsigned char data; - unsigned char udata; - int ret; - - ret =3D kstrtou8(buf, 10, &udata); - if (ret || udata < 10 || udata > 16) { - dev_err(dev, "ad2s1210: resolution out of range\n"); - return -EINVAL; - } - - data =3D (udata - 10) >> 1; - - mutex_lock(&st->lock); - ret =3D regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL, - AD2S1210_SET_RES, data); - if (ret < 0) - goto error_ret; - - ret =3D ad2s1210_set_resolution_gpios(st, udata); - if (ret < 0) - goto error_ret; - - st->resolution =3D udata; - ret =3D len; - -error_ret: - mutex_unlock(&st->lock); - return ret; -} - /* read the fault register since last sample */ static ssize_t ad2s1210_show_fault(struct device *dev, struct device_attribute *attr, char *buf) @@ -572,8 +522,6 @@ static int ad2s1210_write_raw(struct iio_dev *indio_dev, } } =20 -static IIO_DEVICE_ATTR(bits, 0644, - ad2s1210_show_resolution, ad2s1210_store_resolution, 0); static IIO_DEVICE_ATTR(fault, 0644, ad2s1210_show_fault, ad2s1210_clear_fault, 0); =20 @@ -628,7 +576,6 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { }; =20 static struct attribute *ad2s1210_attributes[] =3D { - &iio_dev_attr_bits.dev_attr.attr, &iio_dev_attr_fault.dev_attr.attr, &iio_dev_attr_los_thrd.dev_attr.attr, &iio_dev_attr_dos_ovr_thrd.dev_attr.attr, @@ -650,15 +597,12 @@ static int ad2s1210_initial(struct ad2s1210_state *st) int ret; =20 mutex_lock(&st->lock); - ret =3D ad2s1210_set_resolution_gpios(st, st->resolution); - if (ret < 0) - return ret; =20 /* Use default config register value plus resolution from devicetree. */ data =3D FIELD_PREP(AD2S1210_PHASE_LOCK_RANGE_44, 1); data |=3D FIELD_PREP(AD2S1210_ENABLE_HYSTERESIS, 1); data |=3D FIELD_PREP(AD2S1210_SET_ENRES, 0x3); - data |=3D FIELD_PREP(AD2S1210_SET_RES, (st->resolution - 10) >> 1); + data |=3D FIELD_PREP(AD2S1210_SET_RES, st->resolution); =20 ret =3D regmap_write(st->regmap, AD2S1210_REG_CONTROL, data); if (ret < 0) @@ -698,6 +642,26 @@ static const struct iio_info ad2s1210_info =3D { .debugfs_reg_access =3D &ad2s1210_debugfs_reg_access, }; =20 +static int ad2s1210_setup_properties(struct ad2s1210_state *st) +{ + struct device *dev =3D &st->sdev->dev; + u32 val; + int ret; + + ret =3D device_property_read_u32(dev, "assigned-resolution-bits", &val); + if (ret < 0) + return dev_err_probe(dev, ret, + "failed to read assigned-resolution-bits property\n"); + + if (val < 10 || val > 16) + return dev_err_probe(dev, -EINVAL, + "resolution out of range: %u\n", val); + + st->resolution =3D (val - 10) >> 1; + + return 0; +} + static int ad2s1210_setup_clocks(struct ad2s1210_state *st) { struct device *dev =3D &st->sdev->dev; @@ -719,6 +683,9 @@ static int ad2s1210_setup_clocks(struct ad2s1210_state = *st) static int ad2s1210_setup_gpios(struct ad2s1210_state *st) { struct device *dev =3D &st->sdev->dev; + struct gpio_descs *resolution_gpios; + DECLARE_BITMAP(bitmap, 2); + int ret; =20 /* should not be sampling on startup */ st->sample_gpio =3D devm_gpiod_get(dev, "sample", GPIOD_OUT_LOW); @@ -736,16 +703,32 @@ static int ad2s1210_setup_gpios(struct ad2s1210_state= *st) return dev_err_probe(dev, -EINVAL, "requires exactly 2 mode-gpios\n"); =20 - /* both pins high means that we start with 16-bit resolution */ - st->resolution_gpios =3D devm_gpiod_get_array(dev, "resolution", - GPIOD_OUT_HIGH); - if (IS_ERR(st->resolution_gpios)) - return dev_err_probe(dev, PTR_ERR(st->resolution_gpios), + /* + * If resolution gpios are provided, they get set to the required + * resolution, otherwise it is assumed the RES0 and RES1 pins are + * hard-wired to match the resolution indicated in the devicetree. + */ + resolution_gpios =3D devm_gpiod_get_array_optional(dev, "resolution", + GPIOD_ASIS); + if (IS_ERR(resolution_gpios)) + return dev_err_probe(dev, PTR_ERR(resolution_gpios), "failed to request resolution GPIOs\n"); =20 - if (st->resolution_gpios->ndescs !=3D 2) - return dev_err_probe(dev, -EINVAL, - "requires exactly 2 resolution-gpios\n"); + if (resolution_gpios) { + if (resolution_gpios->ndescs !=3D 2) + return dev_err_probe(dev, -EINVAL, + "requires exactly 2 resolution-gpios\n"); + + bitmap[0] =3D st->resolution; + + ret =3D gpiod_set_array_value(resolution_gpios->ndescs, + resolution_gpios->desc, + resolution_gpios->info, + bitmap); + if (ret < 0) + return dev_err_probe(dev, ret, + "failed to set resolution gpios\n"); + } =20 return 0; } @@ -809,7 +792,10 @@ static int ad2s1210_probe(struct spi_device *spi) =20 mutex_init(&st->lock); st->sdev =3D spi; - st->resolution =3D 12; + + ret =3D ad2s1210_setup_properties(st); + if (ret < 0) + return ret; =20 ret =3D ad2s1210_setup_clocks(st); if (ret < 0) --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89ABCE728CC for ; Fri, 29 Sep 2023 17:26:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233935AbjI2R0u (ORCPT ); Fri, 29 Sep 2023 13:26:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233741AbjI2R0S (ORCPT ); Fri, 29 Sep 2023 13:26:18 -0400 Received: from mail-oo1-xc2c.google.com (mail-oo1-xc2c.google.com [IPv6:2607:f8b0:4864:20::c2c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0CE6B10F7 for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.26.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:26:03 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 19/27] staging: iio: resolver: ad2s1210: add phase lock range support Date: Fri, 29 Sep 2023 12:23:24 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-19-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner The AD2S1210 chip has a phase lock range feature that allows selecting the allowable phase difference between the excitation output and the sine and cosine inputs. This can be set to either 44 degrees (default) or 360 degrees. This patch adds a new phase channel with a threshold event that can be used to configure the phase lock range. Actually emitting the event will be added in a subsequent patch. Signed-off-by: David Lechner --- v3 changes: * This is a new patch to replace "staging: iio: resolver: ad2s1210: add phase_lock_range attributes" drivers/staging/iio/resolver/ad2s1210.c | 125 ++++++++++++++++++++++++++++= ++++ 1 file changed, 125 insertions(+) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index a0a426d0af19..bafc134eed97 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -56,6 +56,13 @@ #define AD2S1210_MIN_FCW 0x4 #define AD2S1210_MAX_FCW 0x50 =20 +/* 44 degrees ~=3D 0.767945 radians */ +#define PHASE_44_DEG_TO_RAD_INT 0 +#define PHASE_44_DEG_TO_RAD_MICRO 767945 +/* 360 degrees ~=3D 6.283185 radians */ +#define PHASE_360_DEG_TO_RAD_INT 6 +#define PHASE_360_DEG_TO_RAD_MICRO 283185 + enum ad2s1210_mode { MOD_POS =3D 0b00, MOD_VEL =3D 0b01, @@ -376,6 +383,54 @@ static int ad2s1210_set_hysteresis(struct ad2s1210_sta= te *st, int val) return ret; } =20 +static int ad2s1210_get_phase_lock_range(struct ad2s1210_state *st, + int *val, int *val2) +{ + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_test_bits(st->regmap, AD2S1210_REG_CONTROL, + AD2S1210_PHASE_LOCK_RANGE_44); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + if (ret) { + /* 44 degrees as radians */ + *val =3D PHASE_44_DEG_TO_RAD_INT; + *val2 =3D PHASE_44_DEG_TO_RAD_MICRO; + } else { + /* 360 degrees as radians */ + *val =3D PHASE_360_DEG_TO_RAD_INT; + *val2 =3D PHASE_360_DEG_TO_RAD_MICRO; + } + + return IIO_VAL_INT_PLUS_MICRO; +} + +static int ad2s1210_set_phase_lock_range(struct ad2s1210_state *st, + int val, int val2) +{ + int deg, ret; + + /* convert radians to degrees - only two allowable values */ + if (val =3D=3D PHASE_44_DEG_TO_RAD_INT && val2 =3D=3D PHASE_44_DEG_TO_RAD= _MICRO) + deg =3D 44; + else if (val =3D=3D PHASE_360_DEG_TO_RAD_INT && + val2 =3D=3D PHASE_360_DEG_TO_RAD_MICRO) + deg =3D 360; + else + return -EINVAL; + + mutex_lock(&st->lock); + ret =3D regmap_update_bits(st->regmap, AD2S1210_REG_CONTROL, + AD2S1210_PHASE_LOCK_RANGE_44, + deg =3D=3D 44 ? AD2S1210_PHASE_LOCK_RANGE_44 : 0); + mutex_unlock(&st->lock); + return ret; +} + static int ad2s1210_get_excitation_frequency(struct ad2s1210_state *st, in= t *val) { unsigned int reg_val; @@ -547,6 +602,16 @@ static IIO_DEVICE_ATTR(lot_low_thrd, 0644, ad2s1210_show_reg, ad2s1210_store_reg, AD2S1210_REG_LOT_LOW_THRD); =20 +static const struct iio_event_spec ad2s1210_phase_event_spec[] =3D { + { + /* Phase error fault. */ + .type =3D IIO_EV_TYPE_MAG, + .dir =3D IIO_EV_DIR_NONE, + /* Phase lock range. */ + .mask_separate =3D BIT(IIO_EV_INFO_VALUE), + }, +}; + static const struct iio_chan_spec ad2s1210_channels[] =3D { { .type =3D IIO_ANGL, @@ -563,6 +628,14 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { .channel =3D 0, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), + }, { + /* used to configure phase lock range and get phase lock error */ + .type =3D IIO_PHASE, + .indexed =3D 1, + .channel =3D 0, + .scan_index =3D -1, + .event_spec =3D ad2s1210_phase_event_spec, + .num_event_specs =3D ARRAY_SIZE(ad2s1210_phase_event_spec), }, { /* excitation frequency output */ .type =3D IIO_ALTVOLTAGE, @@ -591,6 +664,21 @@ static const struct attribute_group ad2s1210_attribute= _group =3D { .attrs =3D ad2s1210_attributes, }; =20 +IIO_CONST_ATTR(in_phase0_mag_value_available, + __stringify(PHASE_44_DEG_TO_RAD_INT) "." + __stringify(PHASE_44_DEG_TO_RAD_MICRO) " " + __stringify(PHASE_360_DEG_TO_RAD_INT) "." + __stringify(PHASE_360_DEG_TO_RAD_MICRO)); + +static struct attribute *ad2s1210_event_attributes[] =3D { + &iio_const_attr_in_phase0_mag_value_available.dev_attr.attr, + NULL, +}; + +static const struct attribute_group ad2s1210_event_attribute_group =3D { + .attrs =3D ad2s1210_event_attributes, +}; + static int ad2s1210_initial(struct ad2s1210_state *st) { unsigned char data; @@ -615,6 +703,40 @@ static int ad2s1210_initial(struct ad2s1210_state *st) return ret; } =20 +static int ad2s1210_read_event_value(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int *val, int *val2) +{ + struct ad2s1210_state *st =3D iio_priv(indio_dev); + + switch (chan->type) { + case IIO_PHASE: + return ad2s1210_get_phase_lock_range(st, val, val2); + default: + return -EINVAL; + } +} + +static int ad2s1210_write_event_value(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int val, int val2) +{ + struct ad2s1210_state *st =3D iio_priv(indio_dev); + + switch (chan->type) { + case IIO_PHASE: + return ad2s1210_set_phase_lock_range(st, val, val2); + default: + return -EINVAL; + } +} + static int ad2s1210_debugfs_reg_access(struct iio_dev *indio_dev, unsigned int reg, unsigned int writeval, unsigned int *readval) @@ -635,10 +757,13 @@ static int ad2s1210_debugfs_reg_access(struct iio_dev= *indio_dev, } =20 static const struct iio_info ad2s1210_info =3D { + .event_attrs =3D &ad2s1210_event_attribute_group, .read_raw =3D ad2s1210_read_raw, .read_avail =3D ad2s1210_read_avail, .write_raw =3D ad2s1210_write_raw, .attrs =3D &ad2s1210_attribute_group, + .read_event_value =3D ad2s1210_read_event_value, + .write_event_value =3D ad2s1210_write_event_value, .debugfs_reg_access =3D &ad2s1210_debugfs_reg_access, }; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.26.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:26:04 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 20/27] staging: iio: resolver: ad2s1210: add triggered buffer support Date: Fri, 29 Sep 2023 12:23:25 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-20-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner This adds support for triggered buffers to the AD2S1210 resolver driver. Signed-off-by: David Lechner --- v3 changes: * Dropped setting datasheet_name of channels. drivers/staging/iio/resolver/ad2s1210.c | 83 +++++++++++++++++++++++++++++= +++- 1 file changed, 82 insertions(+), 1 deletion(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index bafc134eed97..c0bc9eac18e8 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -20,8 +20,11 @@ #include #include =20 +#include #include #include +#include +#include =20 #define DRV_NAME "ad2s1210" =20 @@ -92,6 +95,12 @@ struct ad2s1210_state { enum ad2s1210_resolution resolution; /** For reading raw sample value via SPI. */ __be16 sample __aligned(IIO_DMA_MINALIGN); + /** Scan buffer */ + struct { + __be16 chan[2]; + /* Ensure timestamp is naturally aligned. */ + s64 timestamp __aligned(8); + } scan; /** SPI transmit buffer. */ u8 rx[2]; /** SPI receive buffer. */ @@ -617,6 +626,13 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { .type =3D IIO_ANGL, .indexed =3D 1, .channel =3D 0, + .scan_index =3D 0, + .scan_type =3D { + .sign =3D 'u', + .realbits =3D 16, + .storagebits =3D 16, + .endianness =3D IIO_BE, + }, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_HYSTERESIS), @@ -626,9 +642,18 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { .type =3D IIO_ANGL_VEL, .indexed =3D 1, .channel =3D 0, + .scan_index =3D 1, + .scan_type =3D { + .sign =3D 's', + .realbits =3D 16, + .storagebits =3D 16, + .endianness =3D IIO_BE, + }, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), - }, { + }, + IIO_CHAN_SOFT_TIMESTAMP(2), + { /* used to configure phase lock range and get phase lock error */ .type =3D IIO_PHASE, .indexed =3D 1, @@ -756,6 +781,55 @@ static int ad2s1210_debugfs_reg_access(struct iio_dev = *indio_dev, return ret; } =20 +static irqreturn_t ad2s1210_trigger_handler(int irq, void *p) +{ + struct iio_poll_func *pf =3D p; + struct iio_dev *indio_dev =3D pf->indio_dev; + struct ad2s1210_state *st =3D iio_priv(indio_dev); + size_t chan =3D 0; + int ret; + + mutex_lock(&st->lock); + + memset(&st->scan, 0, sizeof(st->scan)); + gpiod_set_value(st->sample_gpio, 1); + + if (test_bit(0, indio_dev->active_scan_mask)) { + ret =3D ad2s1210_set_mode(st, MOD_POS); + if (ret < 0) + goto error_ret; + + /* REVIST: we can read 3 bytes here and also get fault flags */ + ret =3D spi_read(st->sdev, st->rx, 2); + if (ret < 0) + goto error_ret; + + memcpy(&st->scan.chan[chan++], st->rx, 2); + } + + if (test_bit(1, indio_dev->active_scan_mask)) { + ret =3D ad2s1210_set_mode(st, MOD_VEL); + if (ret < 0) + goto error_ret; + + /* REVIST: we can read 3 bytes here and also get fault flags */ + ret =3D spi_read(st->sdev, st->rx, 2); + if (ret < 0) + goto error_ret; + + memcpy(&st->scan.chan[chan++], st->rx, 2); + } + + iio_push_to_buffers_with_timestamp(indio_dev, &st->scan, pf->timestamp); + +error_ret: + gpiod_set_value(st->sample_gpio, 0); + mutex_unlock(&st->lock); + iio_trigger_notify_done(indio_dev->trig); + + return IRQ_HANDLED; +} + static const struct iio_info ad2s1210_info =3D { .event_attrs =3D &ad2s1210_event_attribute_group, .read_raw =3D ad2s1210_read_raw, @@ -944,6 +1018,13 @@ static int ad2s1210_probe(struct spi_device *spi) indio_dev->num_channels =3D ARRAY_SIZE(ad2s1210_channels); indio_dev->name =3D spi_get_device_id(spi)->name; =20 + ret =3D devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, + &iio_pollfunc_store_time, + &ad2s1210_trigger_handler, NULL); + if (ret < 0) + return dev_err_probe(&spi->dev, ret, + "iio triggered buffer setup failed\n"); + return devm_iio_device_register(&spi->dev, indio_dev); } =20 --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8188DE728CE for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.26.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:26:05 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 21/27] staging: iio: resolver: ad2s1210: convert LOT threshold attrs to event attrs Date: Fri, 29 Sep 2023 12:23:26 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-21-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner The AD2S1210 monitors the internal error signal (difference between estimated angle and measured angle) to determine a loss of position tracking (LOT) condition. When the error value exceeds a threshold, a fault is triggered. This threshold is user-configurable. This patch converts the custom lot_high_thrd and lot_low_thrd attributes in the ad2s1210 driver to standard event attributes. This will allow tooling to be able to expose these in a generic way. Since the low threshold determines the hysteresis, it requires some special handling to expose the difference between the high and low register values as the hysteresis instead of exposing the low register value directly. The attributes also return the values in radians now as required by the ABI. Actually emitting the fault event will be done in a later patch. Signed-off-by: David Lechner --- v3 changes: This is a new patch in v3 drivers/staging/iio/resolver/ad2s1210.c | 191 ++++++++++++++++++++++++++++= ++-- 1 file changed, 183 insertions(+), 8 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index c0bc9eac18e8..5cc8106800d6 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -440,6 +440,123 @@ static int ad2s1210_set_phase_lock_range(struct ad2s1= 210_state *st, return ret; } =20 +/* map resolution to microradians/LSB for LOT registers */ +static const int ad2s1210_lot_threshold_urad_per_lsb[] =3D { + 6184, /* 10-bit: ~0.35 deg/LSB, 45 deg max */ + 2473, /* 12-bit: ~0.14 deg/LSB, 18 deg max */ + 1237, /* 14-bit: ~0.07 deg/LSB, 9 deg max */ + 1237, /* 16-bit: same as 14-bit */ +}; + +static int ad2s1210_get_lot_high_threshold(struct ad2s1210_state *st, + int *val, int *val2) +{ + unsigned int reg_val; + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, ®_val); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + *val =3D 0; + *val2 =3D reg_val * ad2s1210_lot_threshold_urad_per_lsb[st->resolution]; + return IIO_VAL_INT_PLUS_MICRO; +} + +static int ad2s1210_set_lot_high_threshold(struct ad2s1210_state *st, + int val, int val2) +{ + unsigned int high_reg_val, low_reg_val, hysteresis; + int ret; + + /* all valid values are between 0 and pi/4 radians */ + if (val !=3D 0) + return -EINVAL; + + mutex_lock(&st->lock); + /* + * We need to read both high and low registers first so we can preserve + * the hysteresis. + */ + ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, &high_reg_val= ); + if (ret < 0) + goto error_ret; + + ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_LOW_THRD, &low_reg_val); + if (ret < 0) + goto error_ret; + + hysteresis =3D high_reg_val - low_reg_val; + high_reg_val =3D val2 / ad2s1210_lot_threshold_urad_per_lsb[st->resolutio= n]; + low_reg_val =3D high_reg_val - hysteresis; + + ret =3D regmap_write(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, high_reg_val= ); + if (ret < 0) + goto error_ret; + + ret =3D regmap_write(st->regmap, AD2S1210_REG_LOT_LOW_THRD, low_reg_val); + +error_ret: + mutex_unlock(&st->lock); + + return ret; +} + +static int ad2s1210_get_lot_low_threshold(struct ad2s1210_state *st, + int *val, int *val2) +{ + unsigned int high_reg_val, low_reg_val; + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, &high_reg_val= ); + if (ret < 0) + goto error_ret; + + ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_LOW_THRD, &low_reg_val); + +error_ret: + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + /* sysfs value is hysteresis rather than actual low value */ + *val =3D 0; + *val2 =3D (high_reg_val - low_reg_val) * + ad2s1210_lot_threshold_urad_per_lsb[st->resolution]; + return IIO_VAL_INT_PLUS_MICRO; +} + +static int ad2s1210_set_lot_low_threshold(struct ad2s1210_state *st, + int val, int val2) +{ + unsigned int reg_val, hysteresis; + int ret; + + /* all valid values are between 0 and pi/4 radians */ + if (val !=3D 0) + return -EINVAL; + + hysteresis =3D val2 / ad2s1210_lot_threshold_urad_per_lsb[st->resolution]; + + mutex_lock(&st->lock); + ret =3D regmap_read(st->regmap, AD2S1210_REG_LOT_HIGH_THRD, ®_val); + if (ret < 0) + goto error_ret; + + ret =3D regmap_write(st->regmap, AD2S1210_REG_LOT_LOW_THRD, + reg_val - hysteresis); + +error_ret: + mutex_unlock(&st->lock); + + return ret; +} + static int ad2s1210_get_excitation_frequency(struct ad2s1210_state *st, in= t *val) { unsigned int reg_val; @@ -604,12 +721,19 @@ static IIO_DEVICE_ATTR(dos_rst_max_thrd, 0644, static IIO_DEVICE_ATTR(dos_rst_min_thrd, 0644, ad2s1210_show_reg, ad2s1210_store_reg, AD2S1210_REG_DOS_RST_MIN_THRD); -static IIO_DEVICE_ATTR(lot_high_thrd, 0644, - ad2s1210_show_reg, ad2s1210_store_reg, - AD2S1210_REG_LOT_HIGH_THRD); -static IIO_DEVICE_ATTR(lot_low_thrd, 0644, - ad2s1210_show_reg, ad2s1210_store_reg, - AD2S1210_REG_LOT_LOW_THRD); + +static const struct iio_event_spec ad2s1210_position_event_spec[] =3D { + { + /* Tracking error exceeds LOT threshold fault. */ + .type =3D IIO_EV_TYPE_THRESH, + .dir =3D IIO_EV_DIR_RISING, + .mask_separate =3D + /* Loss of tracking high threshold. */ + BIT(IIO_EV_INFO_VALUE) | + /* Loss of tracking low threshold. */ + BIT(IIO_EV_INFO_HYSTERESIS), + }, +}; =20 static const struct iio_event_spec ad2s1210_phase_event_spec[] =3D { { @@ -653,6 +777,15 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { BIT(IIO_CHAN_INFO_SCALE), }, IIO_CHAN_SOFT_TIMESTAMP(2), + { + /* used to configure LOT thresholds and get tracking error */ + .type =3D IIO_ANGL, + .indexed =3D 1, + .channel =3D 1, + .scan_index =3D -1, + .event_spec =3D ad2s1210_position_event_spec, + .num_event_specs =3D ARRAY_SIZE(ad2s1210_position_event_spec), + }, { /* used to configure phase lock range and get phase lock error */ .type =3D IIO_PHASE, @@ -680,8 +813,6 @@ static struct attribute *ad2s1210_attributes[] =3D { &iio_dev_attr_dos_mis_thrd.dev_attr.attr, &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr, &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr, - &iio_dev_attr_lot_high_thrd.dev_attr.attr, - &iio_dev_attr_lot_low_thrd.dev_attr.attr, NULL, }; =20 @@ -689,14 +820,40 @@ static const struct attribute_group ad2s1210_attribut= e_group =3D { .attrs =3D ad2s1210_attributes, }; =20 +static ssize_t +in_angl1_thresh_rising_value_available_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); + int step =3D ad2s1210_lot_threshold_urad_per_lsb[st->resolution]; + + return sysfs_emit(buf, "[0 0.%06d 0.%06d]\n", step, step * 0x7F); +} + +static ssize_t +in_angl1_thresh_rising_hysteresis_available_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); + int step =3D ad2s1210_lot_threshold_urad_per_lsb[st->resolution]; + + return sysfs_emit(buf, "[0 0.%06d 0.%06d]\n", step, step * 0x7F); +} + IIO_CONST_ATTR(in_phase0_mag_value_available, __stringify(PHASE_44_DEG_TO_RAD_INT) "." __stringify(PHASE_44_DEG_TO_RAD_MICRO) " " __stringify(PHASE_360_DEG_TO_RAD_INT) "." __stringify(PHASE_360_DEG_TO_RAD_MICRO)); +IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_value_available, 0); +IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_hysteresis_available, 0); =20 static struct attribute *ad2s1210_event_attributes[] =3D { &iio_const_attr_in_phase0_mag_value_available.dev_attr.attr, + &iio_dev_attr_in_angl1_thresh_rising_value_available.dev_attr.attr, + &iio_dev_attr_in_angl1_thresh_rising_hysteresis_available.dev_attr.attr, NULL, }; =20 @@ -738,6 +895,15 @@ static int ad2s1210_read_event_value(struct iio_dev *i= ndio_dev, struct ad2s1210_state *st =3D iio_priv(indio_dev); =20 switch (chan->type) { + case IIO_ANGL: + switch (info) { + case IIO_EV_INFO_VALUE: + return ad2s1210_get_lot_high_threshold(st, val, val2); + case IIO_EV_INFO_HYSTERESIS: + return ad2s1210_get_lot_low_threshold(st, val, val2); + default: + return -EINVAL; + } case IIO_PHASE: return ad2s1210_get_phase_lock_range(st, val, val2); default: @@ -755,6 +921,15 @@ static int ad2s1210_write_event_value(struct iio_dev *= indio_dev, struct ad2s1210_state *st =3D iio_priv(indio_dev); =20 switch (chan->type) { + case IIO_ANGL: + switch (info) { + case IIO_EV_INFO_VALUE: + return ad2s1210_set_lot_high_threshold(st, val, val2); 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.26.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:26:06 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 22/27] staging: iio: resolver: ad2s1210: convert LOS threshold to event attr Date: Fri, 29 Sep 2023 12:23:27 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-22-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner The AD2S1210 has a programmable threshold for the loss of signal (LOS) fault. This fault is triggered when either the sine or cosine input falls below the threshold voltage. This patch converts the custom device LOS threshold attribute to an event falling edge threshold attribute on a new monitor signal channel. The monitor signal is an internal signal that combines the amplitudes of the sine and cosine inputs as well as the current angle and position output. This signal is used to detect faults in the input signals. The attribute now uses millivolts instead of the raw register value in accordance with the IIO ABI. Emitting the event will be implemented in a later patch. Signed-off-by: David Lechner --- v3 changes: This is a new patch in v3 drivers/staging/iio/resolver/ad2s1210.c | 75 +++++++++++++++++++++++++++++= ++-- 1 file changed, 71 insertions(+), 4 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 5cc8106800d6..7abbc184c351 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -66,6 +66,11 @@ #define PHASE_360_DEG_TO_RAD_INT 6 #define PHASE_360_DEG_TO_RAD_MICRO 283185 =20 +/* Threshold voltage registers have 1 LSB =3D=3D 38 mV */ +#define THRESHOLD_MILLIVOLT_PER_LSB 38 +/* max voltage for threshold registers is 0x7F * 38 mV */ +#define THRESHOLD_RANGE_STR "[0 38 4826]" + enum ad2s1210_mode { MOD_POS =3D 0b00, MOD_VEL =3D 0b01, @@ -448,6 +453,38 @@ static const int ad2s1210_lot_threshold_urad_per_lsb[]= =3D { 1237, /* 16-bit: same as 14-bit */ }; =20 +static int ad2s1210_get_voltage_threshold(struct ad2s1210_state *st, + unsigned int reg, int *val) +{ + unsigned int reg_val; + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_read(st->regmap, reg, ®_val); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + *val =3D reg_val * THRESHOLD_MILLIVOLT_PER_LSB; + return IIO_VAL_INT; +} + +static int ad2s1210_set_voltage_threshold(struct ad2s1210_state *st, + unsigned int reg, int val) +{ + unsigned int reg_val; + int ret; + + reg_val =3D val / THRESHOLD_MILLIVOLT_PER_LSB; + + mutex_lock(&st->lock); + ret =3D regmap_write(st->regmap, reg, reg_val); + mutex_unlock(&st->lock); + + return ret; +} + static int ad2s1210_get_lot_high_threshold(struct ad2s1210_state *st, int *val, int *val2) { @@ -706,9 +743,6 @@ static int ad2s1210_write_raw(struct iio_dev *indio_dev, static IIO_DEVICE_ATTR(fault, 0644, ad2s1210_show_fault, ad2s1210_clear_fault, 0); =20 -static IIO_DEVICE_ATTR(los_thrd, 0644, - ad2s1210_show_reg, ad2s1210_store_reg, - AD2S1210_REG_LOS_THRD); static IIO_DEVICE_ATTR(dos_ovr_thrd, 0644, ad2s1210_show_reg, ad2s1210_store_reg, AD2S1210_REG_DOS_OVR_THRD); @@ -745,6 +779,16 @@ static const struct iio_event_spec ad2s1210_phase_even= t_spec[] =3D { }, }; =20 +static const struct iio_event_spec ad2s1210_monitor_signal_event_spec[] = =3D { + { + /* Sine/cosine below LOS threshold fault. */ + .type =3D IIO_EV_TYPE_THRESH, + .dir =3D IIO_EV_DIR_FALLING, + /* Loss of signal threshold. */ + .mask_separate =3D BIT(IIO_EV_INFO_VALUE), + }, +}; + static const struct iio_chan_spec ad2s1210_channels[] =3D { { .type =3D IIO_ANGL, @@ -803,12 +847,19 @@ static const struct iio_chan_spec ad2s1210_channels[]= =3D { .scan_index =3D -1, .info_mask_separate =3D BIT(IIO_CHAN_INFO_FREQUENCY), .info_mask_separate_available =3D BIT(IIO_CHAN_INFO_FREQUENCY), + }, { + /* monitor signal */ + .type =3D IIO_ALTVOLTAGE, + .indexed =3D 1, + .channel =3D 0, + .scan_index =3D -1, + .event_spec =3D ad2s1210_monitor_signal_event_spec, + .num_event_specs =3D ARRAY_SIZE(ad2s1210_monitor_signal_event_spec), }, }; =20 static struct attribute *ad2s1210_attributes[] =3D { &iio_dev_attr_fault.dev_attr.attr, - &iio_dev_attr_los_thrd.dev_attr.attr, &iio_dev_attr_dos_ovr_thrd.dev_attr.attr, &iio_dev_attr_dos_mis_thrd.dev_attr.attr, &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr, @@ -847,11 +898,13 @@ IIO_CONST_ATTR(in_phase0_mag_value_available, __stringify(PHASE_44_DEG_TO_RAD_MICRO) " " __stringify(PHASE_360_DEG_TO_RAD_INT) "." __stringify(PHASE_360_DEG_TO_RAD_MICRO)); +IIO_CONST_ATTR(in_altvoltage0_thresh_falling_value_available, THRESHOLD_RA= NGE_STR); IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_value_available, 0); IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_hysteresis_available, 0); =20 static struct attribute *ad2s1210_event_attributes[] =3D { &iio_const_attr_in_phase0_mag_value_available.dev_attr.attr, + &iio_const_attr_in_altvoltage0_thresh_falling_value_available.dev_attr.at= tr, &iio_dev_attr_in_angl1_thresh_rising_value_available.dev_attr.attr, &iio_dev_attr_in_angl1_thresh_rising_hysteresis_available.dev_attr.attr, NULL, @@ -904,6 +957,13 @@ static int ad2s1210_read_event_value(struct iio_dev *i= ndio_dev, default: return -EINVAL; } + case IIO_ALTVOLTAGE: + if (chan->output) + return -EINVAL; + if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_FALLING) + return ad2s1210_get_voltage_threshold(st, + AD2S1210_REG_LOS_THRD, val); + return -EINVAL; case IIO_PHASE: return ad2s1210_get_phase_lock_range(st, val, val2); default: @@ -930,6 +990,13 @@ static int ad2s1210_write_event_value(struct iio_dev *= indio_dev, default: return -EINVAL; } + case IIO_ALTVOLTAGE: + if (chan->output) + return -EINVAL; + if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_FALLING) + return ad2s1210_set_voltage_threshold(st, + AD2S1210_REG_LOS_THRD, val); + return -EINVAL; case IIO_PHASE: return ad2s1210_set_phase_lock_range(st, val, val2); default: --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57996E728CA for ; Fri, 29 Sep 2023 17:26:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233954AbjI2R07 (ORCPT ); Fri, 29 Sep 2023 13:26:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233764AbjI2R0W (ORCPT ); Fri, 29 Sep 2023 13:26:22 -0400 Received: from mail-ot1-x32a.google.com (mail-ot1-x32a.google.com [IPv6:2607:f8b0:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6A3F3171A for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.26.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:26:07 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 23/27] staging: iio: resolver: ad2s1210: convert DOS overrange threshold to event attr Date: Fri, 29 Sep 2023 12:23:28 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-23-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner The AD2S1210 has a programmable threshold for the degradation of signal (DOS) overrange fault. This fault is triggered when either the sine or cosine input rises the threshold voltage. This patch converts the custom device DOS overrange threshold attribute to an event rising edge threshold attribute on the monitor signal channel. The attribute now uses millivolts instead of the raw register value in accordance with the IIO ABI. Emitting the event will be implemented in a later patch. Signed-off-by: David Lechner --- v3 changes: This is a new patch in v3 drivers/staging/iio/resolver/ad2s1210.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 7abbc184c351..66def9f1dd1b 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -743,9 +743,6 @@ static int ad2s1210_write_raw(struct iio_dev *indio_dev, static IIO_DEVICE_ATTR(fault, 0644, ad2s1210_show_fault, ad2s1210_clear_fault, 0); =20 -static IIO_DEVICE_ATTR(dos_ovr_thrd, 0644, - ad2s1210_show_reg, ad2s1210_store_reg, - AD2S1210_REG_DOS_OVR_THRD); static IIO_DEVICE_ATTR(dos_mis_thrd, 0644, ad2s1210_show_reg, ad2s1210_store_reg, AD2S1210_REG_DOS_MIS_THRD); @@ -787,6 +784,13 @@ static const struct iio_event_spec ad2s1210_monitor_si= gnal_event_spec[] =3D { /* Loss of signal threshold. */ .mask_separate =3D BIT(IIO_EV_INFO_VALUE), }, + { + /* Sine/cosine DOS overrange fault.*/ + .type =3D IIO_EV_TYPE_THRESH, + .dir =3D IIO_EV_DIR_RISING, + /* Degredation of signal overrange threshold. */ + .mask_separate =3D BIT(IIO_EV_INFO_VALUE), + }, }; =20 static const struct iio_chan_spec ad2s1210_channels[] =3D { @@ -860,7 +864,6 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { =20 static struct attribute *ad2s1210_attributes[] =3D { &iio_dev_attr_fault.dev_attr.attr, - &iio_dev_attr_dos_ovr_thrd.dev_attr.attr, &iio_dev_attr_dos_mis_thrd.dev_attr.attr, &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr, &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr, @@ -899,12 +902,14 @@ IIO_CONST_ATTR(in_phase0_mag_value_available, __stringify(PHASE_360_DEG_TO_RAD_INT) "." __stringify(PHASE_360_DEG_TO_RAD_MICRO)); IIO_CONST_ATTR(in_altvoltage0_thresh_falling_value_available, THRESHOLD_RA= NGE_STR); +IIO_CONST_ATTR(in_altvoltage0_thresh_rising_value_available, THRESHOLD_RAN= GE_STR); IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_value_available, 0); IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_hysteresis_available, 0); =20 static struct attribute *ad2s1210_event_attributes[] =3D { &iio_const_attr_in_phase0_mag_value_available.dev_attr.attr, &iio_const_attr_in_altvoltage0_thresh_falling_value_available.dev_attr.at= tr, + &iio_const_attr_in_altvoltage0_thresh_rising_value_available.dev_attr.att= r, &iio_dev_attr_in_angl1_thresh_rising_value_available.dev_attr.attr, &iio_dev_attr_in_angl1_thresh_rising_hysteresis_available.dev_attr.attr, NULL, @@ -963,6 +968,9 @@ static int ad2s1210_read_event_value(struct iio_dev *in= dio_dev, if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_FALLING) return ad2s1210_get_voltage_threshold(st, AD2S1210_REG_LOS_THRD, val); + if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_RISING) + return ad2s1210_get_voltage_threshold(st, + AD2S1210_REG_DOS_OVR_THRD, val); return -EINVAL; case IIO_PHASE: return ad2s1210_get_phase_lock_range(st, val, val2); @@ -996,6 +1004,9 @@ static int ad2s1210_write_event_value(struct iio_dev *= indio_dev, if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_FALLING) return ad2s1210_set_voltage_threshold(st, AD2S1210_REG_LOS_THRD, val); + if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_RISING) + return ad2s1210_set_voltage_threshold(st, + AD2S1210_REG_DOS_OVR_THRD, val); return -EINVAL; case IIO_PHASE: return ad2s1210_set_phase_lock_range(st, val, val2); --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B441E728CA for ; Fri, 29 Sep 2023 17:27:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233960AbjI2R1D (ORCPT ); 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.26.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:26:08 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 24/27] staging: iio: resolver: ad2s1210: convert DOS mismatch threshold to event attr Date: Fri, 29 Sep 2023 12:23:29 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-24-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner The AD2S1210 has a programmable threshold for the degradation of signal (DOS) mismatch fault. This fault is triggered when the difference in voltage between the sine and cosine inputs exceeds the threshold. In other words, when the magnitude of sine and cosine inputs are equal, the AC component of the monitor signal is zero and when the magnitudes of the sine and cosine inputs are not equal, the AC component of the monitor signal is the difference between the sine and cosine inputs. So the fault occurs when the magnitude of the AC component of the monitor signal exceeds the DOS mismatch threshold voltage. This patch converts the custom device DOS mismatch threshold attribute to an event magnitude attribute on the monitor signal channel. The attribute now uses millivolts instead of the raw register value in accordance with the IIO ABI. Emitting the event will be implemented in a later patch. Signed-off-by: David Lechner --- v3 changes: This is a new patch in v3 drivers/staging/iio/resolver/ad2s1210.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index 66def9f1dd1b..aa14edbe8a77 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -743,9 +743,6 @@ static int ad2s1210_write_raw(struct iio_dev *indio_dev, static IIO_DEVICE_ATTR(fault, 0644, ad2s1210_show_fault, ad2s1210_clear_fault, 0); =20 -static IIO_DEVICE_ATTR(dos_mis_thrd, 0644, - ad2s1210_show_reg, ad2s1210_store_reg, - AD2S1210_REG_DOS_MIS_THRD); static IIO_DEVICE_ATTR(dos_rst_max_thrd, 0644, ad2s1210_show_reg, ad2s1210_store_reg, AD2S1210_REG_DOS_RST_MAX_THRD); @@ -791,6 +788,12 @@ static const struct iio_event_spec ad2s1210_monitor_si= gnal_event_spec[] =3D { /* Degredation of signal overrange threshold. */ .mask_separate =3D BIT(IIO_EV_INFO_VALUE), }, + { + /* Sine/cosine DOS mismatch fault.*/ + .type =3D IIO_EV_TYPE_MAG, + .dir =3D IIO_EV_DIR_NONE, + .mask_separate =3D BIT(IIO_EV_INFO_VALUE), + }, }; =20 static const struct iio_chan_spec ad2s1210_channels[] =3D { @@ -864,7 +867,6 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { =20 static struct attribute *ad2s1210_attributes[] =3D { &iio_dev_attr_fault.dev_attr.attr, - &iio_dev_attr_dos_mis_thrd.dev_attr.attr, &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr, &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr, NULL, @@ -903,6 +905,7 @@ IIO_CONST_ATTR(in_phase0_mag_value_available, __stringify(PHASE_360_DEG_TO_RAD_MICRO)); IIO_CONST_ATTR(in_altvoltage0_thresh_falling_value_available, THRESHOLD_RA= NGE_STR); IIO_CONST_ATTR(in_altvoltage0_thresh_rising_value_available, THRESHOLD_RAN= GE_STR); +IIO_CONST_ATTR(in_altvoltage0_mag_value_available, THRESHOLD_RANGE_STR); IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_value_available, 0); IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_hysteresis_available, 0); =20 @@ -910,6 +913,7 @@ static struct attribute *ad2s1210_event_attributes[] = =3D { &iio_const_attr_in_phase0_mag_value_available.dev_attr.attr, &iio_const_attr_in_altvoltage0_thresh_falling_value_available.dev_attr.at= tr, &iio_const_attr_in_altvoltage0_thresh_rising_value_available.dev_attr.att= r, + &iio_const_attr_in_altvoltage0_mag_value_available.dev_attr.attr, &iio_dev_attr_in_angl1_thresh_rising_value_available.dev_attr.attr, &iio_dev_attr_in_angl1_thresh_rising_hysteresis_available.dev_attr.attr, NULL, @@ -971,6 +975,9 @@ static int ad2s1210_read_event_value(struct iio_dev *in= dio_dev, if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_RISING) return ad2s1210_get_voltage_threshold(st, AD2S1210_REG_DOS_OVR_THRD, val); + if (type =3D=3D IIO_EV_TYPE_MAG) + return ad2s1210_get_voltage_threshold(st, + AD2S1210_REG_DOS_MIS_THRD, val); return -EINVAL; case IIO_PHASE: return ad2s1210_get_phase_lock_range(st, val, val2); @@ -1007,6 +1014,9 @@ static int ad2s1210_write_event_value(struct iio_dev = *indio_dev, if (type =3D=3D IIO_EV_TYPE_THRESH && dir =3D=3D IIO_EV_DIR_RISING) return ad2s1210_set_voltage_threshold(st, AD2S1210_REG_DOS_OVR_THRD, val); + if (type =3D=3D IIO_EV_TYPE_MAG) + return ad2s1210_set_voltage_threshold(st, + AD2S1210_REG_DOS_MIS_THRD, val); return -EINVAL; case IIO_PHASE: return ad2s1210_set_phase_lock_range(st, val, val2); --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9891FE728CD for ; Fri, 29 Sep 2023 17:27:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233860AbjI2R1J (ORCPT ); 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.26.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:26:09 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 25/27] staging: iio: resolver: ad2s1210: rename DOS reset min/max attrs Date: Fri, 29 Sep 2023 12:23:30 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-25-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner The AD2S1210 has a programmable threshold for the degradation of signal (DOS) mismatch fault. This fault is triggered when the difference in amplitude between the sine and cosine inputs exceeds the threshold. The DOS reset min/max registers on the chip provide initial values for internal tracking of the min/max of the monitor signal after the fault register is cleared. This patch converts the custom device DOS reset min/max threshold attributes custom event attributes on the monitor signal channel. The attributes now use millivolts instead of the raw register value in accordance with the IIO ABI. Emitting the event will be implemented in a later patch. Signed-off-by: David Lechner --- v3 changes: This is a new patch in v3 .../Documentation/sysfs-bus-iio-resolver-ad2s1210 | 27 ++++++ drivers/staging/iio/resolver/ad2s1210.c | 99 ++++++++++++------= ---- 2 files changed, 82 insertions(+), 44 deletions(-) diff --git a/drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1= 210 b/drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1210 new file mode 100644 index 000000000000..ea75881b0c77 --- /dev/null +++ b/drivers/staging/iio/Documentation/sysfs-bus-iio-resolver-ad2s1210 @@ -0,0 +1,27 @@ +What: /sys/bus/iio/devices/iio:deviceX/events/in_altvoltage0-altvoltage1_= thresh_rising_reset_max +KernelVersion: 6.7 +Contact: linux-iio@vger.kernel.org +Description: + Reading returns the current Degradation of Signal Reset Maximum + Threshold value in millivolts. Writing sets the value. + +What: /sys/bus/iio/devices/iio:deviceX/events/in_altvoltage0-altvoltage1_= thresh_rising_reset_max_available +KernelVersion: 6.7 +Contact: linux-iio@vger.kernel.org +Description: + Reading returns the allowable voltage range for + in_altvoltage0-altvoltage1_thresh_rising_reset_max. + +What: /sys/bus/iio/devices/iio:deviceX/events/in_altvoltage0-altvoltage1_= thresh_rising_reset_min +KernelVersion: 6.7 +Contact: linux-iio@vger.kernel.org +Description: + Reading returns the current Degradation of Signal Reset Minimum + Threshold value in millivolts. Writing sets the value. + +What: /sys/bus/iio/devices/iio:deviceX/events/in_altvoltage0-altvoltage1_= thresh_rising_reset_min_available +KernelVersion: 6.7 +Contact: linux-iio@vger.kernel.org +Description: + Reading returns the allowable voltage range for + in_altvoltage0-altvoltage1_thresh_rising_reset_min. diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index aa14edbe8a77..e1c95ec73545 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -283,41 +283,6 @@ static ssize_t ad2s1210_clear_fault(struct device *dev, return ret < 0 ? ret : len; } =20 -static ssize_t ad2s1210_show_reg(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - struct iio_dev_attr *iattr =3D to_iio_dev_attr(attr); - unsigned int value; - int ret; - - mutex_lock(&st->lock); - ret =3D regmap_read(st->regmap, iattr->address, &value); - mutex_unlock(&st->lock); - - return ret < 0 ? ret : sprintf(buf, "%d\n", value); -} - -static ssize_t ad2s1210_store_reg(struct device *dev, - struct device_attribute *attr, - const char *buf, size_t len) -{ - struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); - unsigned char data; - int ret; - struct iio_dev_attr *iattr =3D to_iio_dev_attr(attr); - - ret =3D kstrtou8(buf, 10, &data); - if (ret) - return -EINVAL; - - mutex_lock(&st->lock); - ret =3D regmap_write(st->regmap, iattr->address, data); - mutex_unlock(&st->lock); - return ret < 0 ? ret : len; -} - static int ad2s1210_single_conversion(struct ad2s1210_state *st, struct iio_chan_spec const *chan, int *val) @@ -743,13 +708,6 @@ static int ad2s1210_write_raw(struct iio_dev *indio_de= v, static IIO_DEVICE_ATTR(fault, 0644, ad2s1210_show_fault, ad2s1210_clear_fault, 0); =20 -static IIO_DEVICE_ATTR(dos_rst_max_thrd, 0644, - ad2s1210_show_reg, ad2s1210_store_reg, - AD2S1210_REG_DOS_RST_MAX_THRD); -static IIO_DEVICE_ATTR(dos_rst_min_thrd, 0644, - ad2s1210_show_reg, ad2s1210_store_reg, - AD2S1210_REG_DOS_RST_MIN_THRD); - static const struct iio_event_spec ad2s1210_position_event_spec[] =3D { { /* Tracking error exceeds LOT threshold fault. */ @@ -867,8 +825,6 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { =20 static struct attribute *ad2s1210_attributes[] =3D { &iio_dev_attr_fault.dev_attr.attr, - &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr, - &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr, NULL, }; =20 @@ -876,6 +832,49 @@ static const struct attribute_group ad2s1210_attribute= _group =3D { .attrs =3D ad2s1210_attributes, }; =20 +static ssize_t event_attr_voltage_reg_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); + struct iio_dev_attr *iattr =3D to_iio_dev_attr(attr); + unsigned int value; + int ret; + + mutex_lock(&st->lock); + ret =3D regmap_read(st->regmap, iattr->address, &value); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + return sprintf(buf, "%d\n", value * THRESHOLD_MILLIVOLT_PER_LSB); +} + +static ssize_t event_attr_voltage_reg_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t len) +{ + struct ad2s1210_state *st =3D iio_priv(dev_to_iio_dev(dev)); + struct iio_dev_attr *iattr =3D to_iio_dev_attr(attr); + u16 data; + int ret; + + ret =3D kstrtou16(buf, 10, &data); + if (ret) + return -EINVAL; + + mutex_lock(&st->lock); + ret =3D regmap_write(st->regmap, iattr->address, + data / THRESHOLD_MILLIVOLT_PER_LSB); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + return len; +} + static ssize_t in_angl1_thresh_rising_value_available_show(struct device *dev, struct device_attribute *attr, @@ -906,6 +905,14 @@ IIO_CONST_ATTR(in_phase0_mag_value_available, IIO_CONST_ATTR(in_altvoltage0_thresh_falling_value_available, THRESHOLD_RA= NGE_STR); IIO_CONST_ATTR(in_altvoltage0_thresh_rising_value_available, THRESHOLD_RAN= GE_STR); IIO_CONST_ATTR(in_altvoltage0_mag_value_available, THRESHOLD_RANGE_STR); +IIO_DEVICE_ATTR(in_altvoltage0_mag_reset_max, 0644, + event_attr_voltage_reg_show, event_attr_voltage_reg_store, + AD2S1210_REG_DOS_RST_MAX_THRD); +IIO_CONST_ATTR(in_altvoltage0_mag_reset_max_available, THRESHOLD_RANGE_STR= ); +IIO_DEVICE_ATTR(in_altvoltage0_mag_reset_min, 0644, + event_attr_voltage_reg_show, event_attr_voltage_reg_store, + AD2S1210_REG_DOS_RST_MIN_THRD); +IIO_CONST_ATTR(in_altvoltage0_mag_reset_min_available, THRESHOLD_RANGE_STR= ); IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_value_available, 0); IIO_DEVICE_ATTR_RO(in_angl1_thresh_rising_hysteresis_available, 0); =20 @@ -914,6 +921,10 @@ static struct attribute *ad2s1210_event_attributes[] = =3D { &iio_const_attr_in_altvoltage0_thresh_falling_value_available.dev_attr.at= tr, &iio_const_attr_in_altvoltage0_thresh_rising_value_available.dev_attr.att= r, &iio_const_attr_in_altvoltage0_mag_value_available.dev_attr.attr, + &iio_dev_attr_in_altvoltage0_mag_reset_max.dev_attr.attr, + &iio_const_attr_in_altvoltage0_mag_reset_max_available.dev_attr.attr, + &iio_dev_attr_in_altvoltage0_mag_reset_min.dev_attr.attr, + &iio_const_attr_in_altvoltage0_mag_reset_min_available.dev_attr.attr, &iio_dev_attr_in_angl1_thresh_rising_value_available.dev_attr.attr, &iio_dev_attr_in_angl1_thresh_rising_hysteresis_available.dev_attr.attr, NULL, --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F0E6E728CC for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.26.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:26:10 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 26/27] staging: iio: resolver: ad2s1210: implement fault events Date: Fri, 29 Sep 2023 12:23:31 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-26-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner When reading the position and velocity on the AD2S1210, there is also a 3rd byte following the two data bytes that contains the fault flag bits. This patch adds support for reading this byte and generating events when faults occur. The faults are mapped to various channels and event types in order to have a unique event for each fault. Signed-off-by: David Lechner --- v3 changes: This is a new patch in v3 drivers/staging/iio/resolver/ad2s1210.c | 175 ++++++++++++++++++++++++++++= +--- 1 file changed, 161 insertions(+), 14 deletions(-) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index e1c95ec73545..dc3cc3ab855e 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -21,6 +21,7 @@ #include =20 #include +#include #include #include #include @@ -35,6 +36,16 @@ #define AD2S1210_SET_ENRES GENMASK(3, 2) #define AD2S1210_SET_RES GENMASK(1, 0) =20 +/* fault register flags */ +#define AD2S1210_FAULT_CLIP BIT(7) +#define AD2S1210_FAULT_LOS BIT(6) +#define AD2S1210_FAULT_DOS_OVR BIT(5) +#define AD2S1210_FAULT_DOS_MIS BIT(4) +#define AD2S1210_FAULT_LOT BIT(3) +#define AD2S1210_FAULT_VELOCITY BIT(2) +#define AD2S1210_FAULT_PHASE BIT(1) +#define AD2S1210_FAULT_CONFIG_PARITY BIT(0) + #define AD2S1210_REG_POSITION_MSB 0x80 #define AD2S1210_REG_POSITION_LSB 0x81 #define AD2S1210_REG_VELOCITY_MSB 0x82 @@ -71,6 +82,8 @@ /* max voltage for threshold registers is 0x7F * 38 mV */ #define THRESHOLD_RANGE_STR "[0 38 4826]" =20 +#define FAULT_ONESHOT(bit, new, old) (new & bit && !(old & bit)) + enum ad2s1210_mode { MOD_POS =3D 0b00, MOD_VEL =3D 0b01, @@ -98,8 +111,13 @@ struct ad2s1210_state { unsigned long clkin_hz; /** The selected resolution */ enum ad2s1210_resolution resolution; + /** Copy of fault register from the previous read. */ + u8 prev_fault_flags; /** For reading raw sample value via SPI. */ - __be16 sample __aligned(IIO_DMA_MINALIGN); + struct { + __be16 raw; + u8 fault; + } sample __aligned(IIO_DMA_MINALIGN);; /** Scan buffer */ struct { __be16 chan[2]; @@ -158,7 +176,15 @@ static int ad2s1210_regmap_reg_write(void *context, un= signed int reg, if (ret < 0) return ret; =20 - return spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers)); + ret =3D spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers)); + if (ret < 0) + return ret; + + /* soft reset also clears the fault register */ + if (reg =3D=3D AD2S1210_REG_SOFT_RESET) + st->prev_fault_flags =3D 0; + + return 0; } =20 /* @@ -200,6 +226,10 @@ static int ad2s1210_regmap_reg_read(void *context, uns= igned int reg, if (ret < 0) return ret; =20 + /* reading the fault register also clears it */ + if (reg =3D=3D AD2S1210_REG_FAULT) + st->prev_fault_flags =3D 0; + /* * If the D7 bit is set on any read/write register, it indicates a * parity error. The fault register is read-only and the D7 bit means @@ -283,14 +313,92 @@ static ssize_t ad2s1210_clear_fault(struct device *de= v, return ret < 0 ? ret : len; } =20 -static int ad2s1210_single_conversion(struct ad2s1210_state *st, +static void ad2s1210_push_events(struct iio_dev *indio_dev, + u8 flags, s64 timestamp) +{ + struct ad2s1210_state *st =3D iio_priv(indio_dev); + + /* Sine/cosine inputs clipped */ + if (FAULT_ONESHOT(AD2S1210_FAULT_CLIP, flags, st->prev_fault_flags)) + iio_push_event(indio_dev, + IIO_MOD_EVENT_CODE(IIO_ALTVOLTAGE, 1, + IIO_MOD_X_OR_Y, + IIO_EV_TYPE_MAG, + IIO_EV_DIR_NONE), + timestamp); + + /* Sine/cosine inputs below LOS threshold */ + if (FAULT_ONESHOT(AD2S1210_FAULT_LOS, flags, st->prev_fault_flags)) + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_ALTVOLTAGE, 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_FALLING), + timestamp); + + /* Sine/cosine inputs exceed DOS overrange threshold */ + if (FAULT_ONESHOT(AD2S1210_FAULT_DOS_OVR, flags, st->prev_fault_flags)) + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_ALTVOLTAGE, 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_RISING), + timestamp); + + /* Sine/cosine inputs exceed DOS mismatch threshold */ + if (FAULT_ONESHOT(AD2S1210_FAULT_DOS_MIS, flags, st->prev_fault_flags)) + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_ALTVOLTAGE, 0, + IIO_EV_TYPE_MAG, + IIO_EV_DIR_NONE), + timestamp); + + /* Tracking error exceeds LOT threshold */ + if (FAULT_ONESHOT(AD2S1210_FAULT_LOT, flags, st->prev_fault_flags)) + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_ANGL, 1, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_RISING), + timestamp); + + /* Velocity exceeds maximum tracking rate */ + if (FAULT_ONESHOT(AD2S1210_FAULT_VELOCITY, flags, st->prev_fault_flags)) + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_ANGL_VEL, 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_RISING), + timestamp); + + /* Phase error exceeds phase lock range */ + if (FAULT_ONESHOT(AD2S1210_FAULT_PHASE, flags, st->prev_fault_flags)) + iio_push_event(indio_dev, + IIO_UNMOD_EVENT_CODE(IIO_PHASE, 0, + IIO_EV_TYPE_MAG, + IIO_EV_DIR_NONE), + timestamp); + + /* Configuration parity error */ + if (FAULT_ONESHOT(AD2S1210_FAULT_CONFIG_PARITY, flags, + st->prev_fault_flags)) + /* + * Userspace should also get notified of this via error return + * when trying to write to any attribute that writes a register. + */ + dev_err_ratelimited(&indio_dev->dev, + "Configuration parity error\n"); + + st->prev_fault_flags =3D flags; +} + +static int ad2s1210_single_conversion(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val) { + struct ad2s1210_state *st =3D iio_priv(indio_dev); + s64 timestamp; int ret; =20 mutex_lock(&st->lock); gpiod_set_value(st->sample_gpio, 1); + timestamp =3D iio_get_time_ns(indio_dev); /* delay (6 * tck + 20) nano seconds */ udelay(1); =20 @@ -307,17 +415,17 @@ static int ad2s1210_single_conversion(struct ad2s1210= _state *st, } if (ret < 0) goto error_ret; - ret =3D spi_read(st->sdev, &st->sample, 2); + ret =3D spi_read(st->sdev, &st->sample, 3); if (ret < 0) goto error_ret; =20 switch (chan->type) { case IIO_ANGL: - *val =3D be16_to_cpu(st->sample); + *val =3D be16_to_cpu(st->sample.raw); ret =3D IIO_VAL_INT; break; case IIO_ANGL_VEL: - *val =3D (s16)be16_to_cpu(st->sample); + *val =3D (s16)be16_to_cpu(st->sample.raw); ret =3D IIO_VAL_INT; break; default: @@ -325,6 +433,8 @@ static int ad2s1210_single_conversion(struct ad2s1210_s= tate *st, break; } =20 + ad2s1210_push_events(indio_dev, st->rx[2], timestamp); + error_ret: gpiod_set_value(st->sample_gpio, 0); /* delay (2 * tck + 20) nano seconds */ @@ -608,7 +718,7 @@ static int ad2s1210_read_raw(struct iio_dev *indio_dev, =20 switch (mask) { case IIO_CHAN_INFO_RAW: - return ad2s1210_single_conversion(st, chan, val); + return ad2s1210_single_conversion(indio_dev, chan, val); case IIO_CHAN_INFO_SCALE: switch (chan->type) { case IIO_ANGL: @@ -721,6 +831,14 @@ static const struct iio_event_spec ad2s1210_position_e= vent_spec[] =3D { }, }; =20 +static const struct iio_event_spec ad2s1210_velocity_event_spec[] =3D { + { + /* Velocity exceeds maximum tracking rate fault. */ + .type =3D IIO_EV_TYPE_THRESH, + .dir =3D IIO_EV_DIR_RISING, + }, +}; + static const struct iio_event_spec ad2s1210_phase_event_spec[] =3D { { /* Phase error fault. */ @@ -754,6 +872,14 @@ static const struct iio_event_spec ad2s1210_monitor_si= gnal_event_spec[] =3D { }, }; =20 +static const struct iio_event_spec ad2s1210_sin_cos_event_spec[] =3D { + { + /* Sine/cosine clipping fault. */ + .type =3D IIO_EV_TYPE_MAG, + .dir =3D IIO_EV_DIR_NONE, + }, +}; + static const struct iio_chan_spec ad2s1210_channels[] =3D { { .type =3D IIO_ANGL, @@ -784,6 +910,8 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { }, .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), + .event_spec =3D ad2s1210_velocity_event_spec, + .num_event_specs =3D ARRAY_SIZE(ad2s1210_velocity_event_spec), }, IIO_CHAN_SOFT_TIMESTAMP(2), { @@ -820,6 +948,26 @@ static const struct iio_chan_spec ad2s1210_channels[] = =3D { .scan_index =3D -1, .event_spec =3D ad2s1210_monitor_signal_event_spec, .num_event_specs =3D ARRAY_SIZE(ad2s1210_monitor_signal_event_spec), + }, { + /* sine input */ + .type =3D IIO_ALTVOLTAGE, + .indexed =3D 1, + .channel =3D 1, + .modified =3D 1, + .channel2 =3D IIO_MOD_Y, + .scan_index =3D -1, + .event_spec =3D ad2s1210_sin_cos_event_spec, + .num_event_specs =3D ARRAY_SIZE(ad2s1210_sin_cos_event_spec), + }, { + /* cosine input */ + .type =3D IIO_ALTVOLTAGE, + .indexed =3D 1, + .channel =3D 1, + .modified =3D 1, + .channel2 =3D IIO_MOD_X, + .scan_index =3D -1, + .event_spec =3D ad2s1210_sin_cos_event_spec, + .num_event_specs =3D ARRAY_SIZE(ad2s1210_sin_cos_event_spec), }, }; =20 @@ -936,7 +1084,7 @@ static const struct attribute_group ad2s1210_event_att= ribute_group =3D { =20 static int ad2s1210_initial(struct ad2s1210_state *st) { - unsigned char data; + unsigned int data; int ret; =20 mutex_lock(&st->lock); @@ -1073,12 +1221,11 @@ static irqreturn_t ad2s1210_trigger_handler(int irq= , void *p) if (ret < 0) goto error_ret; =20 - /* REVIST: we can read 3 bytes here and also get fault flags */ - ret =3D spi_read(st->sdev, st->rx, 2); + ret =3D spi_read(st->sdev, &st->sample, 3); if (ret < 0) goto error_ret; =20 - memcpy(&st->scan.chan[chan++], st->rx, 2); + memcpy(&st->scan.chan[chan++], &st->sample.raw, 2); } =20 if (test_bit(1, indio_dev->active_scan_mask)) { @@ -1086,14 +1233,14 @@ static irqreturn_t ad2s1210_trigger_handler(int irq= , void *p) if (ret < 0) goto error_ret; =20 - /* REVIST: we can read 3 bytes here and also get fault flags */ - ret =3D spi_read(st->sdev, st->rx, 2); + ret =3D spi_read(st->sdev, &st->sample, 3); if (ret < 0) goto error_ret; =20 - memcpy(&st->scan.chan[chan++], st->rx, 2); + memcpy(&st->scan.chan[chan++], &st->sample.raw, 2); } =20 + ad2s1210_push_events(indio_dev, st->sample.fault, pf->timestamp); iio_push_to_buffers_with_timestamp(indio_dev, &st->scan, pf->timestamp); =20 error_ret: --=20 2.42.0 From nobody Tue Dec 16 19:56:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8761EE728CD for ; Fri, 29 Sep 2023 17:27:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233886AbjI2R1N (ORCPT ); Fri, 29 Sep 2023 13:27:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46170 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233868AbjI2R00 (ORCPT ); Fri, 29 Sep 2023 13:26:26 -0400 Received: from mail-oo1-xc2f.google.com (mail-oo1-xc2f.google.com [IPv6:2607:f8b0:4864:20::c2f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7DDBE1BC for ; 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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id f128-20020a4a5886000000b0057bb326cad4sm2272915oob.33.2023.09.29.10.26.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 10:26:11 -0700 (PDT) From: David Lechner To: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-staging@lists.linux.dev Cc: David Lechner , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org, David Lechner Subject: [PATCH v3 27/27] staging: iio: resolver: ad2s1210: add label attribute support Date: Fri, 29 Sep 2023 12:23:32 -0500 Message-ID: <20230929-ad2s1210-mainline-v3-27-fa4364281745@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> References: <20230929-ad2s1210-mainline-v3-0-fa4364281745@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.3 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Lechner From: David Lechner The ad2s1210 resolver driver has quite a few channels, mostly for internal signals for event support. This makes it difficult to know which channel is which. This patch adds a label attribute to the channels to make it easier to identify them. Signed-off-by: David Lechner --- v3 changes: This is a new patch in v3 drivers/staging/iio/resolver/ad2s1210.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/= resolver/ad2s1210.c index dc3cc3ab855e..a187fa07d315 100644 --- a/drivers/staging/iio/resolver/ad2s1210.c +++ b/drivers/staging/iio/resolver/ad2s1210.c @@ -1106,6 +1106,34 @@ static int ad2s1210_initial(struct ad2s1210_state *s= t) return ret; } =20 +static int ad2s1210_read_label(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + char *label) +{ + if (chan->type =3D=3D IIO_ANGL) { + if (chan->channel =3D=3D 0) + return sprintf(label, "position\n"); + if (chan->channel =3D=3D 1) + return sprintf(label, "tracking error\n"); + } + if (chan->type =3D=3D IIO_ANGL_VEL) + return sprintf(label, "velocity\n"); + if (chan->type =3D=3D IIO_PHASE) + return sprintf(label, "synthetic reference\n"); + if (chan->type =3D=3D IIO_ALTVOLTAGE) { + if (chan->output) + return sprintf(label, "excitation\n"); + if (chan->channel =3D=3D 0) + return sprintf(label, "monitor signal\n"); + if (chan->channel =3D=3D 1 && chan->channel2 =3D=3D IIO_MOD_X) + return sprintf(label, "cosine\n"); + if (chan->channel =3D=3D 1 && chan->channel2 =3D=3D IIO_MOD_Y) + return sprintf(label, "sine\n"); + } + + return -EINVAL; +} + static int ad2s1210_read_event_value(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, @@ -1256,6 +1284,7 @@ static const struct iio_info ad2s1210_info =3D { .read_raw =3D ad2s1210_read_raw, .read_avail =3D ad2s1210_read_avail, .write_raw =3D ad2s1210_write_raw, + .read_label =3D ad2s1210_read_label, .attrs =3D &ad2s1210_attribute_group, .read_event_value =3D ad2s1210_read_event_value, .write_event_value =3D ad2s1210_write_event_value, --=20 2.42.0