From nobody Fri Feb 13 12:30:14 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED359CE7A81 for ; Mon, 25 Sep 2023 12:18:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231320AbjIYMST (ORCPT ); Mon, 25 Sep 2023 08:18:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229450AbjIYMSR (ORCPT ); Mon, 25 Sep 2023 08:18:17 -0400 Received: from mail-oi1-x22d.google.com (mail-oi1-x22d.google.com [IPv6:2607:f8b0:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB17ACE for ; Mon, 25 Sep 2023 05:18:11 -0700 (PDT) Received: by mail-oi1-x22d.google.com with SMTP id 5614622812f47-3adf06730c4so4029058b6e.1 for ; Mon, 25 Sep 2023 05:18:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1695644290; x=1696249090; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=zOnVN1rOFVajKAbeVV2zdOVaxv00+S/fJ9PzfWMptxI=; b=mbotxPjS3WmjMnBbou1Y2jk2/8BoMY3mvlmsnDJsbPFEuxs20F56gDnKAyjm3Jpw5v 3Paweu4LhBfgdk4qKNURJWn1onGDnq8ACHokjg4opIZalyqkQIHvyqwXV2TVyDuLAJk6 OVA8zzaFMADK2Se94TVuwrm+2PY1MnCgueR3ckCN3ALZijUXR2Tc7yb3kMLSEnwNSXFa plLhoqNnPufg4sleNJ40efo+1FLSzX+qXnzKyl+HVrHSzaF8uJ6R+/D2EwafFm5G0nLm fguMlP36trOElubUObk0OvGlFSXDlSZvYcmCbiffTtanyKX2dFQO69U4bx+PwAL023sQ e41w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695644290; x=1696249090; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=zOnVN1rOFVajKAbeVV2zdOVaxv00+S/fJ9PzfWMptxI=; b=iz/mLpYxiiy+4To07U57Xj5XiXiw8y074niVc3DTgIy5cAzrLFWTHmbyvbiBE6YeWq E/Hu9iZaBbDzpkLORAdOXm3B9M4yaz6/J0qPlxpjXL8dKp7z75qYzAutMKkX4Jh7ITX2 vcySflLOpj1CDfnPbbXYx/UTbjT4UC1bMay/KqS/BwfxCsHqRN+9SaqOjaH/I63cG4Zk nQRQb6Qs5aBO6EWeELEYcTtxUF3YvrtpEoyuX7uhlOlfhpRp9N9iwb5gFDNB7PmPsG8Y 3Ra5VFVxVyJbzySAAuaktI+uEwOlq1AYOUC52fgjYyc63LWalYraSy20vrqVOVH3NM7c +Iow== X-Gm-Message-State: AOJu0YxtCMXGAUK2FZJtd7UrwFh06MHqt81VS1P8t5MEIdGhEfw/eh9b EsV4fPKOYCjRJNTFdvz8ZjbNMFVrPSnmXw== X-Google-Smtp-Source: AGHT+IHc2C+1GCW2kpICDog9+xeLilUnvwGiOlFDt1eRvD2+Nz6+mDh8uyUFd+ERzSvogC4JT9xIVA== X-Received: by 2002:a05:6808:18a1:b0:3ad:f866:39bd with SMTP id bi33-20020a05680818a100b003adf86639bdmr9199813oib.27.1695644290598; Mon, 25 Sep 2023 05:18:10 -0700 (PDT) Received: from kelvin-ThinkPad-L14-Gen-1.lan ([103.184.129.7]) by smtp.gmail.com with ESMTPSA id q26-20020a62ae1a000000b00689f1ce7dacsm7992426pff.23.2023.09.25.05.18.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Sep 2023 05:18:10 -0700 (PDT) From: Keguang Zhang To: linux-kernel@vger.kernel.org Cc: Thomas Gleixner , Keguang Zhang Subject: [PATCH] irq/generic-chip: fix the irq_chip name for /proc/interrupts Date: Mon, 25 Sep 2023 20:17:34 +0800 Message-Id: <20230925121734.93017-1-keguang.zhang@gmail.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" irq_init_generic_chip() only sets name for the first chip type, which will lead to empty names for other chip types. Eventually, these names will be shown as "-" /proc/interrupts. This patch sets name for all chip types by default. Signed-off-by: Keguang Zhang --- kernel/irq/generic-chip.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c index c653cd31548d..81ecca08caad 100644 --- a/kernel/irq/generic-chip.c +++ b/kernel/irq/generic-chip.c @@ -219,11 +219,15 @@ void irq_init_generic_chip(struct irq_chip_generic *g= c, const char *name, int num_ct, unsigned int irq_base, void __iomem *reg_base, irq_flow_handler_t handler) { + struct irq_chip_type *ct =3D gc->chip_types; + int i; + raw_spin_lock_init(&gc->lock); gc->num_ct =3D num_ct; gc->irq_base =3D irq_base; gc->reg_base =3D reg_base; - gc->chip_types->chip.name =3D name; + for (i =3D 0; i < num_ct; i++) + ct[i].chip.name =3D name; gc->chip_types->handler =3D handler; } =20 base-commit: 8fff9184d1b5810dca5dd1a02726d4f844af88fc --=20 2.39.2