From nobody Fri Feb 13 15:42:19 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1651BCD4F46 for ; Fri, 22 Sep 2023 09:50:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232989AbjIVJuo (ORCPT ); Fri, 22 Sep 2023 05:50:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36166 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232711AbjIVJue (ORCPT ); Fri, 22 Sep 2023 05:50:34 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 269411B2; Fri, 22 Sep 2023 02:50:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1695376227; x=1726912227; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bOTU9FvgSRoMLKxQGcC6y5VPLYv6tO9qTJIAc+cPB6o=; b=GcQcTpT1XA4+G8MvWr/fvn0eb2U4ek04NP75pVbEaAhFEmB2USxgxXlV AWVHZNFHfsV/FeDBEj1pUeOZ3jylL/JVhNZZuZac67FI03FViBKg7TCqm xGnftW45Z6ChRHtv7pykwEWFOPeTdGJkv9cIBa2zJlxmwI9/fKINJtXIH Po7ZbKEneqs0uHlUiC0m7YQ69J+HI2fL1C7uR3bQPah730ayAGT7tNjLS vrAIm3Zqd9fuOdshWVXx3ev5FMBxlW5kna978Fwpmei2cFAnoihhzTc83 rwdUpONpoKgYm57lw6vjC8s3E6v5uXo1r/KW0IUPmMDH1knhibUbY3Vv0 Q==; X-CSE-ConnectionGUID: JugbC+jaSBKADb3c9fFrtw== X-CSE-MsgGUID: tbJvmtlOR4KAvlrLk/GUPw== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.03,167,1694761200"; d="scan'208";a="6047509" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 22 Sep 2023 02:50:25 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 22 Sep 2023 02:50:04 -0700 Received: from microchip1-OptiPlex-9020.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Fri, 22 Sep 2023 02:49:59 -0700 From: shravan chippa To: , , , , , , , CC: , , , , , , Subject: [PATCH v1 1/3] dmaengine: sf-pdma: Support of_dma_controller_register() Date: Fri, 22 Sep 2023 15:20:37 +0530 Message-ID: <20230922095039.74878-2-shravan.chippa@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230922095039.74878-1-shravan.chippa@microchip.com> References: <20230922095039.74878-1-shravan.chippa@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Shravan Chippa Update sf-pdma driver to adopt generic DMA device tree bindings. It calls of_dma_controller_register() with sf-pdma specific of_dma_xlate to get the generic DMA device tree helper support and the DMA clients can look up the sf-pdma controller using standard APIs. Signed-off-by: Shravan Chippa --- drivers/dma/sf-pdma/sf-pdma.c | 41 +++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c index d1c6956af452..c7558c9f9ac3 100644 --- a/drivers/dma/sf-pdma/sf-pdma.c +++ b/drivers/dma/sf-pdma/sf-pdma.c @@ -20,6 +20,7 @@ #include #include #include +#include #include =20 #include "sf-pdma.h" @@ -490,6 +491,33 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma) } } =20 +static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct sf_pdma *pdma =3D ofdma->of_dma_data; + struct device *dev =3D pdma->dma_dev.dev; + struct sf_pdma_chan *chan; + struct dma_chan *c; + u32 channel_id; + + if (dma_spec->args_count !=3D 1) { + dev_err(dev, "Bad number of cells\n"); + return NULL; + } + + channel_id =3D dma_spec->args[0]; + + chan =3D &pdma->chans[channel_id]; + + c =3D dma_get_slave_channel(&chan->vchan.chan); + if (!c) { + dev_err(dev, "No more channels available\n"); + return NULL; + } + + return c; +} + static int sf_pdma_probe(struct platform_device *pdev) { struct sf_pdma *pdma; @@ -563,7 +591,20 @@ static int sf_pdma_probe(struct platform_device *pdev) return ret; } =20 + ret =3D of_dma_controller_register(pdev->dev.of_node, + sf_pdma_of_xlate, pdma); + if (ret < 0) { + dev_err(&pdev->dev, + "Can't register SiFive Platform OF_DMA. (%d)\n", ret); + goto err_unregister; + } + return 0; + +err_unregister: + dma_async_device_unregister(&pdma->dma_dev); + + return ret; } =20 static int sf_pdma_remove(struct platform_device *pdev) --=20 2.34.1 From nobody Fri Feb 13 15:42:19 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9EF4CD4F47 for ; Fri, 22 Sep 2023 09:50:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232957AbjIVJu1 (ORCPT ); Fri, 22 Sep 2023 05:50:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:32992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232993AbjIVJuV (ORCPT ); Fri, 22 Sep 2023 05:50:21 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A34B7192; Fri, 22 Sep 2023 02:50:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1695376215; x=1726912215; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lacmBtTBGbdaCOwsWzi6JZgwiP0fwtmzcKJKP/0c+uQ=; b=h7ijL6EDe0XKspXebINGepEqKw3tnXVz1wRXWoV86tNnOFxyvz3szOpc Lx5Ka1EFhfENadcxJXvEBXTSFiFlMyO9BsTdDqAQOXJTAsPPoCrVmkRJU ncV2gm//KKvYW389qIR7hJdVg6Vqwa787a2ASGkRFFxVNysOeeBgMryjS K0oO21sILcxr8ccSF21cIg0MNYO31sXOLplgPDNoi9vZtPc5RZtTNtUcw 5ZBw5tGDwxhEIfbr6qQxgDgMiZqp8BNd5NapkQis04vhg5tg81LBUI3tf K32WN/VsMCXtK9HvJkUZs6CZGWYJ3pqlZXpaNbiKqajp1jOCmNsGONwxJ Q==; X-CSE-ConnectionGUID: fQsQIPFwSuS+RkzQs9lxqw== X-CSE-MsgGUID: RZFDWMWZQ7qxjkETvSSgcQ== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.03,167,1694761200"; d="scan'208";a="236602659" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 22 Sep 2023 02:50:14 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 22 Sep 2023 02:50:12 -0700 Received: from microchip1-OptiPlex-9020.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Fri, 22 Sep 2023 02:50:07 -0700 From: shravan chippa To: , , , , , , , CC: , , , , , , , Conor Dooley Subject: [PATCH v1 2/3] dt-bindings: dma: sf-pdma: add new compatible name Date: Fri, 22 Sep 2023 15:20:38 +0530 Message-ID: <20230922095039.74878-3-shravan.chippa@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230922095039.74878-1-shravan.chippa@microchip.com> References: <20230922095039.74878-1-shravan.chippa@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Shravan Chippa add new compatible name microchip,mpfs-pdma to support out of order dma transfers this will improve the dma throughput for mem-to-mem transfer Signed-off-by: Shravan Chippa Reviewed-by: Conor Dooley Signed-off-by: Conor Dooley --- .../bindings/dma/sifive,fu540-c000-pdma.yaml | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.y= aml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml index a1af0b906365..974467c4bacb 100644 --- a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml +++ b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml @@ -27,10 +27,14 @@ allOf: =20 properties: compatible: - items: - - enum: - - sifive,fu540-c000-pdma - - const: sifive,pdma0 + oneOf: + - items: + - const: microchip,mpfs-pdma # Microchip out of order DMA transf= er + - const: sifive,fu540-c000-pdma # Sifive in-order DMA transfer + - items: + - enum: + - sifive,fu540-c000-pdma + - const: sifive,pdma0 description: Should be "sifive,-pdma" and "sifive,pdma". Supported compatible strings are - --=20 2.34.1 From nobody Fri Feb 13 15:42:19 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73338CD4F48 for ; Fri, 22 Sep 2023 09:50:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232115AbjIVJuk (ORCPT ); Fri, 22 Sep 2023 05:50:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232378AbjIVJud (ORCPT ); Fri, 22 Sep 2023 05:50:33 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A9D5A19E; Fri, 22 Sep 2023 02:50:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1695376224; x=1726912224; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5ZtGZQCOpOvo7LrB2f95E58MjLGOFkMkoha+wYJN62g=; b=c6S0Om6Bh84yrVq2MNZhrAO9q6H7IF+b+PxctmoBa16uTCLyapifNXHM nu+XMQ7hc+eQVStUu5hw49cYyFZBcTfRMFGw0EPc9qtePPEmTn/FaXM4v lBJRs+xnpvW3l/6ey4jtwtvD2sTw1N/wfghFMbmbjklBwFZc+tUNlApWq 2t6k80UCigl2PuLOjX3aRT76t4c2twWCcL6CD/xPN6k8RxipRM+RpQuHo nDMkR3RRoYeE+DI78bl3J0mT65jUfCTyNPEW/qV1+4aC50pozBuZA9BuN B8rpnHwZN/N1VR77ueS75bSsD8IIg5NgPhqK8KEuDX2mb0/e3ZQVfE+yT g==; X-CSE-ConnectionGUID: Z5JENQJSR8GFy34Gp7khAQ== X-CSE-MsgGUID: 4dAFJKL4T/Ka0GLHtmRe7g== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.03,167,1694761200"; d="scan'208";a="236602712" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 22 Sep 2023 02:50:22 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Fri, 22 Sep 2023 02:50:20 -0700 Received: from microchip1-OptiPlex-9020.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Fri, 22 Sep 2023 02:50:15 -0700 From: shravan chippa To: , , , , , , , CC: , , , , , , , Conor Dooley Subject: [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible name Date: Fri, 22 Sep 2023 15:20:39 +0530 Message-ID: <20230922095039.74878-4-shravan.chippa@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230922095039.74878-1-shravan.chippa@microchip.com> References: <20230922095039.74878-1-shravan.chippa@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Shravan Chippa Sifive platform dma does not allow out-of-order transfers, buf out-of-order dma has a significant performance advantage. Add a PolarFire SoC specific compatible and code to support for out-of-order dma transfers Signed-off-by: Shravan Chippa Reviewed-by: Conor Dooley Signed-off-by: Conor Dooley --- drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++--- drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++ 2 files changed, 30 insertions(+), 3 deletions(-) diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c index c7558c9f9ac3..992a804166d5 100644 --- a/drivers/dma/sf-pdma/sf-pdma.c +++ b/drivers/dma/sf-pdma/sf-pdma.c @@ -21,6 +21,7 @@ #include #include #include +#include #include =20 #include "sf-pdma.h" @@ -66,7 +67,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_= pdma_chan *chan) static void sf_pdma_fill_desc(struct sf_pdma_desc *desc, u64 dst, u64 src, u64 size) { - desc->xfer_type =3D PDMA_FULL_SPEED; + desc->xfer_type =3D desc->chan->pdma->transfer_type; desc->xfer_size =3D size; desc->dst_addr =3D dst; desc->src_addr =3D src; @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phan= dle_args *dma_spec, =20 static int sf_pdma_probe(struct platform_device *pdev) { + const struct sf_pdma_driver_platdata *ddata; struct sf_pdma *pdma; int ret, n_chans; const enum dma_slave_buswidth widths =3D @@ -545,6 +547,14 @@ static int sf_pdma_probe(struct platform_device *pdev) =20 pdma->n_chans =3D n_chans; =20 + pdma->transfer_type =3D PDMA_FULL_SPEED; + + ddata =3D of_device_get_match_data(&pdev->dev); + if (ddata) { + if (ddata->quirks & NO_STRICT_ORDERING) + pdma->transfer_type &=3D ~(NO_STRICT_ORDERING); + } + pdma->membase =3D devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(pdma->membase)) return PTR_ERR(pdma->membase); @@ -629,11 +639,22 @@ static int sf_pdma_remove(struct platform_device *pde= v) return 0; } =20 +static const struct sf_pdma_driver_platdata mpfs_pdma =3D { + .quirks =3D NO_STRICT_ORDERING, +}; + static const struct of_device_id sf_pdma_dt_ids[] =3D { - { .compatible =3D "sifive,fu540-c000-pdma" }, - { .compatible =3D "sifive,pdma0" }, + { + .compatible =3D "sifive,fu540-c000-pdma", + }, { + .compatible =3D "sifive,pdma0", + }, { + .compatible =3D "microchip,mpfs-pdma", + .data =3D &mpfs_pdma, + }, {}, }; + MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids); =20 static struct platform_driver sf_pdma_driver =3D { diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h index 5c398a83b491..3b16db4daa0b 100644 --- a/drivers/dma/sf-pdma/sf-pdma.h +++ b/drivers/dma/sf-pdma/sf-pdma.h @@ -49,6 +49,7 @@ =20 /* Transfer Type */ #define PDMA_FULL_SPEED 0xFF000008 +#define NO_STRICT_ORDERING BIT(3) =20 /* Error Recovery */ #define MAX_RETRY 1 @@ -112,8 +113,13 @@ struct sf_pdma { struct dma_device dma_dev; void __iomem *membase; void __iomem *mappedbase; + u32 transfer_type; u32 n_chans; struct sf_pdma_chan chans[]; }; =20 +struct sf_pdma_driver_platdata { + u32 quirks; +}; + #endif /* _SF_PDMA_H */ --=20 2.34.1