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Thu, 21 Sep 2023 15:02:14 +0000 From: Frank Li To: frank.li@nxp.com Cc: dmaengine@vger.kernel.org, gregkh@linuxfoundation.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, lkp@intel.com, oe-kbuild-all@lists.linux.dev, rafael@kernel.org, vkoul@kernel.org Subject: [PATCH v4 3/3] dmaengine: fsl-edma: add trace event support Date: Thu, 21 Sep 2023 11:01:44 -0400 Message-Id: <20230921150144.3260231-4-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230921150144.3260231-1-Frank.Li@nxp.com> References: <20230921150144.3260231-1-Frank.Li@nxp.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: BY5PR17CA0007.namprd17.prod.outlook.com (2603:10b6:a03:1b8::20) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|AS4PR04MB9650:EE_|AS1PR04MB9382:EE_ X-MS-Office365-Filtering-Correlation-Id: 11e08d87-7596-4157-ac3e-08dbbab3bd4b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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charset="utf-8" Implement trace event support to enhance logging functionality for register access and the transfer control descriptor (TCD) context. This will enable more comprehensive monitoring and analysis of system activities Signed-off-by: Frank Li --- drivers/dma/Makefile | 6 +- drivers/dma/fsl-edma-common.c | 2 + drivers/dma/fsl-edma-common.h | 29 +++++++- drivers/dma/fsl-edma-trace.c | 4 + drivers/dma/fsl-edma-trace.h | 134 ++++++++++++++++++++++++++++++++++ 5 files changed, 169 insertions(+), 6 deletions(-) create mode 100644 drivers/dma/fsl-edma-trace.c create mode 100644 drivers/dma/fsl-edma-trace.h diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index a51c6397bcad0..40b2dd554e5dc 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -32,10 +32,12 @@ obj-$(CONFIG_DW_DMAC_CORE) +=3D dw/ obj-$(CONFIG_DW_EDMA) +=3D dw-edma/ obj-$(CONFIG_EP93XX_DMA) +=3D ep93xx_dma.o fsl-edma-debugfs-$(CONFIG_DEBUG_FS) :=3D fsl-edma-debugfs.o +CFLAGS_fsl-edma-trace.o :=3D -I$(src) +fsl-edma-trace-$(CONFIG_TRACING) :=3D fsl-edma-trace.o obj-$(CONFIG_FSL_DMA) +=3D fsldma.o -fsl-edma-objs :=3D fsl-edma-main.o fsl-edma-common.o $(fsl-edma-debugfs-y) +fsl-edma-objs :=3D fsl-edma-main.o fsl-edma-common.o $(fsl-edma-debugfs-y)= ${fsl-edma-trace-y} obj-$(CONFIG_FSL_EDMA) +=3D fsl-edma.o -mcf-edma-objs :=3D mcf-edma-main.o fsl-edma-common.o $(fsl-edma-debugfs-y) +mcf-edma-objs :=3D mcf-edma-main.o fsl-edma-common.o $(fsl-edma-debugfs-y)= ${fsl-edma-trace-y} obj-$(CONFIG_MCF_EDMA) +=3D mcf-edma.o obj-$(CONFIG_FSL_QDMA) +=3D fsl-qdma.o obj-$(CONFIG_FSL_RAID) +=3D fsl_raid.o diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c index a0f5741abcc47..0182e2695fdc0 100644 --- a/drivers/dma/fsl-edma-common.c +++ b/drivers/dma/fsl-edma-common.c @@ -521,6 +521,8 @@ void fsl_edma_fill_tcd(struct fsl_edma_chan *fsl_chan, csr |=3D EDMA_TCD_CSR_START; =20 tcd->csr =3D cpu_to_le16(csr); + + trace_edma_fill_tcd(fsl_chan->edma, tcd); } =20 static struct fsl_edma_desc *fsl_edma_alloc_desc(struct fsl_edma_chan *fsl= _chan, diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index 029197440bc34..453c997d0119a 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -234,6 +234,9 @@ struct fsl_edma_engine { edma_writel(chan->edma, val, \ (void __iomem *)&(container_of(chan->tcd, struct fsl_edma3_ch_reg, tc= d)->__name)) =20 +/* Need after struct defination */ +#include "fsl-edma-trace.h" + /* * R/W functions for big- or little-endian registers: * The eDMA controller's endian is independent of the CPU core's endian. @@ -242,18 +245,30 @@ struct fsl_edma_engine { */ static inline u32 edma_readl(struct fsl_edma_engine *edma, void __iomem *a= ddr) { + u32 val; + if (edma->big_endian) - return ioread32be(addr); + val =3D ioread32be(addr); else - return ioread32(addr); + val =3D ioread32(addr); + + trace_edma_readl(edma, addr, val); + + return val; } =20 static inline u16 edma_readw(struct fsl_edma_engine *edma, void __iomem *a= ddr) { + u16 val; + if (edma->big_endian) - return ioread16be(addr); + val =3D ioread16be(addr); else - return ioread16(addr); + val =3D ioread16(addr); + + trace_edma_readw(edma, addr, val); + + return val; } =20 static inline void edma_writeb(struct fsl_edma_engine *edma, @@ -264,6 +279,8 @@ static inline void edma_writeb(struct fsl_edma_engine *= edma, iowrite8(val, (void __iomem *)((unsigned long)addr ^ 0x3)); else iowrite8(val, addr); + + trace_edma_writeb(edma, addr, val); } =20 static inline void edma_writew(struct fsl_edma_engine *edma, @@ -274,6 +291,8 @@ static inline void edma_writew(struct fsl_edma_engine *= edma, iowrite16be(val, (void __iomem *)((unsigned long)addr ^ 0x2)); else iowrite16(val, addr); + + trace_edma_writew(edma, addr, val); } =20 static inline void edma_writel(struct fsl_edma_engine *edma, @@ -283,6 +302,8 @@ static inline void edma_writel(struct fsl_edma_engine *= edma, iowrite32be(val, addr); else iowrite32(val, addr); + + trace_edma_writel(edma, addr, val); } =20 static inline struct fsl_edma_chan *to_fsl_edma_chan(struct dma_chan *chan) diff --git a/drivers/dma/fsl-edma-trace.c b/drivers/dma/fsl-edma-trace.c new file mode 100644 index 0000000000000..28300ad80bb75 --- /dev/null +++ b/drivers/dma/fsl-edma-trace.c @@ -0,0 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 + +#define CREATE_TRACE_POINTS +#include "fsl-edma-common.h" diff --git a/drivers/dma/fsl-edma-trace.h b/drivers/dma/fsl-edma-trace.h new file mode 100644 index 0000000000000..9dd08a42ad54a --- /dev/null +++ b/drivers/dma/fsl-edma-trace.h @@ -0,0 +1,134 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2023 NXP. + */ + +#undef TRACE_SYSTEM +#define TRACE_SYSTEM fsl_edma + +#if !defined(__LINUX_FSL_EDMA_TRACE) || defined(TRACE_HEADER_MULTI_READ) +#define __LINUX_FSL_EDMA_TRACE + +#include +#include + +DECLARE_EVENT_CLASS(edma_log_io, + TP_PROTO(struct fsl_edma_engine *edma, void __iomem *addr, u32 value), + TP_ARGS(edma, addr, value), + TP_STRUCT__entry( + __field(struct fsl_edma_engine *, edma) + __field(void __iomem *, addr) + __field(u32, value) + ), + TP_fast_assign( + __entry->edma =3D edma; + __entry->addr =3D addr; + __entry->value =3D value; + ), + TP_printk("offset %08x: value %08x", + (u32)(__entry->addr - __entry->edma->membase), __entry->value) +); + +DEFINE_EVENT(edma_log_io, edma_readl, + TP_PROTO(struct fsl_edma_engine *edma, void __iomem *addr, u32 value), + TP_ARGS(edma, addr, value) +); + +DEFINE_EVENT(edma_log_io, edma_writel, + TP_PROTO(struct fsl_edma_engine *edma, void __iomem *addr, u32 value), + TP_ARGS(edma, addr, value) +); + +DEFINE_EVENT(edma_log_io, edma_readw, + TP_PROTO(struct fsl_edma_engine *edma, void __iomem *addr, u32 value), + TP_ARGS(edma, addr, value) +); + +DEFINE_EVENT(edma_log_io, edma_writew, + TP_PROTO(struct fsl_edma_engine *edma, void __iomem *addr, u32 value), + TP_ARGS(edma, addr, value) +); + +DEFINE_EVENT(edma_log_io, edma_readb, + TP_PROTO(struct fsl_edma_engine *edma, void __iomem *addr, u32 value), + TP_ARGS(edma, addr, value) +); + +DEFINE_EVENT(edma_log_io, edma_writeb, + TP_PROTO(struct fsl_edma_engine *edma, void __iomem *addr, u32 value), + TP_ARGS(edma, addr, value) +); + +DECLARE_EVENT_CLASS(edma_log_tcd, + TP_PROTO(struct fsl_edma_engine *edma, struct fsl_edma_hw_tcd *tcd), + TP_ARGS(edma, tcd), + TP_STRUCT__entry( + __field(struct fsl_edma_engine *, edma) + __field(u32, saddr) + __field(u16, soff) + __field(u16, attr) + __field(u32, nbytes) + __field(u32, slast) + __field(u32, daddr) + __field(u16, doff) + __field(u16, citer) + __field(u32, dlast_sga) + __field(u16, csr) + __field(u16, biter) + + ), + TP_fast_assign( + __entry->edma =3D edma; + __entry->saddr =3D le32_to_cpu(tcd->saddr), + __entry->soff =3D le16_to_cpu(tcd->soff), + __entry->attr =3D le16_to_cpu(tcd->attr), + __entry->nbytes =3D le32_to_cpu(tcd->nbytes), + __entry->slast =3D le32_to_cpu(tcd->slast), + __entry->daddr =3D le32_to_cpu(tcd->daddr), + __entry->doff =3D le16_to_cpu(tcd->doff), + __entry->citer =3D le16_to_cpu(tcd->citer), + __entry->dlast_sga =3D le32_to_cpu(tcd->dlast_sga), + __entry->csr =3D le16_to_cpu(tcd->csr), + __entry->biter =3D le16_to_cpu(tcd->biter); + ), + TP_printk("\n=3D=3D=3D=3D TCD =3D=3D=3D=3D=3D\n" + " saddr: 0x%08x\n" + " soff: 0x%04x\n" + " attr: 0x%04x\n" + " nbytes: 0x%08x\n" + " slast: 0x%08x\n" + " daddr: 0x%08x\n" + " doff: 0x%04x\n" + " citer: 0x%04x\n" + " dlast: 0x%08x\n" + " csr: 0x%04x\n" + " biter: 0x%04x\n", + __entry->saddr, + __entry->soff, + __entry->attr, + __entry->nbytes, + __entry->slast, + __entry->daddr, + __entry->doff, + __entry->citer, + __entry->dlast_sga, + __entry->csr, + __entry->biter) +); + +DEFINE_EVENT(edma_log_tcd, edma_fill_tcd, + TP_PROTO(struct fsl_edma_engine *edma, struct fsl_edma_hw_tcd *tcd), + TP_ARGS(edma, tcd) +); + +#endif + +/* this part must be outside header guard */ + +#undef TRACE_INCLUDE_PATH +#define TRACE_INCLUDE_PATH . + +#undef TRACE_INCLUDE_FILE +#define TRACE_INCLUDE_FILE fsl-edma-trace + +#include --=20 2.34.1