From nobody Fri Sep 20 12:47:00 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B804E7D0AB for ; Thu, 21 Sep 2023 22:25:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233195AbjIUWZw (ORCPT ); Thu, 21 Sep 2023 18:25:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231221AbjIUWZ2 (ORCPT ); Thu, 21 Sep 2023 18:25:28 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 96EFBAD19; Thu, 21 Sep 2023 10:06:01 -0700 (PDT) X-UUID: 7195e40a583f11eea33bb35ae8d461a2-20230921 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; 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Thu, 21 Sep 2023 13:26:39 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 21 Sep 2023 13:26:39 +0800 From: Mark Tseng To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Roger Lu , Kevin Hilman CC: , , , , , Subject: [PATCH v4 3/3] soc: mediatek: svs: Add support for voltage bins Date: Thu, 21 Sep 2023 13:26:37 +0800 Message-ID: <20230921052637.30444-4-chun-jen.tseng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230921052637.30444-1-chun-jen.tseng@mediatek.com> References: <20230921052637.30444-1-chun-jen.tseng@mediatek.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support voltage bins turn point Signed-off-by: Mark Tseng Reviewed-by: AngeloGioacchino Del Regno --- drivers/soc/mediatek/mtk-svs.c | 57 +++++++++++++++++++++++++++++++--- 1 file changed, 53 insertions(+), 4 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index d2ae0b0cf95a..f31e3bedff50 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -407,6 +407,7 @@ struct svs_platform_data { * @dcbdet: svs efuse data * @dcmdet: svs efuse data * @turn_pt: 2-line turn point tells which opp_volt calculated by high/low= bank + * @vbin_turn_pt: voltage bin turn point helps know which svsb_volt should= be overridden * @type: bank type to represent it is 2-line (high/low) bank or 1-line ba= nk * * Svs bank will generate suitalbe voltages by below general math equation @@ -469,6 +470,7 @@ struct svs_bank { u32 dcbdet; u32 dcmdet; u32 turn_pt; + u32 vbin_turn_pt; u32 type; }; =20 @@ -751,11 +753,12 @@ static int svs_status_debug_show(struct seq_file *m, = void *v) =20 ret =3D thermal_zone_get_temp(svsb->tzd, &tzone_temp); if (ret) - seq_printf(m, "%s: temperature ignore, turn_pt =3D %u\n", - svsb->name, svsb->turn_pt); + seq_printf(m, "%s: temperature ignore, vbin_turn_pt =3D %u, turn_pt =3D = %u\n", + svsb->name, svsb->vbin_turn_pt, svsb->turn_pt); else - seq_printf(m, "%s: temperature =3D %d, turn_pt =3D %u\n", - svsb->name, tzone_temp, svsb->turn_pt); + seq_printf(m, "%s: temperature =3D %d, vbin_turn_pt =3D %u, turn_pt =3D = %u\n", + svsb->name, tzone_temp, svsb->vbin_turn_pt, + svsb->turn_pt); =20 for (i =3D 0; i < svsb->opp_count; i++) { opp =3D dev_pm_opp_find_freq_exact(svsb->opp_dev, @@ -952,6 +955,29 @@ static void svs_get_bank_volts_v3(struct svs_platform = *svsp) for (i =3D opp_start; i < opp_stop; i++) if (svsb->volt_flags & SVSB_REMOVE_DVTFIXED_VOLT) svsb->volt[i] -=3D svsb->dvt_fixed; + + /* For voltage bin support */ + if (svsb->opp_dfreq[0] > svsb->freq_base) { + svsb->volt[0] =3D svs_opp_volt_to_bank_volt(svsb->opp_dvolt[0], + svsb->volt_step, + svsb->volt_base); + + /* Find voltage bin turn point */ + for (i =3D 0; i < svsb->opp_count; i++) { + if (svsb->opp_dfreq[i] <=3D svsb->freq_base) { + svsb->vbin_turn_pt =3D i; + break; + } + } + + /* Override svs bank voltages */ + for (i =3D 1; i < svsb->vbin_turn_pt; i++) + svsb->volt[i] =3D interpolate(svsb->freq_pct[0], + svsb->freq_pct[svsb->vbin_turn_pt], + svsb->volt[0], + svsb->volt[svsb->vbin_turn_pt], + svsb->freq_pct[i]); + } } =20 static void svs_set_bank_freq_pct_v3(struct svs_platform *svsp) @@ -1069,6 +1095,29 @@ static void svs_get_bank_volts_v2(struct svs_platfor= m *svsp) =20 for (i =3D 0; i < svsb->opp_count; i++) svsb->volt[i] +=3D svsb->volt_od; + + /* For voltage bin support */ + if (svsb->opp_dfreq[0] > svsb->freq_base) { + svsb->volt[0] =3D svs_opp_volt_to_bank_volt(svsb->opp_dvolt[0], + svsb->volt_step, + svsb->volt_base); + + /* Find voltage bin turn point */ + for (i =3D 0; i < svsb->opp_count; i++) { + if (svsb->opp_dfreq[i] <=3D svsb->freq_base) { + svsb->vbin_turn_pt =3D i; + break; + } + } + + /* Override svs bank voltages */ + for (i =3D 1; i < svsb->vbin_turn_pt; i++) + svsb->volt[i] =3D interpolate(svsb->freq_pct[0], + svsb->freq_pct[svsb->vbin_turn_pt], + svsb->volt[0], + svsb->volt[svsb->vbin_turn_pt], + svsb->freq_pct[i]); + } } =20 static void svs_set_bank_freq_pct_v2(struct svs_platform *svsp) --=20 2.18.0