From nobody Fri Dec 19 18:45:38 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 788ADCD493F for ; Thu, 21 Sep 2023 02:50:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229633AbjIUCus (ORCPT ); Wed, 20 Sep 2023 22:50:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229499AbjIUCuq (ORCPT ); Wed, 20 Sep 2023 22:50:46 -0400 Received: from Atcsqr.andestech.com (60-248-80-70.hinet-ip.hinet.net [60.248.80.70]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A9F9CF for ; Wed, 20 Sep 2023 19:50:39 -0700 (PDT) Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by Atcsqr.andestech.com with ESMTP id 38L2oY9j059266; Thu, 21 Sep 2023 10:50:34 +0800 (+08) (envelope-from peterlin@andestech.com) Received: from atctrx.andestech.com (10.0.15.173) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Thu, 21 Sep 2023 10:50:30 +0800 From: Yu Chien Peter Lin To: , , , , , , , , CC: , Yu Chien Peter Lin Subject: [PATCH v4 1/3] riscv: Improve PTDUMP to show RSW with non-zero value Date: Thu, 21 Sep 2023 10:50:20 +0800 Message-ID: <20230921025022.3989723-2-peterlin@andestech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230921025022.3989723-1-peterlin@andestech.com> References: <20230921025022.3989723-1-peterlin@andestech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.0.15.173] X-DNSRBL: X-MAIL: Atcsqr.andestech.com 38L2oY9j059266 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" RSW field can be used to encode 2 bits of software defined information. Currently, PTDUMP only prints "RSW" when its value is 1 or 3. To fix this issue and improve the debugging experience with PTDUMP, we redefine _PAGE_SPECIAL to its original value and use _PAGE_SOFT as the RSW mask, allow it to print the RSW with any non-zero value. This patch also removes the val from the struct prot_bits as it is no longer needed. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Alexandre Ghiti Tested-by: Alexandre Ghiti --- Changes v1 -> v2 - Redefine _PAGE_SPECIAL to (1 << 8) Changes v2 -> v3 - Add commet for _PAGE_SPECIAL - Add ".." when RSW field is clear - Fix unbalanced braces warning Changes v3 -> v4 - Include Alexandre's RB/TB-tags --- arch/riscv/include/asm/pgtable-bits.h | 4 +-- arch/riscv/mm/ptdump.c | 35 ++++++++++++--------------- 2 files changed, 17 insertions(+), 22 deletions(-) diff --git a/arch/riscv/include/asm/pgtable-bits.h b/arch/riscv/include/asm= /pgtable-bits.h index f896708e8331..179bd4afece4 100644 --- a/arch/riscv/include/asm/pgtable-bits.h +++ b/arch/riscv/include/asm/pgtable-bits.h @@ -16,9 +16,9 @@ #define _PAGE_GLOBAL (1 << 5) /* Global */ #define _PAGE_ACCESSED (1 << 6) /* Set by hardware on any access */ #define _PAGE_DIRTY (1 << 7) /* Set by hardware on any write */ -#define _PAGE_SOFT (1 << 8) /* Reserved for software */ +#define _PAGE_SOFT (3 << 8) /* Reserved for software */ =20 -#define _PAGE_SPECIAL _PAGE_SOFT +#define _PAGE_SPECIAL (1 << 8) /* RSW: 0x1 */ #define _PAGE_TABLE _PAGE_PRESENT =20 /* diff --git a/arch/riscv/mm/ptdump.c b/arch/riscv/mm/ptdump.c index 20a9f991a6d7..57a0926c6627 100644 --- a/arch/riscv/mm/ptdump.c +++ b/arch/riscv/mm/ptdump.c @@ -129,7 +129,6 @@ static struct ptd_mm_info efi_ptd_info =3D { /* Page Table Entry */ struct prot_bits { u64 mask; - u64 val; const char *set; const char *clear; }; @@ -137,47 +136,38 @@ struct prot_bits { static const struct prot_bits pte_bits[] =3D { { .mask =3D _PAGE_SOFT, - .val =3D _PAGE_SOFT, - .set =3D "RSW", - .clear =3D " ", + .set =3D "RSW(%d)", + .clear =3D " .. ", }, { .mask =3D _PAGE_DIRTY, - .val =3D _PAGE_DIRTY, .set =3D "D", .clear =3D ".", }, { .mask =3D _PAGE_ACCESSED, - .val =3D _PAGE_ACCESSED, .set =3D "A", .clear =3D ".", }, { .mask =3D _PAGE_GLOBAL, - .val =3D _PAGE_GLOBAL, .set =3D "G", .clear =3D ".", }, { .mask =3D _PAGE_USER, - .val =3D _PAGE_USER, .set =3D "U", .clear =3D ".", }, { .mask =3D _PAGE_EXEC, - .val =3D _PAGE_EXEC, .set =3D "X", .clear =3D ".", }, { .mask =3D _PAGE_WRITE, - .val =3D _PAGE_WRITE, .set =3D "W", .clear =3D ".", }, { .mask =3D _PAGE_READ, - .val =3D _PAGE_READ, .set =3D "R", .clear =3D ".", }, { .mask =3D _PAGE_PRESENT, - .val =3D _PAGE_PRESENT, .set =3D "V", .clear =3D ".", } @@ -208,15 +198,20 @@ static void dump_prot(struct pg_state *st) unsigned int i; =20 for (i =3D 0; i < ARRAY_SIZE(pte_bits); i++) { - const char *s; - - if ((st->current_prot & pte_bits[i].mask) =3D=3D pte_bits[i].val) - s =3D pte_bits[i].set; - else - s =3D pte_bits[i].clear; + char s[7]; + unsigned long val; + + val =3D st->current_prot & pte_bits[i].mask; + if (val) { + if (pte_bits[i].mask =3D=3D _PAGE_SOFT) + sprintf(s, pte_bits[i].set, val >> 8); + else + sprintf(s, "%s", pte_bits[i].set); + } else { + sprintf(s, "%s", pte_bits[i].clear); + } =20 - if (s) - pt_dump_seq_printf(st->seq, " %s", s); + pt_dump_seq_printf(st->seq, " %s", s); } } =20 --=20 2.34.1 From nobody Fri Dec 19 18:45:38 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2DA3CD493F for ; Thu, 21 Sep 2023 02:50:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229699AbjIUCuz (ORCPT ); Wed, 20 Sep 2023 22:50:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52974 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229687AbjIUCuw (ORCPT ); Wed, 20 Sep 2023 22:50:52 -0400 Received: from Atcsqr.andestech.com (60-248-80-70.hinet-ip.hinet.net [60.248.80.70]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 742A0F4 for ; Wed, 20 Sep 2023 19:50:44 -0700 (PDT) Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by Atcsqr.andestech.com with ESMTP id 38L2od68059282; Thu, 21 Sep 2023 10:50:39 +0800 (+08) (envelope-from peterlin@andestech.com) Received: from atctrx.andestech.com (10.0.15.173) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Thu, 21 Sep 2023 10:50:34 +0800 From: Yu Chien Peter Lin To: , , , , , , , , CC: , Yu Chien Peter Lin Subject: [PATCH v4 2/3] riscv: Introduce PBMT field to PTDUMP Date: Thu, 21 Sep 2023 10:50:21 +0800 Message-ID: <20230921025022.3989723-3-peterlin@andestech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230921025022.3989723-1-peterlin@andestech.com> References: <20230921025022.3989723-1-peterlin@andestech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.0.15.173] X-DNSRBL: X-MAIL: Atcsqr.andestech.com 38L2od68059282 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This patch introduces the PBMT field to the PTDUMP, so it can display the memory attributes for NC or IO. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Alexandre Ghiti Tested-by: Alexandre Ghiti --- Changes v1 -> v2 - no change Changes v2 -> v3 - Add ".." when PBMT field is clear Changes v3 -> v4 - Include Alexandre's RB/TB-tags --- arch/riscv/mm/ptdump.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/riscv/mm/ptdump.c b/arch/riscv/mm/ptdump.c index 57a0926c6627..13997cf3fe36 100644 --- a/arch/riscv/mm/ptdump.c +++ b/arch/riscv/mm/ptdump.c @@ -135,6 +135,12 @@ struct prot_bits { =20 static const struct prot_bits pte_bits[] =3D { { +#ifdef CONFIG_64BIT + .mask =3D _PAGE_MTMASK_SVPBMT, + .set =3D "MT(%s)", + .clear =3D " .. ", + }, { +#endif .mask =3D _PAGE_SOFT, .set =3D "RSW(%d)", .clear =3D " .. ", @@ -205,6 +211,16 @@ static void dump_prot(struct pg_state *st) if (val) { if (pte_bits[i].mask =3D=3D _PAGE_SOFT) sprintf(s, pte_bits[i].set, val >> 8); +#ifdef CONFIG_64BIT + else if (pte_bits[i].mask =3D=3D _PAGE_MTMASK_SVPBMT) { + if (val =3D=3D _PAGE_NOCACHE_SVPBMT) + sprintf(s, pte_bits[i].set, "NC"); + else if (val =3D=3D _PAGE_IO_SVPBMT) + sprintf(s, pte_bits[i].set, "IO"); + else + sprintf(s, pte_bits[i].set, "??"); + } +#endif else sprintf(s, "%s", pte_bits[i].set); } else { --=20 2.34.1 From nobody Fri Dec 19 18:45:38 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3AADCD4938 for ; Thu, 21 Sep 2023 02:50:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229686AbjIUCvC (ORCPT ); Wed, 20 Sep 2023 22:51:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54482 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229720AbjIUCu7 (ORCPT ); Wed, 20 Sep 2023 22:50:59 -0400 Received: from Atcsqr.andestech.com (60-248-80-70.hinet-ip.hinet.net [60.248.80.70]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 55304EA for ; Wed, 20 Sep 2023 19:50:50 -0700 (PDT) Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by Atcsqr.andestech.com with ESMTP id 38L2oi9T059298; Thu, 21 Sep 2023 10:50:44 +0800 (+08) (envelope-from peterlin@andestech.com) Received: from atctrx.andestech.com (10.0.15.173) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Thu, 21 Sep 2023 10:50:39 +0800 From: Yu Chien Peter Lin To: , , , , , , , , CC: , Yu Chien Peter Lin Subject: [PATCH v4 3/3] riscv: Introduce NAPOT field to PTDUMP Date: Thu, 21 Sep 2023 10:50:22 +0800 Message-ID: <20230921025022.3989723-4-peterlin@andestech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230921025022.3989723-1-peterlin@andestech.com> References: <20230921025022.3989723-1-peterlin@andestech.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.0.15.173] X-DNSRBL: X-MAIL: Atcsqr.andestech.com 38L2oi9T059298 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This patch introduces the NAPOT field to PTDUMP, allowing it to display the letter "N" for pages that have the 63rd bit set. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Alexandre Ghiti Tested-by: Alexandre Ghiti --- Changes v1 -> v3 - no change Changes v3 -> v4 - Include Alexandre's RB/TB-tags --- arch/riscv/mm/ptdump.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/riscv/mm/ptdump.c b/arch/riscv/mm/ptdump.c index 13997cf3fe36..b71f08b91e53 100644 --- a/arch/riscv/mm/ptdump.c +++ b/arch/riscv/mm/ptdump.c @@ -136,6 +136,10 @@ struct prot_bits { static const struct prot_bits pte_bits[] =3D { { #ifdef CONFIG_64BIT + .mask =3D _PAGE_NAPOT, + .set =3D "N", + .clear =3D ".", + }, { .mask =3D _PAGE_MTMASK_SVPBMT, .set =3D "MT(%s)", .clear =3D " .. ", --=20 2.34.1