From nobody Fri Dec 19 22:04:37 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF0BCCD493B for ; Thu, 21 Sep 2023 01:53:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229809AbjIUBxP (ORCPT ); Wed, 20 Sep 2023 21:53:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229579AbjIUBxM (ORCPT ); Wed, 20 Sep 2023 21:53:12 -0400 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5CAF8AF; Wed, 20 Sep 2023 18:53:04 -0700 (PDT) Received: from loongson.cn (unknown [10.20.42.201]) by gateway (Coremail) with SMTP id _____8DxFej+oQtlcHEqAA--.22794S3; Thu, 21 Sep 2023 09:53:02 +0800 (CST) Received: from localhost.localdomain (unknown [10.20.42.201]) by localhost.localdomain (Coremail) with SMTP id AQAAf8AxndzwoQtlCvsMAA--.26254S3; Thu, 21 Sep 2023 09:53:01 +0800 (CST) From: Yinbo Zhu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jianmin Lv , wanghongliang@loongson.cn, loongson-kernel@lists.loongnix.cn, Yinbo Zhu , Conor Dooley Subject: [PATCH v6 1/2] gpio: dt-bindings: add more loongson gpio chip support Date: Thu, 21 Sep 2023 09:52:46 +0800 Message-Id: <20230921015247.23478-2-zhuyinbo@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20230921015247.23478-1-zhuyinbo@loongson.cn> References: <20230921015247.23478-1-zhuyinbo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: AQAAf8AxndzwoQtlCvsMAA--.26254S3 X-CM-SenderInfo: 52kx5xhqerqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This patch was to add loongson 2k0500, 2k2000 and 3a5000 gpio chip dt-bindings support in yaml file. Signed-off-by: Yinbo Zhu Reviewed-by: Linus Walleij Reviewed-by: Conor Dooley --- .../bindings/gpio/loongson,ls-gpio.yaml | 21 +++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml b= /Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml index fb86e8ce6349..cf3b1b270aa8 100644 --- a/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml @@ -11,9 +11,22 @@ maintainers: =20 properties: compatible: - enum: - - loongson,ls2k-gpio - - loongson,ls7a-gpio + oneOf: + - enum: + - loongson,ls2k-gpio + - loongson,ls2k0500-gpio0 + - loongson,ls2k0500-gpio1 + - loongson,ls2k2000-gpio0 + - loongson,ls2k2000-gpio1 + - loongson,ls2k2000-gpio2 + - loongson,ls3a5000-gpio + - loongson,ls7a-gpio + - items: + - const: loongson,ls2k1000-gpio + - const: loongson,ls2k-gpio + - items: + - const: loongson,ls7a1000-gpio + - const: loongson,ls7a-gpio =20 reg: maxItems: 1 @@ -49,7 +62,7 @@ examples: #include =20 gpio0: gpio@1fe00500 { - compatible =3D "loongson,ls2k-gpio"; + compatible =3D "loongson,ls2k1000-gpio", "loongson,ls2k-gpio"; reg =3D <0x1fe00500 0x38>; ngpios =3D <64>; #gpio-cells =3D <2>; --=20 2.20.1 From nobody Fri Dec 19 22:04:37 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9767BCD493A for ; Thu, 21 Sep 2023 01:53:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229824AbjIUBxR (ORCPT ); Wed, 20 Sep 2023 21:53:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229801AbjIUBxN (ORCPT ); Wed, 20 Sep 2023 21:53:13 -0400 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 3E6A9B7; Wed, 20 Sep 2023 18:53:05 -0700 (PDT) Received: from loongson.cn (unknown [10.20.42.201]) by gateway (Coremail) with SMTP id _____8BxNugAogtldnEqAA--.27948S3; Thu, 21 Sep 2023 09:53:04 +0800 (CST) Received: from localhost.localdomain (unknown [10.20.42.201]) by localhost.localdomain (Coremail) with SMTP id AQAAf8AxndzwoQtlCvsMAA--.26254S4; Thu, 21 Sep 2023 09:53:02 +0800 (CST) From: Yinbo Zhu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jianmin Lv , wanghongliang@loongson.cn, loongson-kernel@lists.loongnix.cn, Yinbo Zhu Subject: [PATCH v6 2/2] gpio: loongson: add more gpio chip support Date: Thu, 21 Sep 2023 09:52:47 +0800 Message-Id: <20230921015247.23478-3-zhuyinbo@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20230921015247.23478-1-zhuyinbo@loongson.cn> References: <20230921015247.23478-1-zhuyinbo@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: AQAAf8AxndzwoQtlCvsMAA--.26254S4 X-CM-SenderInfo: 52kx5xhqerqz5rrqw2lrqou0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This patch was to add loongson 2k0500, 2k2000 and 3a5000 gpio chip driver support and define inten_offset attibute to enable gpio chip interrupt. Signed-off-by: Yinbo Zhu Reviewed-by: Linus Walleij --- drivers/gpio/gpio-loongson-64bit.c | 119 ++++++++++++++++++++++++++--- 1 file changed, 110 insertions(+), 9 deletions(-) diff --git a/drivers/gpio/gpio-loongson-64bit.c b/drivers/gpio/gpio-loongso= n-64bit.c index 06213bbfabdd..6749d4dd6d64 100644 --- a/drivers/gpio/gpio-loongson-64bit.c +++ b/drivers/gpio/gpio-loongson-64bit.c @@ -26,6 +26,7 @@ struct loongson_gpio_chip_data { unsigned int conf_offset; unsigned int out_offset; unsigned int in_offset; + unsigned int inten_offset; }; =20 struct loongson_gpio_chip { @@ -117,19 +118,29 @@ static void loongson_gpio_set(struct gpio_chip *chip,= unsigned int pin, int valu =20 static int loongson_gpio_to_irq(struct gpio_chip *chip, unsigned int offse= t) { + unsigned int u; struct platform_device *pdev =3D to_platform_device(chip->parent); + struct loongson_gpio_chip *lgpio =3D to_loongson_gpio_chip(chip); + + if (lgpio->chip_data->mode =3D=3D BIT_CTRL_MODE) { + /* Get the register index from offset then multiply by bytes per registe= r */ + u =3D readl(lgpio->reg_base + lgpio->chip_data->inten_offset + (offset /= 32) * 4); + u |=3D BIT(offset % 32); + writel(u, lgpio->reg_base + lgpio->chip_data->inten_offset + (offset / 3= 2) * 4); + } else { + writeb(1, lgpio->reg_base + lgpio->chip_data->inten_offset + offset); + } =20 return platform_get_irq(pdev, offset); } =20 static int loongson_gpio_init(struct device *dev, struct loongson_gpio_chi= p *lgpio, - struct device_node *np, void __iomem *reg_base) + void __iomem *reg_base) { int ret; u32 ngpios; =20 lgpio->reg_base =3D reg_base; - if (lgpio->chip_data->mode =3D=3D BIT_CTRL_MODE) { ret =3D bgpio_init(&lgpio->chip, dev, 8, lgpio->reg_base + lgpio->chip_data->in_offset, @@ -148,15 +159,15 @@ static int loongson_gpio_init(struct device *dev, str= uct loongson_gpio_chip *lgp lgpio->chip.direction_output =3D loongson_gpio_direction_output; lgpio->chip.set =3D loongson_gpio_set; lgpio->chip.parent =3D dev; + device_property_read_u32(dev, "ngpios", &ngpios); + lgpio->chip.ngpio =3D ngpios; spin_lock_init(&lgpio->lock); } =20 - device_property_read_u32(dev, "ngpios", &ngpios); - - lgpio->chip.can_sleep =3D 0; - lgpio->chip.ngpio =3D ngpios; lgpio->chip.label =3D lgpio->chip_data->label; - lgpio->chip.to_irq =3D loongson_gpio_to_irq; + lgpio->chip.can_sleep =3D false; + if (lgpio->chip_data->inten_offset) + lgpio->chip.to_irq =3D loongson_gpio_to_irq; =20 return devm_gpiochip_add_data(dev, &lgpio->chip, lgpio); } @@ -165,7 +176,6 @@ static int loongson_gpio_probe(struct platform_device *= pdev) { void __iomem *reg_base; struct loongson_gpio_chip *lgpio; - struct device_node *np =3D pdev->dev.of_node; struct device *dev =3D &pdev->dev; =20 lgpio =3D devm_kzalloc(dev, sizeof(*lgpio), GFP_KERNEL); @@ -178,7 +188,7 @@ static int loongson_gpio_probe(struct platform_device *= pdev) if (IS_ERR(reg_base)) return PTR_ERR(reg_base); =20 - return loongson_gpio_init(dev, lgpio, np, reg_base); + return loongson_gpio_init(dev, lgpio, reg_base); } =20 static const struct loongson_gpio_chip_data loongson_gpio_ls2k_data =3D { @@ -187,6 +197,57 @@ static const struct loongson_gpio_chip_data loongson_g= pio_ls2k_data =3D { .conf_offset =3D 0x0, .in_offset =3D 0x20, .out_offset =3D 0x10, + .inten_offset =3D 0x30, +}; + +static const struct loongson_gpio_chip_data loongson_gpio_ls2k0500_data0 = =3D { + .label =3D "ls2k0500_gpio", + .mode =3D BIT_CTRL_MODE, + .conf_offset =3D 0x0, + .in_offset =3D 0x8, + .out_offset =3D 0x10, + .inten_offset =3D 0xb0, +}; + +static const struct loongson_gpio_chip_data loongson_gpio_ls2k0500_data1 = =3D { + .label =3D "ls2k0500_gpio", + .mode =3D BIT_CTRL_MODE, + .conf_offset =3D 0x0, + .in_offset =3D 0x8, + .out_offset =3D 0x10, + .inten_offset =3D 0x98, +}; + +static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data0 = =3D { + .label =3D "ls2k2000_gpio", + .mode =3D BIT_CTRL_MODE, + .conf_offset =3D 0x0, + .in_offset =3D 0xc, + .out_offset =3D 0x8, +}; + +static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data1 = =3D { + .label =3D "ls2k2000_gpio", + .mode =3D BIT_CTRL_MODE, + .conf_offset =3D 0x0, + .in_offset =3D 0x20, + .out_offset =3D 0x10, +}; + +static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data2 = =3D { + .label =3D "ls2k2000_gpio", + .mode =3D BIT_CTRL_MODE, + .conf_offset =3D 0x84, + .in_offset =3D 0x88, + .out_offset =3D 0x80, +}; + +static const struct loongson_gpio_chip_data loongson_gpio_ls3a5000_data = =3D { + .label =3D "ls3a5000_gpio", + .mode =3D BIT_CTRL_MODE, + .conf_offset =3D 0x0, + .in_offset =3D 0xc, + .out_offset =3D 0x8, }; =20 static const struct loongson_gpio_chip_data loongson_gpio_ls7a_data =3D { @@ -202,6 +263,30 @@ static const struct of_device_id loongson_gpio_of_matc= h[] =3D { .compatible =3D "loongson,ls2k-gpio", .data =3D &loongson_gpio_ls2k_data, }, + { + .compatible =3D "loongson,ls2k0500-gpio0", + .data =3D &loongson_gpio_ls2k0500_data0, + }, + { + .compatible =3D "loongson,ls2k0500-gpio1", + .data =3D &loongson_gpio_ls2k0500_data1, + }, + { + .compatible =3D "loongson,ls2k2000-gpio0", + .data =3D &loongson_gpio_ls2k2000_data0, + }, + { + .compatible =3D "loongson,ls2k2000-gpio1", + .data =3D &loongson_gpio_ls2k2000_data1, + }, + { + .compatible =3D "loongson,ls2k2000-gpio2", + .data =3D &loongson_gpio_ls2k2000_data2, + }, + { + .compatible =3D "loongson,ls3a5000-gpio", + .data =3D &loongson_gpio_ls3a5000_data, + }, { .compatible =3D "loongson,ls7a-gpio", .data =3D &loongson_gpio_ls7a_data, @@ -215,6 +300,22 @@ static const struct acpi_device_id loongson_gpio_acpi_= match[] =3D { .id =3D "LOON0002", .driver_data =3D (kernel_ulong_t)&loongson_gpio_ls7a_data, }, + { + .id =3D "LOON0007", + .driver_data =3D (kernel_ulong_t)&loongson_gpio_ls3a5000_data, + }, + { + .id =3D "LOON000A", + .driver_data =3D (kernel_ulong_t)&loongson_gpio_ls2k2000_data0, + }, + { + .id =3D "LOON000B", + .driver_data =3D (kernel_ulong_t)&loongson_gpio_ls2k2000_data1, + }, + { + .id =3D "LOON000C", + .driver_data =3D (kernel_ulong_t)&loongson_gpio_ls2k2000_data2, + }, {} }; MODULE_DEVICE_TABLE(acpi, loongson_gpio_acpi_match); --=20 2.20.1