From nobody Fri Sep 20 11:42:26 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37908CD37B0 for ; Mon, 18 Sep 2023 08:43:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240817AbjIRInB (ORCPT ); Mon, 18 Sep 2023 04:43:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39812 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240716AbjIRImb (ORCPT ); Mon, 18 Sep 2023 04:42:31 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 687349D for ; Mon, 18 Sep 2023 01:42:18 -0700 (PDT) X-UUID: 42b1b1b055ff11ee8051498923ad61e6-20230918 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=72eVayWVp8rYcnVKWBje8fRu/Ay09M8ccvdljh1dMk4=; b=PqMdtJYmOh+fNAqeSrd+qfoLPzpkAGLCG7KwFBPibIdOrkUQ5zFzhwRfmkVnS88PCH6di6ZbIS/cbyKt2IQrsvQqAfhFP88KPg29yLRTVyBDiPHCeVUP4YhL6e70SfIsw8gMooQ7A4gnnKIwfJr2dvSCoh6esufmXJk0zXo0jwI=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.31,REQID:d9f6cd49-985a-4f04-b2e3-f942c3bafced,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:0ad78a4,CLOUDID:99efd2ef-9a6e-4c39-b73e-f2bc08ca3dc5,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 42b1b1b055ff11ee8051498923ad61e6-20230918 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 115661417; Mon, 18 Sep 2023 16:42:11 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Mon, 18 Sep 2023 16:42:11 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Mon, 18 Sep 2023 16:42:11 +0800 From: Hsiao Chien Sung To: AngeloGioacchino Del Regno , Chun-Kuang Hu , Matthias Brugger CC: Daniel Vetter , David Airlie , Philipp Zabel , Chen-Yu Tsai , CK Hu , , , , , Hsiao Chien Sung Subject: [PATCH v2 05/11] drm/mediatek: Adjust DRM mode configs for IGT Date: Mon, 18 Sep 2023 16:42:01 +0800 Message-ID: <20230918084207.23604-6-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230918084207.23604-1-shawn.sung@mediatek.com> References: <20230918084207.23604-1-shawn.sung@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" IGT (Intel GPU Tool) could commit the following planes during the test: kms_plane: The sub-tests pixel-format-* will create planes with size of 1 or 4512 pixels, these size will be rejected by the original mode configs. Adjust minimum and maximum value of both plane width and height. kms_cursor_crc: If cursor_width and cursor_height is not defined, IGT uses min_width and min_height as the limitation when creating cursor plane so sub-tests like cursor-rapid-movement will be skipped. Set cursor_width and cursor_height to 512 pixel can solve the problem. Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/media= tek/mtk_drm_drv.c index 7759a06e5c0e..62581b2a470b 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -429,16 +429,18 @@ static int mtk_drm_kms_init(struct drm_device *drm) if (ret) goto put_mutex_dev; =20 - drm->mode_config.min_width =3D 64; - drm->mode_config.min_height =3D 64; + drm->mode_config.min_width =3D 1; + drm->mode_config.min_height =3D 1; =20 /* * set max width and height as default value(4096x4096). * this value would be used to check framebuffer size limitation * at drm_mode_addfb(). */ - drm->mode_config.max_width =3D 4096; - drm->mode_config.max_height =3D 4096; + drm->mode_config.max_width =3D 8191; + drm->mode_config.max_height =3D 8191; + drm->mode_config.cursor_width =3D 512; + drm->mode_config.cursor_height =3D 512; drm->mode_config.funcs =3D &mtk_drm_mode_config_funcs; drm->mode_config.helper_private =3D &mtk_drm_mode_config_helpers; =20 --=20 2.18.0