From nobody Sun Feb 8 19:19:07 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66EB3EDEC43 for ; Wed, 13 Sep 2023 11:47:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240506AbjIMLrj (ORCPT ); Wed, 13 Sep 2023 07:47:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237163AbjIMLra (ORCPT ); Wed, 13 Sep 2023 07:47:30 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AA2EB19AF; Wed, 13 Sep 2023 04:47:26 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 38DBlF6i034988; Wed, 13 Sep 2023 06:47:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1694605635; bh=qLnPxdmrn3BTI0+nFi+wG309MiqnPoLWlUA/axflbOQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=qBTRVlcVLA4ZP/MWfqxW6oAhtFugHPd5R/v6GBNRBIfOuYuwawValHiByC0sEKzkm cl89QfxKDYZzfbWleJtst5j9caldwGP4ZmhOKE+EfALP0x3U3FH+PCOC/2yMrIb83N Oxf3olAZaA0qqScK8g6QR60BZ1HfZjkm2wMeMMhY= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 38DBlFv0113438 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 13 Sep 2023 06:47:15 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 13 Sep 2023 06:47:14 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 13 Sep 2023 06:47:14 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 38DBlDqj001933; Wed, 13 Sep 2023 06:47:14 -0500 From: Nitin Yadav To: , , CC: , , , , , , , , Subject: [PATCH 1/3] arm64: dts: ti: Add GPMC NAND support Date: Wed, 13 Sep 2023 17:17:09 +0530 Message-ID: <20230913114711.2937844-2-n-yadav@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230913114711.2937844-1-n-yadav@ti.com> References: <20230913114711.2937844-1-n-yadav@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support for AM62Q NAND card: X8 NAND EXPANSION BOARD card (PROC143E1) for AM62x LP SK board. Signed-off-by: Nitin Yadav --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 29 ++++++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am62.dtsi | 2 ++ 2 files changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am62-main.dtsi index 284b90c94da8..e93e79d8083f 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -955,4 +955,33 @@ mcasp2: audio-controller@2b20000 { power-domains =3D <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>; status =3D "disabled"; }; + gpmc0: memory-controller@3b000000 { + status =3D "disabled"; + compatible =3D "ti,am64-gpmc"; + power-domains =3D <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>; + clocks =3D <&k3_clks 80 0>; + clock-names =3D "fck"; + reg =3D <0x00 0x03b000000 0x00 0x400>, + <0x00 0x050000000 0x00 0x8000000>; + reg-names =3D "cfg", "data"; + interrupts =3D ; + gpmc,num-cs =3D <3>; + gpmc,num-waitpins =3D <2>; + #address-cells =3D <2>; + #size-cells =3D <1>; + interrupt-controller; + #interrupt-cells =3D <2>; + gpio-controller; + #gpio-cells =3D <2>; + }; + + elm0: ecc@25010000 { + status =3D "disabled"; + compatible =3D "ti,am3352-elm"; + reg =3D <0x00 0x25010000 0x00 0x2000>; + interrupts =3D ; + power-domains =3D <&k3_pds 54 TI_SCI_PD_EXCLUSIVE>; + clocks =3D <&k3_clks 54 0>; + clock-names =3D "fck"; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62.dtsi b/arch/arm64/boot/dts/ti/k= 3-am62.dtsi index 11f14eef2d44..f7d8aad0a016 100644 --- a/arch/arm64/boot/dts/ti/k3-am62.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62.dtsi @@ -76,6 +76,8 @@ cbass_main: bus@f0000 { <0x00 0x70000000 0x00 0x70000000 0x00 0x00010000>, /* OCSRAM */ <0x01 0x00000000 0x01 0x00000000 0x00 0x00310000>, /* A53 PERIPHBASE */ <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, /* FSS0 DAT3 */ + <0x00 0x3b000000 0x00 0x3b000000 0x00 0x00000400>, /* GPMC0_CFG */ + <0x00 0x50000000 0x00 0x50000000 0x00 0x08000000>, /* GPMC0 DATA */ =20 /* MCU Domain Range */ <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>, --=20 2.25.1 From nobody Sun Feb 8 19:19:07 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1297EDEC48 for ; Wed, 13 Sep 2023 11:47:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240471AbjIMLrc (ORCPT ); Wed, 13 Sep 2023 07:47:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236875AbjIMLra (ORCPT ); Wed, 13 Sep 2023 07:47:30 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F1181989; Wed, 13 Sep 2023 04:47:26 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 38DBlGHV048338; Wed, 13 Sep 2023 06:47:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1694605636; bh=IeudZ4fyNiSUzSFdZ+ye8+mXjMuc5JutJCwp9rdldJk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=DoS2QAlVdhKMldqSsxB+QKMzwT+CMFanfcD3s6VUGhtp3C/TEenZSWI6jJRnj9sjY Rijveqn+X00efu1zQPHCOnoj1Bp6PGO8MOGU8iyzcUYEJCLSLKlkwpdeyeC8YgAAHl 2dECwrvzhKYLLVjxGwu+odY4jjpKd55t7TuipCPs= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 38DBlG0O027437 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 13 Sep 2023 06:47:16 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 13 Sep 2023 06:47:16 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 13 Sep 2023 06:47:16 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 38DBlFkt128040; Wed, 13 Sep 2023 06:47:15 -0500 From: Nitin Yadav To: , , CC: , , , , , , , , Subject: [PATCH 2/3] arm64: dts: ti: Add GPMC NAND overlay Date: Wed, 13 Sep 2023 17:17:10 +0530 Message-ID: <20230913114711.2937844-3-n-yadav@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230913114711.2937844-1-n-yadav@ti.com> References: <20230913114711.2937844-1-n-yadav@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Introduce k3-am62-lp-sk-nand.dtso overlay file to support the addon card. NAND has partitions for different boot components as below: 0x000000000000-0x000000200000 : "NAND.tiboot3 0x000000200000-0x000000400000 : "NAND.tispl 0x000000400000-0x000000600000 : "NAND.tiboot3.backup 0x000000600000-0x000000a00000 : "NAND.u-boot 0x000000a00000-0x000000a40000 : "NAND.u-boot-env 0x000000a40000-0x000000a80000 : "NAND.u-boot-env.backup 0x000000a80000-0x000040000000 : "NAND.file-system Disable mcasp1 node in DT to avoid pinmux conflict. Update Makefile to include k3-am62-lp-sk-nand.dtso. Signed-off-by: Nitin Yadav --- arch/arm64/boot/dts/ti/Makefile | 1 + .../arm64/boot/dts/ti/k3-am62-lp-sk-nand.dtso | 119 ++++++++++++++++++ 2 files changed, 120 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am62-lp-sk-nand.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makef= ile index e7b8e2e7f083..40159abf058e 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -19,6 +19,7 @@ dtb-$(CONFIG_ARCH_K3) +=3D k3-am625-verdin-wifi-dahlia.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am625-verdin-wifi-dev.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am625-verdin-wifi-yavia.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am62-lp-sk.dtb +dtb-$(CONFIG_ARCH_K3) +=3D k3-am62-lp-sk-nand.dtbo dtb-$(CONFIG_ARCH_K3) +=3D k3-am62x-sk-hdmi-audio.dtbo =20 # Boards with AM62Ax SoC diff --git a/arch/arm64/boot/dts/ti/k3-am62-lp-sk-nand.dtso b/arch/arm64/bo= ot/dts/ti/k3-am62-lp-sk-nand.dtso new file mode 100644 index 000000000000..0f4e26db534b --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62-lp-sk-nand.dtso @@ -0,0 +1,119 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti= .com/ + */ + +/dts-v1/; +/plugin/; + + +#include +#include + +#include "k3-pinctrl.h" + +&mcasp1 { + status =3D "disabled"; +}; + +&main_pmx0 { + gpmc0_pins_default: gpmc0-pins-default { + pinctrl-single,pins =3D < + AM62X_IOPAD(0x003c, PIN_INPUT, 0) /* (M25) GPMC0_AD0 */ + AM62X_IOPAD(0x0040, PIN_INPUT, 0) /* (N23) GPMC0_AD1 */ + AM62X_IOPAD(0x0044, PIN_INPUT, 0) /* (N24) GPMC0_AD2 */ + AM62X_IOPAD(0x0048, PIN_INPUT, 0) /* (N25) GPMC0_AD3 */ + AM62X_IOPAD(0x004c, PIN_INPUT, 0) /* (P24) GPMC0_AD4 */ + AM62X_IOPAD(0x0050, PIN_INPUT, 0) /* (P22) GPMC0_AD5 */ + AM62X_IOPAD(0x0054, PIN_INPUT, 0) /* (P21) GPMC0_AD6 */ + AM62X_IOPAD(0x0058, PIN_INPUT, 0) /* (R23) GPMC0_AD7 */ + AM62X_IOPAD(0x0084, PIN_OUTPUT, 0) /* (L23) GPMC0_ADVn_ALE */ + AM62X_IOPAD(0x0088, PIN_OUTPUT, 0) /* (L24) GPMC0_OEn_REn */ + AM62X_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L25) GPMC0_WEn */ + AM62X_IOPAD(0x0090, PIN_OUTPUT, 0) /* (M24) GPMC0_BE0n_CLE */ + AM62X_IOPAD(0x00a8, PIN_OUTPUT, 0) /* (M21) GPMC0_CSn0 */ + AM62X_IOPAD(0x0098, PIN_INPUT, 0) /* (U23) GPMC0_WAIT0 */ + >; + }; +}; + +&gpmc0 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gpmc0_pins_default>; + ranges =3D <0 0 0x00 0x51000000 0x01000000>; /* CS0 space. Min partition = =3D 16MB */ + #address-cells =3D <2>; + #size-cells =3D <1>; + + nand0_0: nand@0,0 { + compatible =3D "ti,am64-nand"; + reg =3D <0 0 64>; /* device IO registers */ + interrupt-parent =3D <&gpmc0>; + interrupts =3D <0 IRQ_TYPE_NONE>, /* fifoevent */ + <1 IRQ_TYPE_NONE>; /* termcount */ + rb-gpios =3D <&gpmc0 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ + ti,nand-xfer-type =3D "prefetch-polled"; + ti,nand-ecc-opt =3D "bch8"; /* BCH8: Bootrom limitation */ + ti,elm-id =3D <&elm0>; + nand-bus-width =3D <8>; + gpmc,device-width =3D <1>; + gpmc,sync-clk-ps =3D <0>; + gpmc,cs-on-ns =3D <0>; + gpmc,cs-rd-off-ns =3D <40>; + gpmc,cs-wr-off-ns =3D <40>; + gpmc,adv-on-ns =3D <0>; + gpmc,adv-rd-off-ns =3D <25>; + gpmc,adv-wr-off-ns =3D <25>; + gpmc,we-on-ns =3D <0>; + gpmc,we-off-ns =3D <20>; + gpmc,oe-on-ns =3D <3>; + gpmc,oe-off-ns =3D <30>; + gpmc,access-ns =3D <30>; + gpmc,rd-cycle-ns =3D <40>; + gpmc,wr-cycle-ns =3D <40>; + gpmc,bus-turnaround-ns =3D <0>; + gpmc,cycle2cycle-delay-ns =3D <0>; + gpmc,clk-activation-ns =3D <0>; + gpmc,wr-access-ns =3D <40>; + gpmc,wr-data-mux-bus-ns =3D <0>; + + partitions { + compatible =3D "fixed-partitions"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + partition@0 { + label =3D "NAND.tiboot3"; + reg =3D <0x00000000 0x00200000>; /* 2M */ + }; + partition@200000 { + label =3D "NAND.tispl"; + reg =3D <0x00200000 0x00200000>; /* 2M */ + }; + partition@400000 { + label =3D "NAND.tiboot3.backup"; /* 2M */ + reg =3D <0x00400000 0x00200000>; /* BootROM looks at 4M */ + }; + partition@600000 { + label =3D "NAND.u-boot"; + reg =3D <0x00600000 0x00400000>; /* 4M */ + }; + partition@a00000 { + label =3D "NAND.u-boot-env"; + reg =3D <0x00a00000 0x00040000>; /* 256K */ + }; + partition@a40000 { + label =3D "NAND.u-boot-env.backup"; + reg =3D <0x00a40000 0x00040000>; /* 256K */ + }; + partition@a80000 { + label =3D "NAND.file-system"; + reg =3D <0x00a80000 0x3f580000>; + }; + }; + }; +}; + +&elm0{ + status =3D "okay"; +}; --=20 2.25.1 From nobody Sun Feb 8 19:19:07 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C204EDEC46 for ; Wed, 13 Sep 2023 11:47:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240527AbjIMLrg (ORCPT ); Wed, 13 Sep 2023 07:47:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45552 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234009AbjIMLra (ORCPT ); Wed, 13 Sep 2023 07:47:30 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 63D2C19AD; Wed, 13 Sep 2023 04:47:26 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 38DBlIEq048343; Wed, 13 Sep 2023 06:47:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1694605638; bh=d9AJ9pntbaXNoG60y3mT+5agN7FJMhTuesiy4vDwjRE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=XjTLAw6VP/mlZU3zOMZSfd5cvXMFo+eeBDNRS98Z2n2iuG9U+KQdtTqxPbaJo9adJ CQlEK17qojZT7Gl8xpx98dFcEWKI9R11AHBvvUbs5UEHomZ4Z5MqaYgFD22mq/9N8w O6LGxOCiAk8NtPv7RatmnIZo+Kms6PLsmfTSD5Rc= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 38DBlIWU041427 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 13 Sep 2023 06:47:18 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 13 Sep 2023 06:47:17 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 13 Sep 2023 06:47:17 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 38DBlGoK116553; Wed, 13 Sep 2023 06:47:17 -0500 From: Nitin Yadav To: , , CC: , , , , , , , , Subject: [PATCH 3/3] arm64: defconfig: Enable GPMC NAND support Date: Wed, 13 Sep 2023 17:17:11 +0530 Message-ID: <20230913114711.2937844-4-n-yadav@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230913114711.2937844-1-n-yadav@ti.com> References: <20230913114711.2937844-1-n-yadav@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Enable config required to support GPMC NAND on AM62x LP SK abd AM64x SKEVM. Signed-off-by: Nitin Yadav --- arch/arm64/configs/defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 5315789f4868..a3ace041e9ff 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -270,6 +270,8 @@ CONFIG_MTD_DATAFLASH=3Dy CONFIG_MTD_SST25L=3Dy CONFIG_MTD_RAW_NAND=3Dy CONFIG_MTD_NAND_DENALI_DT=3Dy +CONFIG_MTD_NAND_OMAP2=3Dm +CONFIG_MTD_NAND_OMAP_BCH=3Dy CONFIG_MTD_NAND_MARVELL=3Dy CONFIG_MTD_NAND_BRCMNAND=3Dm CONFIG_MTD_NAND_FSL_IFC=3Dy @@ -1351,6 +1353,7 @@ CONFIG_ARM_MEDIATEK_CCI_DEVFREQ=3Dm CONFIG_EXTCON_PTN5150=3Dm CONFIG_EXTCON_USB_GPIO=3Dy CONFIG_EXTCON_USBC_CROS_EC=3Dy +CONFIG_OMAP_GPMC=3Dm CONFIG_RENESAS_RPCIF=3Dm CONFIG_IIO=3Dy CONFIG_EXYNOS_ADC=3Dy --=20 2.25.1