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Thu, 7 Sep 2023 00:11:24 -0700 From: Kartik To: , , , , , , , , , , , , , , , Subject: [PATCH v3 5/6] soc/tegra: fuse: Add ACPI support for Tegra194 and Tegra234 Date: Thu, 7 Sep 2023 12:40:51 +0530 Message-ID: <20230907071052.3906-6-kkartik@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230907071052.3906-1-kkartik@nvidia.com> References: <20230907071052.3906-1-kkartik@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F7:EE_|PH7PR12MB6762:EE_ X-MS-Office365-Filtering-Correlation-Id: 67f74103-5462-4c4f-78fe-08dbaf71b294 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: rbVSmXue0yG7CXq8wkfTc2nNHwprDcH3cWyVTiOZmz836Fm9xEbQp+hxPKepHulICpKjBYL5JW0COHh+n27nBPmBx5EGdzSIdhNIcLgScM/7fX2NOl1kMywigN8DuNSTUhKEob6lPsmCTNBpfjwOafwOkCVBnjAPh4T83mlSf9eBccekimLtnc4yTmEpMNnjEuz963Iu9ceIDeK9/HIjDLzJHRqM8cvH9pkCz7t/+4riSfQJRLHmjm5sBMN7opWxiEx3fw1OqrZmAFqJxIvuB/tpZcws9iaJSr/D51Moh9MBuqDc+ex9g1G4gR/SAAltNYL2+o4lXwCjkC8cdSlHhByW3ob5QJa6uaQXTOTC+Nz8rqGSMsnIkQHaHsLTIL5CqxYahMqz78uTVx7UiZYxRZ6vEkqs+M5tU6uhGdJ9FKPNg8lGnTyhHDvdLiR2rI1vR6KCZCIdjKhihrpaLxdura3HBmdkoDJUZQxUwzbevMJ6NLv8jTZiiQ4uRtAxCxSHgwouLSQHFZtMi0kYtHDxXYwgL+C3nGfoYD+DGJ0V9VwP/Kjv0Oln66e4mFoSPdB3tisWrWmj41WDwnRsn/8EqSFxeLV1HMdN5p6hDEcsz/+vmQjHN2jVolFKdRP4GmasnhNmFmvie/7vRg3Pi5QEcUz5j8s18oc3qROk0ChmM5TsJrOi05aEK/ZOKaPPYm9OZUbB+58gg4kNBq5sMpUaxXGqdO9WYbc3BLya930snz0ImSzlbYn0fRb6jTBaCqtp X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(376002)(346002)(39860400002)(136003)(396003)(1800799009)(82310400011)(186009)(451199024)(36840700001)(46966006)(40470700004)(8676002)(8936002)(83380400001)(47076005)(426003)(36860700001)(478600001)(70586007)(70206006)(110136005)(336012)(26005)(2616005)(6666004)(41300700001)(2906002)(40460700003)(921005)(356005)(316002)(5660300002)(7636003)(82740400003)(40480700001)(86362001)(1076003)(36756003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Sep 2023 07:11:46.3734 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 67f74103-5462-4c4f-78fe-08dbaf71b294 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F7.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6762 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add ACPI support for Tegra194 & Tegra243 SoC's. This requires following modifications to the probe when ACPI boot is used: - Initialize soc data. - Add nvmem lookups. - Register soc device. - use devm_clk_get_optional() instead of devm_clk_get() to get fuse->clk, as fuse clocks are not required when using ACPI boot. Also, drop '__init' keyword for tegra_soc_device_register() as this is also used by tegra_fuse_probe() and use dev_err_probe() wherever applicable. Signed-off-by: Kartik --- v2 -> v3: * Updated commit message to specify changes related to inclusion of dev_err_probe(). v1 -> v2: * Updated ACPI ID table 'tegra_fuse_acpi_match'. * Removed ',' after "{ /* sentinel */ }" in 'tegra_fuse_acpi_match'. * Using same probe for ACPI and device-tree boot. * Added code for required initialization when ACPI boot is used. * Make clocks optional for ACPI. * Use dev_err_probe() wherever applicable. * Check if clock has been initialized only when device-tree boot is used. --- drivers/soc/tegra/fuse/fuse-tegra.c | 68 ++++++++++++++++++++++------- 1 file changed, 52 insertions(+), 16 deletions(-) diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/f= use-tegra.c index 64f7001823ce..f35f9651a653 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra.c +++ b/drivers/soc/tegra/fuse/fuse-tegra.c @@ -3,11 +3,13 @@ * Copyright (c) 2013-2023, NVIDIA CORPORATION. All rights reserved. */ =20 +#include #include #include #include #include #include +#include #include #include #include @@ -94,6 +96,11 @@ static const struct of_device_id tegra_fuse_match[] =3D { { /* sentinel */ } }; =20 +static const struct acpi_device_id tegra_fuse_acpi_match[] =3D { + { "NVDA200F" }, + { /* sentinel */ } +}; + static int tegra_fuse_read(void *priv, unsigned int offset, void *value, size_t bytes) { @@ -148,6 +155,37 @@ static int tegra_fuse_probe(struct platform_device *pd= ev) struct resource *res; int err; =20 + /* Initialize the soc data and lookups if using ACPI boot. */ + if (is_acpi_node(pdev->dev.fwnode) && !fuse->soc) { + u8 chip; + + tegra_acpi_init_apbmisc(); + + chip =3D tegra_get_chip_id(); + switch (chip) { +#if defined(CONFIG_ARCH_TEGRA_194_SOC) + case TEGRA194: + fuse->soc =3D &tegra194_fuse_soc; + break; +#endif +#if defined(CONFIG_ARCH_TEGRA_234_SOC) + case TEGRA234: + fuse->soc =3D &tegra234_fuse_soc; + break; +#endif + default: + return dev_err_probe(&pdev->dev, -EINVAL, "Unsupported SoC: %02x\n", ch= ip); + } + + fuse->soc->init(fuse); + tegra_fuse_print_sku_info(&tegra_sku_info); + tegra_soc_device_register(); + + err =3D tegra_fuse_add_lookups(fuse); + if (err) + return dev_err_probe(&pdev->dev, err, "failed to add FUSE lookups\n"); + } + err =3D devm_add_action(&pdev->dev, tegra_fuse_restore, (void __force *)b= ase); if (err) return err; @@ -158,14 +196,9 @@ static int tegra_fuse_probe(struct platform_device *pd= ev) return PTR_ERR(fuse->base); fuse->phys =3D res->start; =20 - fuse->clk =3D devm_clk_get(&pdev->dev, "fuse"); - if (IS_ERR(fuse->clk)) { - if (PTR_ERR(fuse->clk) !=3D -EPROBE_DEFER) - dev_err(&pdev->dev, "failed to get FUSE clock: %ld", - PTR_ERR(fuse->clk)); - - return PTR_ERR(fuse->clk); - } + fuse->clk =3D devm_clk_get_optional(&pdev->dev, "fuse"); + if (IS_ERR(fuse->clk)) + return dev_err_probe(&pdev->dev, PTR_ERR(fuse->clk), "failed to get FUSE= clock\n"); =20 platform_set_drvdata(pdev, fuse); fuse->dev =3D &pdev->dev; @@ -207,12 +240,8 @@ static int tegra_fuse_probe(struct platform_device *pd= ev) } =20 fuse->rst =3D devm_reset_control_get_optional(&pdev->dev, "fuse"); - if (IS_ERR(fuse->rst)) { - err =3D PTR_ERR(fuse->rst); - dev_err(&pdev->dev, "failed to get FUSE reset: %pe\n", - fuse->rst); - return err; - } + if (IS_ERR(fuse->rst)) + return dev_err_probe(&pdev->dev, PTR_ERR(fuse->rst), "failed to get FUSE= reset"); =20 /* * FUSE clock is enabled at a boot time, hence this resume/suspend @@ -294,6 +323,7 @@ static struct platform_driver tegra_fuse_driver =3D { .driver =3D { .name =3D "tegra-fuse", .of_match_table =3D tegra_fuse_match, + .acpi_match_table =3D tegra_fuse_acpi_match, .pm =3D &tegra_fuse_pm, .suppress_bind_attrs =3D true, }, @@ -315,7 +345,13 @@ u32 __init tegra_fuse_read_early(unsigned int offset) =20 int tegra_fuse_readl(unsigned long offset, u32 *value) { - if (!fuse->read || !fuse->clk) + /* + * Wait for fuse->clk to be initialized if device-tree boot is used. + */ + if (is_of_node(fuse->dev->fwnode) && !fuse->clk) + return -EPROBE_DEFER; + + if (!fuse->read) return -EPROBE_DEFER; =20 if (IS_ERR(fuse->clk)) @@ -398,7 +434,7 @@ const struct attribute_group tegra194_soc_attr_group = =3D { }; #endif =20 -struct device * __init tegra_soc_device_register(void) +struct device *tegra_soc_device_register(void) { struct soc_device_attribute *attr; struct soc_device *dev; --=20 2.34.1