From nobody Mon Feb 9 19:06:05 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE370EB8FB6 for ; Wed, 6 Sep 2023 06:51:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242024AbjIFGvy (ORCPT ); Wed, 6 Sep 2023 02:51:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35040 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240833AbjIFGvm (ORCPT ); Wed, 6 Sep 2023 02:51:42 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DCABECFD for ; Tue, 5 Sep 2023 23:51:36 -0700 (PDT) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 3FC082B5A; Wed, 6 Sep 2023 08:50:06 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1693983007; bh=Dz3jE5ysfp7p2mTHlnxNnqe7wV8qRrykUPtk9tHtsyI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=V+RAVyc530ikG8dJawk7Wuh5fHKP+UOBaDj+S9m+u91yii3N7xVjqSnr4TQ1/pUOc xxTA3TgxJG9/DVdI7TrEWLvR+Eh9ylRZSXd/QhUcRQ4l3EtQDibwm6um0G9Fq1o+TH B0OsFtw+Rbrl9V7XNP3zTsEoaJAeobeRrRKOjC2g= From: Tomi Valkeinen Date: Wed, 06 Sep 2023 09:50:54 +0300 Subject: [PATCH v4 07/12] drm/bridge: tc358768: Print logical values, not raw register values MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230906-tc358768-v4-7-31725f008a50@ideasonboard.com> References: <20230906-tc358768-v4-0-31725f008a50@ideasonboard.com> In-Reply-To: <20230906-tc358768-v4-0-31725f008a50@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Maxim Schwalm , Francesco Dolcini Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Aradhya Bhatia , Tomi Valkeinen , Marcel Ziswiler X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=4341; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=Dz3jE5ysfp7p2mTHlnxNnqe7wV8qRrykUPtk9tHtsyI=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBk+CFqrPg8Ylb99QL5w6fB6ONZLBsGtyBhHVFMD RVBwraRhLKJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZPghagAKCRD6PaqMvJYe 9XNdEACj4i8pF3/4vYrvFfysIhivKd1SrQPKlr50bbedWn8YUZQTEeUA20PMSBwOPffllhETEUY 5TUfvRfl45nE85j7yJNjOsCXBdZ+Hk5Jt6hCLNCCXef2uuYhFUr60DA6lHOQ8XBC/fA7ds8xx+P ofNhmqg/GO0XxoJJIADSksoCvclwivskuFHMQym8LYikO7QE67+BYm06YcRkCL3vT5shal92mVc VESRYGyHqaNEIhPvnQ64ZOKRlOod8UdYUx81JTICqjUCK8I1sSxsKtpwLEIHhW1B/5wm+NkX58V ZbJHxbCY/o4rMTsYhzYiLjI7bC8r7Na9TZJoWW7NgI+AZlv0DNql8lnZ5IdEzdwh8dUQePZT6ua lBcqxmeQZRlKhih/XWQwhqTFvgcjM6F/z+SrZBpu/+n8fg6xlOXzx7mu4ydxbRVO43vPg5JaiUa rIdyMR7yYR4GEfWJuIcaT6H+tG/PS6xNLjCRQg8oLaX6EQ1qdYyt60EWvl07CQtpZnJ6ymnTDB+ gbxItWLtPzgWH6M2Y4oqPWWdbdYxVFBthyw2BNgpR9usjI+6QcI7l4E/h5L2hdU0AS2Ec0DobOm +aWr0sjs6RRXd2aRvWV/wZFTmgU2A1A0z5A4TtNh2T/hdN+UReKk0Ii5aJyPmPA5du4fd4Vg0He qQgaPibypEiBf3g== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The driver debug prints DSI related timings as raw register values in hex. It is much more useful to see the "logical" value of the timing, not the register value. Change the prints to print the values separately, in case a single register contains multiple values, and use %u to have it in a more human consumable form. Reviewed-by: Peter Ujfalusi Tested-by: Maxim Schwalm # Asus TF700T Tested-by: Marcel Ziswiler Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc3= 58768.c index b98c517c4726..88060f961064 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -739,57 +739,59 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) =20 /* LP11 > 100us for D-PHY Rx Init */ val =3D tc358768_ns_to_cnt(100 * 1000, dsibclk_nsk) - 1; - dev_dbg(priv->dev, "LINEINITCNT: 0x%x\n", val); + dev_dbg(priv->dev, "LINEINITCNT: %u\n", val); tc358768_write(priv, TC358768_LINEINITCNT, val); =20 /* LPTimeCnt > 50ns */ val =3D tc358768_ns_to_cnt(50, dsibclk_nsk) - 1; lptxcnt =3D val; - dev_dbg(priv->dev, "LPTXTIMECNT: 0x%x\n", val); + dev_dbg(priv->dev, "LPTXTIMECNT: %u\n", val); tc358768_write(priv, TC358768_LPTXTIMECNT, val); =20 /* 38ns < TCLK_PREPARE < 95ns */ val =3D tc358768_ns_to_cnt(65, dsibclk_nsk) - 1; + dev_dbg(priv->dev, "TCLK_PREPARECNT %u\n", val); /* TCLK_PREPARE + TCLK_ZERO > 300ns */ val2 =3D tc358768_ns_to_cnt(300 - tc358768_to_ns(2 * ui_nsk), dsibclk_nsk) - 2; + dev_dbg(priv->dev, "TCLK_ZEROCNT %u\n", val2); val |=3D val2 << 8; - dev_dbg(priv->dev, "TCLK_HEADERCNT: 0x%x\n", val); tc358768_write(priv, TC358768_TCLK_HEADERCNT, val); =20 /* TCLK_TRAIL > 60ns AND TEOT <=3D 105 ns + 12*UI */ raw_val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), dsibclk_n= sk) - 5; val =3D clamp(raw_val, 0, 127); - dev_dbg(priv->dev, "TCLK_TRAILCNT: 0x%x\n", val); + dev_dbg(priv->dev, "TCLK_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_TRAILCNT, val); =20 /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */ val =3D 50 + tc358768_to_ns(4 * ui_nsk); val =3D tc358768_ns_to_cnt(val, dsibclk_nsk) - 1; + dev_dbg(priv->dev, "THS_PREPARECNT %u\n", val); /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */ raw_val =3D tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), dsibclk_= nsk) - 10; val2 =3D clamp(raw_val, 0, 127); + dev_dbg(priv->dev, "THS_ZEROCNT %u\n", val2); val |=3D val2 << 8; - dev_dbg(priv->dev, "THS_HEADERCNT: 0x%x\n", val); tc358768_write(priv, TC358768_THS_HEADERCNT, val); =20 /* TWAKEUP > 1ms in lptxcnt steps */ val =3D tc358768_ns_to_cnt(1020000, dsibclk_nsk); val =3D val / (lptxcnt + 1) - 1; - dev_dbg(priv->dev, "TWAKEUP: 0x%x\n", val); + dev_dbg(priv->dev, "TWAKEUP: %u\n", val); tc358768_write(priv, TC358768_TWAKEUP, val); =20 /* TCLK_POSTCNT > 60ns + 52*UI */ val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(52 * ui_nsk), dsibclk_nsk) - 3; - dev_dbg(priv->dev, "TCLK_POSTCNT: 0x%x\n", val); + dev_dbg(priv->dev, "TCLK_POSTCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_POSTCNT, val); =20 /* max(60ns + 4*UI, 8*UI) < THS_TRAILCNT < 105ns + 12*UI */ raw_val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(18 * ui_nsk), dsibclk_nsk) - 4; val =3D clamp(raw_val, 0, 15); - dev_dbg(priv->dev, "THS_TRAILCNT: 0x%x\n", val); + dev_dbg(priv->dev, "THS_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_THS_TRAILCNT, val); =20 val =3D BIT(0); @@ -803,10 +805,11 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */ val =3D tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk * 4); val =3D tc358768_ns_to_cnt(val, dsibclk_nsk) / 4 - 1; + dev_dbg(priv->dev, "TXTAGOCNT: %u\n", val); val2 =3D tc358768_ns_to_cnt(tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk), dsibclk_nsk) - 2; + dev_dbg(priv->dev, "RXTASURECNT: %u\n", val2); val =3D val << 16 | val2; - dev_dbg(priv->dev, "BTACNTRL1: 0x%x\n", val); tc358768_write(priv, TC358768_BTACNTRL1, val); =20 /* START[0] */ --=20 2.34.1