From nobody Fri Dec 19 21:13:47 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 73D65C83F35 for ; Thu, 31 Aug 2023 17:46:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346950AbjHaRqO (ORCPT ); Thu, 31 Aug 2023 13:46:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346586AbjHaRqN (ORCPT ); Thu, 31 Aug 2023 13:46:13 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AD60510DD for ; Thu, 31 Aug 2023 10:46:05 -0700 (PDT) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-58fbfcb8d90so14711617b3.1 for ; Thu, 31 Aug 2023 10:46:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1693503965; x=1694108765; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=o+w3KBHikFTGwIimaQYuBypMhrw19N7uERmLhmvMz58=; b=dH6aTw0EwoDFhyUD+8hisSUQiBZBgeXEFgJiTXnqe1/H4xq5oDDOq6ocIbNx4HSRe/ ICK6l5HmYmdUY73z52rp8qGGXtEJEiCam+lTTFmmcAOzkgbosBSAPs0nhfAq8A12R+5a uImhjUkTm2zmczOXo40Lj7iKPkN1lyNe4dtnd2/BUkkr4FdXR4dOhEtY82ylEe8FeXnU 6ho0AWEQKlWa67Z+or1tdcEKhD5qjtZ6qCYvEeu2grDW+V7ub29chtuHonUUKfr3CeO3 ZGb/m4Tit532B8s0mLMJ9kNtzIY5g48b3Z9aNhPE/0yQqNIqGpN0Sr6EbzLELjZhxDxt UJNQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1693503965; x=1694108765; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=o+w3KBHikFTGwIimaQYuBypMhrw19N7uERmLhmvMz58=; b=NxCsne/NunltMFYaZ78xmBuyChjnZlDzk5ijzW1S6pNdSFYNK4sjhPob21NV05eyEg cMUdHndWaJeXpksaPGjkbR4GG5MjxX424X3BCmXPYz1BUH00q4HYIT7+JkGVPgz6c5Uh SPozBpAOXUkkYh9HvpH23xCukfw2ITpuTdTnNpDEosuZOY6qX2YAPyf+frzGBzb2qU5H zfdETLxo2Y5rvL4pGSuPb8fORxxJ3dYXURdNSwIO1I08XFaTdan1AtucypW9B7Hl3aQO DilDO5cEgzmIr5wEi6QPfkEbEN+d+yhan2J0YfwHDoMRj0UGkzTAKoG2hL5Jy50mnXcX rYmA== X-Gm-Message-State: AOJu0YyIb3nI5aGSRzMvdQDZpn/zTLinxCvVGdgJcy6F430dbp88Lpi7 73IXvbViGnvdzGaimBtneC9k013Hbq2P X-Google-Smtp-Source: AGHT+IFAWVZV2caLtc+pnQCsFawM0vj56icg1pDwBPCBAR0uE5NsLxwemjROnxuZAPffh9wiN1C0yPtzEIKV X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:1a0a:7338:4a5a:5f83]) (user=mshavit job=sendgmr) by 2002:a81:b61f:0:b0:56f:f62b:7a11 with SMTP id u31-20020a81b61f000000b0056ff62b7a11mr2293ywh.8.1693503964944; Thu, 31 Aug 2023 10:46:04 -0700 (PDT) Date: Fri, 1 Sep 2023 01:44:33 +0800 In-Reply-To: <20230831174536.103472-1-mshavit@google.com> Mime-Version: 1.0 References: <20230831174536.103472-1-mshavit@google.com> X-Mailer: git-send-email 2.42.0.283.g2d96d420d3-goog Message-ID: <20230901014413.v7.4.I5aa89c849228794a64146cfe86df21fb71629384@changeid> Subject: [PATCH v7 4/9] iommu/arm-smmu-v3: move stall_enabled to the cd table From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, robin.murphy@arm.com, jean-philippe@linaro.org, jgg@nvidia.com, nicolinc@nvidia.com, Michael Shavit , Jason Gunthorpe , Joerg Roedel , Kevin Tian , "Kirill A. Shutemov" , Lu Baolu , Mark Brown , Yicong Yang Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" A domain can be attached to multiple masters with different master->stall_enabled values. The stall bit of a CD entry should follow master->stall_enabled and has an inverse relationship with the STE.S1STALLD bit. The stall_enabled bit does not depend on any property of the domain, so move it out of the arm_smmu_domain struct. Move it to the CD table struct so that it can fully describe how CD entries should be written to it. Reviewed-by: Jason Gunthorpe Reviewed-by: Nicolin Chen Signed-off-by: Michael Shavit --- (no changes since v5) Changes in v5: - Reword commit Changes in v2: - Use a bitfield instead of a bool for stall_enabled drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 ++++---- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 3 ++- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 5bb13fadb41ad..44df7c0926802 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1114,7 +1114,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *s= mmu_domain, int ssid, FIELD_PREP(CTXDESC_CD_0_ASID, cd->asid) | CTXDESC_CD_0_V; =20 - if (smmu_domain->stall_enabled) + if (smmu_domain->cd_table.stall_enabled) val |=3D CTXDESC_CD_0_S; } =20 @@ -1141,6 +1141,7 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_d= omain *smmu_domain, struct arm_smmu_device *smmu =3D smmu_domain->smmu; struct arm_smmu_ctx_desc_cfg *cdcfg =3D &smmu_domain->cd_table; =20 + cdcfg->stall_enabled =3D master->stall_enabled; cdcfg->s1cdmax =3D master->ssid_bits; max_contexts =3D 1 << cdcfg->s1cdmax; =20 @@ -2119,8 +2120,6 @@ static int arm_smmu_domain_finalise_s1(struct arm_smm= u_domain *smmu_domain, if (ret) goto out_unlock; =20 - smmu_domain->stall_enabled =3D master->stall_enabled; - ret =3D arm_smmu_alloc_cd_tables(smmu_domain, master); if (ret) goto out_free_asid; @@ -2459,7 +2458,8 @@ static int arm_smmu_attach_dev(struct iommu_domain *d= omain, struct device *dev) ret =3D -EINVAL; goto out_unlock; } else if (smmu_domain->stage =3D=3D ARM_SMMU_DOMAIN_S1 && - smmu_domain->stall_enabled !=3D master->stall_enabled) { + smmu_domain->cd_table.stall_enabled !=3D + master->stall_enabled) { ret =3D -EINVAL; goto out_unlock; } diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index 5f0e7468db5f3..007758df57610 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -598,6 +598,8 @@ struct arm_smmu_ctx_desc_cfg { u8 s1fmt; /* log2 of the maximum number of CDs supported by this table */ u8 s1cdmax; + /* Whether CD entries in this table have the stall bit set. */ + u8 stall_enabled:1; }; =20 struct arm_smmu_s2_cfg { @@ -715,7 +717,6 @@ struct arm_smmu_domain { struct mutex init_mutex; /* Protects smmu pointer */ =20 struct io_pgtable_ops *pgtbl_ops; - bool stall_enabled; atomic_t nr_ats_masters; =20 enum arm_smmu_domain_stage stage; --=20 2.42.0.283.g2d96d420d3-goog