From nobody Thu Dec 18 00:46:06 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BFDCC83F19 for ; Tue, 29 Aug 2023 22:02:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238895AbjH2WBx (ORCPT ); Tue, 29 Aug 2023 18:01:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238637AbjH2WBb (ORCPT ); Tue, 29 Aug 2023 18:01:31 -0400 Received: from mail.mutex.one (mail.mutex.one [62.77.152.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A17019A for ; Tue, 29 Aug 2023 15:01:28 -0700 (PDT) Received: from localhost (localhost.localdomain [127.0.0.1]) by mail.mutex.one (Postfix) with ESMTP id 2155016C0048; Wed, 30 Aug 2023 01:01:27 +0300 (EEST) X-Virus-Scanned: Debian amavisd-new at mail.mutex.one Received: from mail.mutex.one ([127.0.0.1]) by localhost (mail.mutex.one [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Nbl6XnZaHL6p; Wed, 30 Aug 2023 01:01:25 +0300 (EEST) From: Marian Postevca DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=mutex.one; s=default; t=1693346485; bh=SprIKnjxd+XbEfV+ec+7dXXthO9g9LD+yn4zC/aX/LY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GkqSsDP1U4E46wv7YhtutIxrTZxLoza5ePPRHLpcvq6X4374KOvMMeGuYcHwvQnZl NrCHGd+Xg3T8gFY69eNqQ1ZoUF171ZVjyZ5+x3IyrUV3eKLL1d+upjKWAGxXXBJDcb 4HNOfMEhGZ2ZXMJx8QqPyVluWZjYTTDA0A3NyqHM= To: Liam Girdwood , Takashi Iwai , Mark Brown , Jaroslav Kysela Cc: linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org, Marian Postevca Subject: [PATCH v3 3/5] ASoC: es8316: Enable support for MCLK div by 2 Date: Wed, 30 Aug 2023 01:01:14 +0300 Message-ID: <20230829220116.1159-4-posteuca@mutex.one> In-Reply-To: <20230829220116.1159-1-posteuca@mutex.one> References: <20230829220116.1159-1-posteuca@mutex.one> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" To properly support a line of Huawei laptops with an AMD CPU and an ES8336 codec connected to the ACP3X module, we need to enable the codec option to divide the MCLK by 2. This is needed because for at least one SKU that has a 48Mhz MCLK the sound is distorted unless the MCLK div by 2 option is enabled. The option to divide the MCLK will first be tried. If no suitable clocking can be generated from this frequency, then the normal non-halved MCLK frequency will be tried. Signed-off-by: Marian Postevca --- sound/soc/codecs/es8316.c | 45 +++++++++++++++++++++++++++++---------- sound/soc/codecs/es8316.h | 3 +++ 2 files changed, 37 insertions(+), 11 deletions(-) diff --git a/sound/soc/codecs/es8316.c b/sound/soc/codecs/es8316.c index a1c3e10c3cf1..e53b2856d625 100644 --- a/sound/soc/codecs/es8316.c +++ b/sound/soc/codecs/es8316.c @@ -469,19 +469,42 @@ static int es8316_pcm_hw_params(struct snd_pcm_substr= eam *substream, u8 bclk_divider; u16 lrck_divider; int i; + unsigned int clk =3D es8316->sysclk / 2; + bool clk_valid =3D false; + + /* We will start with halved sysclk and see if we can use it + * for proper clocking. This is to minimise the risk of running + * the CODEC with a too high frequency. We have an SKU where + * the sysclk frequency is 48Mhz and this causes the sound to be + * sped up. If we can run with a halved sysclk, we will use it, + * if we can't use it, then full sysclk will be used. + */ + do { + /* Validate supported sample rates that are autodetected from MCLK */ + for (i =3D 0; i < ARRAY_SIZE(supported_mclk_lrck_ratios); i++) { + const unsigned int ratio =3D supported_mclk_lrck_ratios[i]; + + if (clk % ratio !=3D 0) + continue; + if (clk / ratio =3D=3D params_rate(params)) + break; + } + if (i =3D=3D ARRAY_SIZE(supported_mclk_lrck_ratios)) { + if (clk =3D=3D es8316->sysclk) + return -EINVAL; + clk =3D es8316->sysclk; + } else { + clk_valid =3D true; + } + } while (!clk_valid); =20 - /* Validate supported sample rates that are autodetected from MCLK */ - for (i =3D 0; i < ARRAY_SIZE(supported_mclk_lrck_ratios); i++) { - const unsigned int ratio =3D supported_mclk_lrck_ratios[i]; - - if (es8316->sysclk % ratio !=3D 0) - continue; - if (es8316->sysclk / ratio =3D=3D params_rate(params)) - break; + if (clk !=3D es8316->sysclk) { + snd_soc_component_update_bits(component, ES8316_CLKMGR_CLKSW, + ES8316_CLKMGR_CLKSW_MCLK_DIV, + ES8316_CLKMGR_CLKSW_MCLK_DIV); } - if (i =3D=3D ARRAY_SIZE(supported_mclk_lrck_ratios)) - return -EINVAL; - lrck_divider =3D es8316->sysclk / params_rate(params); + + lrck_divider =3D clk / params_rate(params); bclk_divider =3D lrck_divider / 4; switch (params_format(params)) { case SNDRV_PCM_FORMAT_S16_LE: diff --git a/sound/soc/codecs/es8316.h b/sound/soc/codecs/es8316.h index c335138e2837..0ff16f948690 100644 --- a/sound/soc/codecs/es8316.h +++ b/sound/soc/codecs/es8316.h @@ -129,4 +129,7 @@ #define ES8316_GPIO_FLAG_GM_NOT_SHORTED 0x02 #define ES8316_GPIO_FLAG_HP_NOT_INSERTED 0x04 =20 +/* ES8316_CLKMGR_CLKSW */ +#define ES8316_CLKMGR_CLKSW_MCLK_DIV 0x80 + #endif --=20 2.41.0