From nobody Tue Dec 16 23:59:23 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5450C7EE2C for ; Thu, 24 Aug 2023 18:33:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243050AbjHXScj (ORCPT ); Thu, 24 Aug 2023 14:32:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45618 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243106AbjHXSca (ORCPT ); Thu, 24 Aug 2023 14:32:30 -0400 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE7E51BEF for ; Thu, 24 Aug 2023 11:32:21 -0700 (PDT) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-583312344e7so2317597b3.1 for ; Thu, 24 Aug 2023 11:32:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1692901941; x=1693506741; h=to:from:subject:mime-version:message-id:date:from:to:cc:subject :date:message-id:reply-to; bh=MNeeSRjShfUBxK20UmYelF8xLtXN72q85W2K9O6AewU=; b=6eeGKylvsVaRxqcWbxgaNrUL6kMoeIfCaARcdvzuxV1Qk1Nn5wH02JO8+6/0T4pV1I WZmUizQ6I7z2UHZ1tEsl8/bmQ/3t26lY0YiMcdEUVv/YeXJ3T5rnY+ZSLgx30PsG0/o/ 7fH1Z85JmLBIX+EOYlLRcAzB2CkGJhzgMadtQVB/p5Mn2yZ3zVRST+Eq42Fbp8jRT2Zd XCGR9jx6OKM0EAIC0lPTeCjqT/M1FsSHOZaz/JFRbqlS3OkgzH4vWqw+QL1XXHBmKSkV uLv9sMAKA9GD09u63qp4hIjQOv4ZRu31x5nmzCaDkhRqYrJgE0USb0fFiXEWT0sj0nb6 0vEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692901941; x=1693506741; h=to:from:subject:mime-version:message-id:date:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=MNeeSRjShfUBxK20UmYelF8xLtXN72q85W2K9O6AewU=; b=gt3gb8VITDgQLdxekYTQkwDGt3fwAUIKZFOYiPECUmuCFHIcYLfKPbeikNDKL0mjkb yw1qEd21izxp7xnN8NzMZJ4z+lOAtSM4CddyMoTAF8Jq1/lA/fDkgFDlXdaadYwEI7TR 1LUl9krti91tPJ1vOXIRsmT3DeYCXQq7IyoHVSnK+bACa+RfyHP+p5AO1AkJ54qcHLOf srUE0cmOu9lfIQiOsEaI19eWLND5I3C40RrBE2J4rCMuV48/VSfH2EExXDO9lCRlBqNy hpJnP1pC+A+k7jETcQS7uSDYtg6wWVuOchN2FXb2M6xpZ6puir6DcpnOt3M7wSrUUt1U b94A== X-Gm-Message-State: AOJu0YySfNiSOg4NdvjYBNlngXCCE8n5gtr45aX6cbZPZyO0jiXiRQJG TKUpq0HxS6bxtfVKQhU7weNnBju/i9qL X-Google-Smtp-Source: AGHT+IEHDSXwTvSkKB3beLc6wwOSaR1G9iaM3BAUwl25BtxYOXui5MNMrOMvZkCSI2+nprUfgTJaaCdXNoGt X-Received: from irogers.svl.corp.google.com ([2620:15c:2a3:200:fbb9:d9e7:7405:2651]) (user=irogers job=sendgmr) by 2002:a25:bc8a:0:b0:d78:2f4c:7df with SMTP id e10-20020a25bc8a000000b00d782f4c07dfmr315ybk.12.1692901941141; Thu, 24 Aug 2023 11:32:21 -0700 (PDT) Date: Thu, 24 Aug 2023 11:32:12 -0700 Message-Id: <20230824183212.374787-1-irogers@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.42.0.rc2.253.gd59a3bf2b4-goog Subject: [PATCH v3] perf jevents: Don't append Unit to desc From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Adrian Hunter , James Clark , Kan Liang , John Garry , Kajol Jain , Jing Zhang , Ravi Bangoria , Rob Herring , Gaosheng Cui , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Unit with the PMU name is appended to desc in jevents.py, but on hybrid platforms it causes the desc to differ from the regular non-hybrid system with a PMU of 'cpu'. Having differing descs means the events don't deduplicate. To make the perf list output not differ, append the Unit on again in the perf list printing code. On x86 reduces the binary size by 409,600 bytes or about 4%. Update pmu-events test expectations to match the differently generated pmu-events.c code. Signed-off-by: Ian Rogers --- tools/perf/builtin-list.c | 13 ++++++++++++- tools/perf/pmu-events/jevents.py | 7 ------- tools/perf/tests/pmu-events.c | 22 +++++++++++----------- 3 files changed, 23 insertions(+), 19 deletions(-) diff --git a/tools/perf/builtin-list.c b/tools/perf/builtin-list.c index 7fec2cca759f..d8b9f606e734 100644 --- a/tools/perf/builtin-list.c +++ b/tools/perf/builtin-list.c @@ -145,9 +145,20 @@ static void default_print_event(void *ps, const char *= pmu_name, const char *topi putchar('\n'); =20 if (desc && print_state->desc) { + char *desc_with_unit =3D NULL; + int desc_len =3D -1; + + if (pmu_name && strcmp(pmu_name, "cpu")) { + desc_len =3D strlen(desc); + desc_len =3D asprintf(&desc_with_unit, + desc[desc_len - 1] !=3D '.' + ? "%s. Unit: %s" : "%s Unit: %s", + desc, pmu_name); + } printf("%*s", 8, "["); - wordwrap(desc, 8, pager_get_columns(), 0); + wordwrap(desc_len > 0 ? desc_with_unit : desc, 8, pager_get_columns(), 0= ); printf("]\n"); + free(desc_with_unit); } long_desc =3D long_desc ?: desc; if (long_desc && print_state->long_desc) { diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jeven= ts.py index e5bce57f5688..712f80d7d071 100755 --- a/tools/perf/pmu-events/jevents.py +++ b/tools/perf/pmu-events/jevents.py @@ -357,13 +357,6 @@ class JsonEvent: self.desc +=3D extra_desc if self.long_desc and extra_desc: self.long_desc +=3D extra_desc - if self.pmu and self.pmu !=3D 'cpu': - if not self.desc: - self.desc =3D 'Unit: ' + self.pmu - else: - if not self.desc.endswith('. '): - self.desc +=3D '. ' - self.desc +=3D 'Unit: ' + self.pmu if arch_std: if arch_std.lower() in _arch_std_events: event =3D _arch_std_events[arch_std.lower()].event diff --git a/tools/perf/tests/pmu-events.c b/tools/perf/tests/pmu-events.c index 3dc1ebee4d9f..28c8789c4305 100644 --- a/tools/perf/tests/pmu-events.c +++ b/tools/perf/tests/pmu-events.c @@ -129,7 +129,7 @@ static const struct perf_pmu_test_event uncore_hisi_ddr= c_flux_wcmd =3D { .event =3D { .name =3D "uncore_hisi_ddrc.flux_wcmd", .event =3D "event=3D0x2", - .desc =3D "DDRC write commands. Unit: hisi_sccl,ddrc", + .desc =3D "DDRC write commands", .topic =3D "uncore", .long_desc =3D "DDRC write commands", .pmu =3D "hisi_sccl,ddrc", @@ -143,7 +143,7 @@ static const struct perf_pmu_test_event unc_cbo_xsnp_re= sponse_miss_eviction =3D { .event =3D { .name =3D "unc_cbo_xsnp_response.miss_eviction", .event =3D "event=3D0x22,umask=3D0x81", - .desc =3D "A cross-core snoop resulted from L3 Eviction which misses in = some processor core. Unit: uncore_cbox", + .desc =3D "A cross-core snoop resulted from L3 Eviction which misses in = some processor core", .topic =3D "uncore", .long_desc =3D "A cross-core snoop resulted from L3 Eviction which misse= s in some processor core", .pmu =3D "uncore_cbox", @@ -157,7 +157,7 @@ static const struct perf_pmu_test_event uncore_hyphen = =3D { .event =3D { .name =3D "event-hyphen", .event =3D "event=3D0xe0,umask=3D0x00", - .desc =3D "UNC_CBO_HYPHEN. Unit: uncore_cbox", + .desc =3D "UNC_CBO_HYPHEN", .topic =3D "uncore", .long_desc =3D "UNC_CBO_HYPHEN", .pmu =3D "uncore_cbox", @@ -171,7 +171,7 @@ static const struct perf_pmu_test_event uncore_two_hyph= =3D { .event =3D { .name =3D "event-two-hyph", .event =3D "event=3D0xc0,umask=3D0x00", - .desc =3D "UNC_CBO_TWO_HYPH. Unit: uncore_cbox", + .desc =3D "UNC_CBO_TWO_HYPH", .topic =3D "uncore", .long_desc =3D "UNC_CBO_TWO_HYPH", .pmu =3D "uncore_cbox", @@ -185,7 +185,7 @@ static const struct perf_pmu_test_event uncore_hisi_l3c= _rd_hit_cpipe =3D { .event =3D { .name =3D "uncore_hisi_l3c.rd_hit_cpipe", .event =3D "event=3D0x7", - .desc =3D "Total read hits. Unit: hisi_sccl,l3c", + .desc =3D "Total read hits", .topic =3D "uncore", .long_desc =3D "Total read hits", .pmu =3D "hisi_sccl,l3c", @@ -199,7 +199,7 @@ static const struct perf_pmu_test_event uncore_imc_free= _running_cache_miss =3D { .event =3D { .name =3D "uncore_imc_free_running.cache_miss", .event =3D "event=3D0x12", - .desc =3D "Total cache misses. Unit: uncore_imc_free_running", + .desc =3D "Total cache misses", .topic =3D "uncore", .long_desc =3D "Total cache misses", .pmu =3D "uncore_imc_free_running", @@ -213,7 +213,7 @@ static const struct perf_pmu_test_event uncore_imc_cach= e_hits =3D { .event =3D { .name =3D "uncore_imc.cache_hits", .event =3D "event=3D0x34", - .desc =3D "Total cache hits. Unit: uncore_imc", + .desc =3D "Total cache hits", .topic =3D "uncore", .long_desc =3D "Total cache hits", .pmu =3D "uncore_imc", @@ -238,13 +238,13 @@ static const struct perf_pmu_test_event sys_ddr_pmu_w= rite_cycles =3D { .event =3D { .name =3D "sys_ddr_pmu.write_cycles", .event =3D "event=3D0x2b", - .desc =3D "ddr write-cycles event. Unit: uncore_sys_ddr_pmu", + .desc =3D "ddr write-cycles event", .topic =3D "uncore", .pmu =3D "uncore_sys_ddr_pmu", .compat =3D "v8", }, .alias_str =3D "event=3D0x2b", - .alias_long_desc =3D "ddr write-cycles event. Unit: uncore_sys_ddr_pmu", + .alias_long_desc =3D "ddr write-cycles event", .matching_pmu =3D "uncore_sys_ddr_pmu", }; =20 @@ -252,13 +252,13 @@ static const struct perf_pmu_test_event sys_ccn_pmu_r= ead_cycles =3D { .event =3D { .name =3D "sys_ccn_pmu.read_cycles", .event =3D "config=3D0x2c", - .desc =3D "ccn read-cycles event. Unit: uncore_sys_ccn_pmu", + .desc =3D "ccn read-cycles event", .topic =3D "uncore", .pmu =3D "uncore_sys_ccn_pmu", .compat =3D "0x01", }, .alias_str =3D "config=3D0x2c", - .alias_long_desc =3D "ccn read-cycles event. Unit: uncore_sys_ccn_pmu", + .alias_long_desc =3D "ccn read-cycles event", .matching_pmu =3D "uncore_sys_ccn_pmu", }; =20 --=20 2.42.0.rc2.253.gd59a3bf2b4-goog