From nobody Wed Dec 17 07:29:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3293EE49B0 for ; Wed, 23 Aug 2023 12:11:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234974AbjHWMLT (ORCPT ); Wed, 23 Aug 2023 08:11:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232698AbjHWMLR (ORCPT ); Wed, 23 Aug 2023 08:11:17 -0400 Received: from mx1.tq-group.com (mx1.tq-group.com [93.104.207.81]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AD2C910CB; Wed, 23 Aug 2023 05:10:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1692792655; x=1724328655; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PwS5x9i+1a1arR3vprvYo3KfqgawHkStsyHE/GC9FUk=; b=ik95yLS+fa4pUuwMpO+UPU7JiwYGBMN2jIOL9A/qWKexT5VUb7G+bh58 Vge1X0Xm/PeBPp9dWWK/8I12XZJCnDfFIJ+McpMgPluPlQVrQvr9wrsgm zMItBPvdCdXMs3/g1zB5PYaogKBcS3G2SAhOIVNcCMwBytclF/1+TCYtJ ox35WxqxdN241ZP0wP9XIm6dKaqL8bCqadILNBnHfvBVNJYuaIZQpoFSa WI+9o074n8sNjNG3uVsb4ffYUEjXE+1CazVvbmrT1hugiDalU7QfibxBD SIm+/P4+mdngcK9KrwxD9f72CtUGs0ClPtMzak8nEZZY1kTBSmoMgr/oE Q==; X-IronPort-AV: E=Sophos;i="6.01,195,1684792800"; d="scan'208";a="32586564" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 23 Aug 2023 14:10:01 +0200 Received: from herburgerg-w2.tq-net.de (herburgerg-w2.tq-net.de [10.122.52.145]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 7A40E280086; Wed, 23 Aug 2023 14:10:01 +0200 (CEST) From: Gregor Herburger To: Shawn Guo , Li Yang , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux@ew.tq-group.com Subject: [PATCH 3/6] arm64: dts: freescale: add initial device tree for TQMLS1043A/TQMLS1046A Date: Wed, 23 Aug 2023 14:09:49 +0200 Message-Id: <20230823120952.317740-4-gregor.herburger@ew.tq-group.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230823120952.317740-1-gregor.herburger@ew.tq-group.com> References: <20230823120952.317740-1-gregor.herburger@ew.tq-group.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This adds support for the TQMLS1043A and TQMLS1046A SOM and the MBLS10xxA baseboard. TQMLS1043A and TQMLS1046A share a common layout and can be used on the MBLS10xxA. Signed-off-by: Gregor Herburger --- arch/arm64/boot/dts/freescale/Makefile | 2 + .../fsl-ls1043a-tqmls1043a-mbls10xxa.dts | 49 +++++++ .../dts/freescale/fsl-ls1043a-tqmls1043a.dtsi | 32 +++++ .../fsl-ls1046a-tqmls1046a-mbls10xxa.dts | 56 ++++++++ .../dts/freescale/fsl-ls1046a-tqmls1046a.dtsi | 42 ++++++ .../freescale/tqmls104xa-mbls10xxa-fman.dtsi | 104 ++++++++++++++ .../dts/freescale/tqmls10xxa-mbls10xxa.dtsi | 136 ++++++++++++++++++ arch/arm64/boot/dts/freescale/tqmls10xxa.dtsi | 59 ++++++++ 8 files changed, 480 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a-mb= ls10xxa.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a.dt= si create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a-mb= ls10xxa.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a.dt= si create mode 100644 arch/arm64/boot/dts/freescale/tqmls104xa-mbls10xxa-fman= .dtsi create mode 100644 arch/arm64/boot/dts/freescale/tqmls10xxa-mbls10xxa.dtsi create mode 100644 arch/arm64/boot/dts/freescale/tqmls10xxa.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index c6872b7e9471..8bb67d1e8f4d 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -15,9 +15,11 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-ls1028a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-ls1028a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-ls1043a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-ls1043a-rdb.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-ls1043a-tqmls1043a-mbls10xxa.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-ls1046a-frwy.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-ls1046a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-ls1046a-rdb.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-ls1046a-tqmls1046a-mbls10xxa.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-ls1088a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-ls1088a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) +=3D fsl-ls1088a-ten64.dtb diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a-mbls10xxa= .dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a-mbls10xxa.dts new file mode 100644 index 000000000000..599101d06f74 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a-mbls10xxa.dts @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (c) 2018-2023 TQ-Systems GmbH , + * D-82229 Seefeld, Germany. + * Author: Gregor Herburger, Timo Herbrecher + * + */ + +/dts-v1/; + +#include + +#include "fsl-ls1043a-tqmls1043a.dtsi" +#include "tqmls10xxa-mbls10xxa.dtsi" + +/ { + model =3D "TQ-Systems GmbH LS1043A TQMLS1043A SoM on MBLS10xxA board"; + compatible =3D "tq,ls1043a-tqmls1043a-mbls10xxa", "tq,ls1043a-tqmls1043a", + "fsl,ls1043a"; + + aliases { + serial0 =3D &duart0; + serial1 =3D &duart1; + qsgmii-s1-p1 =3D &qsgmii1_phy1; + qsgmii-s1-p2 =3D &qsgmii1_phy2; + qsgmii-s1-p3 =3D &qsgmii1_phy3; + qsgmii-s1-p4 =3D &qsgmii1_phy4; + qsgmii-s2-p1 =3D &qsgmii2_phy1; + qsgmii-s2-p2 =3D &qsgmii2_phy2; + qsgmii-s2-p3 =3D &qsgmii2_phy3; + qsgmii-s2-p4 =3D &qsgmii2_phy4; + }; + + chosen { + stdout-path =3D &duart1; + }; +}; + +&esdhc { + cd-gpios =3D <&gpio3 2 GPIO_ACTIVE_LOW>; + wp-gpios =3D <&gpio3 3 GPIO_ACTIVE_HIGH>; +}; + +&usb2 { + status =3D "okay"; +}; + +#include "fsl-ls1043-post.dtsi" +#include "tqmls104xa-mbls10xxa-fman.dtsi" diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a.dtsi b/ar= ch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a.dtsi new file mode 100644 index 000000000000..12d5f3938e5d --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-tqmls1043a.dtsi @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (c) 2018-2023 TQ-Systems GmbH , + * D-82229 Seefeld, Germany. + * Author: Gregor Herburger, Timo Herbrecher + * + * Device Tree Include file for LS1043A based SoM of TQ + */ + +#include "fsl-ls1043a.dtsi" +#include "tqmls10xxa.dtsi" + +&qspi { + num-cs =3D <2>; + status =3D "okay"; + + qflash0: flash@0 { + compatible =3D "jedec,spi-nor"; + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + spi-max-frequency =3D <62500000>; + spi-rx-bus-width =3D <4>; + spi-tx-bus-width =3D <4>; + + partitions { + compatible =3D "fixed-partitions"; + #address-cells =3D <1>; + #size-cells =3D <1>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a-mbls10xxa= .dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a-mbls10xxa.dts new file mode 100644 index 000000000000..12e1460bd3da --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a-mbls10xxa.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (c) 2018-2023 TQ-Systems GmbH , + * D-82229 Seefeld, Germany. + * Author: Gregor Herburger, Timo Herbrecher + */ + +/dts-v1/; + +#include + +#include "fsl-ls1046a-tqmls1046a.dtsi" +#include "tqmls10xxa-mbls10xxa.dtsi" + +/ { + model =3D "TQ-Systems GmbH LS1046A TQMLS1046A SoM on MBLS10xxA board"; + compatible =3D "tq,ls1046a-tqmls1046a-mbls10xxa", "tq,ls1046a-tqmls1046a", + "fsl,ls1046a"; + + aliases { + serial0 =3D &duart0; + serial1 =3D &duart1; + qsgmii-s1-p1 =3D &qsgmii1_phy1; + qsgmii-s1-p2 =3D &qsgmii1_phy2; + qsgmii-s1-p3 =3D &qsgmii1_phy3; + qsgmii-s1-p4 =3D &qsgmii1_phy4; + qsgmii-s2-p1 =3D &qsgmii2_phy1; + qsgmii-s2-p2 =3D &qsgmii2_phy2; + qsgmii-s2-p3 =3D &qsgmii2_phy3; + qsgmii-s2-p4 =3D &qsgmii2_phy4; + }; + + chosen { + stdout-path =3D &duart1; + }; +}; + +&dspi { + status =3D "okay"; +}; + +&esdhc { + cd-gpios =3D <&gpio3 2 GPIO_ACTIVE_LOW>; + wp-gpios =3D <&gpio3 3 GPIO_ACTIVE_HIGH>; +}; + +&usb2 { + status =3D "okay"; +}; + +#include "fsl-ls1046-post.dtsi" +#include "tqmls104xa-mbls10xxa-fman.dtsi" + +&enet7 { + status =3D "disabled"; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a.dtsi b/ar= ch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a.dtsi new file mode 100644 index 000000000000..4a8f8bc688f5 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a.dtsi @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (c) 2018-2023 TQ-Systems GmbH , + * D-82229 Seefeld, Germany. + * Author: Gregor Herburger, Timo Herbrecher + * + * Device Tree Include file for LS1046A based SoM of TQ + */ + +#include "fsl-ls1046a.dtsi" +#include "tqmls10xxa.dtsi" + +&qspi { + num-cs =3D <2>; + status =3D "okay"; + + qflash0: flash@0 { + compatible =3D "jedec,spi-nor"; + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <1>; + spi-max-frequency =3D <62500000>; + spi-rx-bus-width =3D <4>; + spi-tx-bus-width =3D <4>; + + partitions { + compatible =3D "fixed-partitions"; + #address-cells =3D <1>; + #size-cells =3D <1>; + }; + }; + + qflash1: flash@1 { + compatible =3D "jedec,spi-nor"; + reg =3D <1>; + #address-cells =3D <1>; + #size-cells =3D <1>; + spi-max-frequency =3D <62500000>; + spi-rx-bus-width =3D <4>; + spi-tx-bus-width =3D <4>; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/tqmls104xa-mbls10xxa-fman.dtsi b= /arch/arm64/boot/dts/freescale/tqmls104xa-mbls10xxa-fman.dtsi new file mode 100644 index 000000000000..4c38dd541143 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/tqmls104xa-mbls10xxa-fman.dtsi @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (c) 2019,2023 TQ-Systems GmbH , + * D-82229 Seefeld, Germany. + * Author: Gregor Herburger, Timo Herbrecher + * + * Device Tree Include file for MBLS10xxA from TQ (FMAN related sections) + */ + +#include + +&enet0 { + status =3D "disabled"; +}; + +&enet1 { + status =3D "disabled"; +}; + +&enet2 { + phy-handle =3D <&rgmii_phy1>; + phy-connection-type =3D "rgmii"; + phy-mode =3D "rgmii-id"; + status =3D "okay"; +}; + +&enet3 { + phy-handle =3D <&rgmii_phy2>; + phy-connection-type =3D "rgmii"; + phy-mode =3D "rgmii-id"; + status =3D "okay"; +}; + +&enet4 { + status =3D "disabled"; +}; + +&enet5 { + status =3D "disabled"; +}; + +&enet6 { + status =3D "disabled"; +}; + +&mdio0 { + status =3D "okay"; + + qsgmii2_phy1: ethernet-phy@0 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x00>; + }; + + qsgmii2_phy2: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x01>; + }; + + qsgmii2_phy3: ethernet-phy@2 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x02>; + }; + + qsgmii2_phy4: ethernet-phy@3 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x03>; + }; + + rgmii_phy2: ethernet-phy@c { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x0c>; + ti,rx-internal-delay =3D ; + ti,tx-internal-delay =3D ; + ti,fifo-depth =3D ; + }; + + rgmii_phy1: ethernet-phy@e { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x0e>; + ti,rx-internal-delay =3D ; + ti,tx-internal-delay =3D ; + ti,fifo-depth =3D ; + }; + + qsgmii1_phy1: ethernet-phy@1c { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1c>; + }; + + qsgmii1_phy2: ethernet-phy@1d { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1d>; + }; + + qsgmii1_phy3: ethernet-phy@1e { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1e>; + }; + + qsgmii1_phy4: ethernet-phy@1f { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1f>; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/tqmls10xxa-mbls10xxa.dtsi b/arch= /arm64/boot/dts/freescale/tqmls10xxa-mbls10xxa.dtsi new file mode 100644 index 000000000000..f9bd529ee32f --- /dev/null +++ b/arch/arm64/boot/dts/freescale/tqmls10xxa-mbls10xxa.dtsi @@ -0,0 +1,136 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (c) 2018-2023 TQ-Systems GmbH , + * D-82229 Seefeld, Germany. + * Author: Gregor Herburger, Timo Herbrecher + * + * Device Tree Include file for MBLS10xxA from TQ + */ + +#include +#include +#include + +/ { + gpio-keys-polled { + compatible =3D "gpio-keys-polled"; + poll-interval =3D <100>; + autorepeat; + + button-0 { + label =3D "button0"; + gpios =3D <&gpioexp3 5 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + button-1 { + label =3D "button1"; + gpios =3D <&gpioexp3 6 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; + + leds { + compatible =3D "gpio-leds"; + + led-user { + gpios =3D <&gpioexp3 13 GPIO_ACTIVE_LOW>; + color =3D ; + function =3D LED_FUNCTION_HEARTBEAT; + linux,default-trigger =3D "heartbeat"; + }; + }; + + reg_3v3: regulator-3v3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "V_3V3_MB"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; +}; + +&duart0 { + status =3D "okay"; +}; + +&duart1 { + status =3D "okay"; +}; + +&esdhc { + status =3D "okay"; +}; + +&i2c3 { + status =3D "okay"; + + i2c-mux@70 { + compatible =3D "nxp,pca9544"; + reg =3D <0x70>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + i2c@0 { + reg =3D <0x0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + gpioexp1: pca9555@20 { + compatible =3D "nxp,pca9555"; + reg =3D <0x20>; + vcc-supply =3D <®_3v3>; + gpio-controller; + #gpio-cells =3D <2>; + }; + + gpioexp2: pca9555@21 { + compatible =3D "nxp,pca9555"; + reg =3D <0x21>; + vcc-supply =3D <®_3v3>; + gpio-controller; + #gpio-cells =3D <2>; + }; + + gpioexp3: pca9555@22 { + compatible =3D "nxp,pca9555"; + reg =3D <0x22>; + vcc-supply =3D <®_3v3>; + gpio-controller; + #gpio-cells =3D <2>; + }; + }; + + sfp1_i2c: i2c@1 { + reg =3D <0x1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; + + sfp2_i2c: i2c@2 { + reg =3D <0x2>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; + + i2c@3 { + reg =3D <0x3>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; +}; + +&sata { + status =3D "okay"; +}; + +&usb0 { + status =3D "okay"; +}; + +&usb1 { + dr_mode =3D "otg"; + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/tqmls10xxa.dtsi b/arch/arm64/boo= t/dts/freescale/tqmls10xxa.dtsi new file mode 100644 index 000000000000..fd838bc930bc --- /dev/null +++ b/arch/arm64/boot/dts/freescale/tqmls10xxa.dtsi @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (c) 2018-2023 TQ-Systems GmbH , + * D-82229 Seefeld, Germany. + * Author: Gregor Herburger, Timo Herbrecher + * + * Device Tree Include file for TQMLs10xxA SoM of TQ + */ + +/ { + reg_vcc3v3: regulator-vcc3v3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "VCC3V3"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + }; +}; + +&i2c0 { + status =3D "okay"; + + temperature-sensor@18 { + compatible =3D "nxp,se97b", "jedec,jc-42.4-temp"; + reg =3D <0x18>; + }; + + eeprom@50 { + compatible =3D "nxp,se97b", "atmel,24c02"; + reg =3D <0x50>; + pagesize =3D <16>; + vcc-supply =3D <®_vcc3v3>; + read-only; + }; + + rtc@51 { + compatible =3D "nxp,pcf85063a"; + reg =3D <0x51>; + }; + + eeprom@57 { + compatible =3D "atmel,24c64"; + reg =3D <0x57>; + pagesize =3D <32>; + vcc-supply =3D <®_vcc3v3>; + }; +}; + +&esdhc { + /* eSDHC or eMMC: set by bootloader */ + non-removable; + disable-wp; + mmc-hs200-1_8v; + sd-uhs-sdr104; + sd-uhs-sdr50; + sd-uhs-sdr25; + sd-uhs-sdr12; +}; + --=20 2.34.1