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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id q6-20020a170902a3c600b001bbd8cf6b57sm8199960plb.230.2023.08.21.22.47.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Aug 2023 22:47:45 -0700 (PDT) From: Nick Hu To: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, leyfoon.tan@starfivetech.com, mason.huo@starfivetech.com, conor.dooley@microchip.com, jeeheng.sia@starfivetech.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, nick.hu@sifive.com, zong.li@sifive.com Cc: Andy Chiu Subject: [PATCH v2] riscv: suspend: Add syscore ops for suspend Date: Tue, 22 Aug 2023 13:47:39 +0800 Message-Id: <20230822054739.33552-1-nick.hu@sifive.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" If a task is the one who performs the suspend flow and it also do some floating or vector operations before the suspend, we might lose the FPU and vector states when it goes to the non-retention system suspend state. Add syscore ops to save and restore the FPU and vector states of the current task to fix the issue above. Co-developed-by: Andy Chiu Signed-off-by: Andy Chiu Signed-off-by: Nick Hu --- Changes in v2: a) Add Co-developed-by and adjust the order of signed-off b) Rephrase the commit message arch/riscv/kernel/suspend.c | 45 +++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/riscv/kernel/suspend.c b/arch/riscv/kernel/suspend.c index 3c89b8ec69c4..ff69ff8a1974 100644 --- a/arch/riscv/kernel/suspend.c +++ b/arch/riscv/kernel/suspend.c @@ -4,9 +4,14 @@ * Copyright (c) 2022 Ventana Micro Systems Inc. */ =20 +#include #include +#include +#include #include #include +#include +#include =20 void suspend_save_csrs(struct suspend_context *context) { @@ -85,3 +90,43 @@ int cpu_suspend(unsigned long arg, =20 return rc; } + +static int riscv_cpu_suspend(void) +{ + struct task_struct *cur_task =3D get_current(); + struct pt_regs *regs =3D task_pt_regs(cur_task); + + if (has_fpu()) { + if (unlikely(regs->status & SR_SD)) + fstate_save(cur_task, regs); + } + if (has_vector()) { + if (unlikely(regs->status & SR_SD)) + riscv_v_vstate_save(cur_task, regs); + } + + return 0; +} + +static void riscv_cpu_resume(void) +{ + struct task_struct *cur_task =3D get_current(); + struct pt_regs *regs =3D task_pt_regs(cur_task); + + if (has_fpu()) + fstate_restore(cur_task, regs); + if (has_vector()) + riscv_v_vstate_restore(cur_task, regs); +} + +static struct syscore_ops riscv_cpu_syscore_ops =3D { + .suspend =3D riscv_cpu_suspend, + .resume =3D riscv_cpu_resume, +}; + +static int __init riscv_cpu_suspend_init(void) +{ + register_syscore_ops(&riscv_cpu_syscore_ops); + return 0; +} +arch_initcall(riscv_cpu_suspend_init); --=20 2.34.1