From nobody Thu Sep 11 12:48:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23153EE49AA for ; Mon, 21 Aug 2023 14:42:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236101AbjHUOmR convert rfc822-to-8bit (ORCPT ); Mon, 21 Aug 2023 10:42:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236060AbjHUOmM (ORCPT ); Mon, 21 Aug 2023 10:42:12 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7B0DA10B; Mon, 21 Aug 2023 07:41:58 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id DF0E924E2A8; Mon, 21 Aug 2023 22:41:56 +0800 (CST) Received: from EXMBX061.cuchost.com (172.16.6.61) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 21 Aug 2023 22:41:56 +0800 Received: from localhost.localdomain (113.72.145.205) by EXMBX061.cuchost.com (172.16.6.61) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 21 Aug 2023 22:41:55 +0800 From: Xingyu Wu To: Liam Girdwood , Mark Brown , Claudiu Beznea , Jaroslav Kysela , Takashi Iwai , Maxim Kochetkov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing CC: Jose Abreu , Paul Walmsley , Palmer Dabbelt , Albert Ou , Walker Chen , "Xingyu Wu" , , , , Subject: [PATCH v2 5/5] riscv: dts: starfive: Add the nodes and pins of I2Srx/I2Stx0/I2Stx1 Date: Mon, 21 Aug 2023 22:41:51 +0800 Message-ID: <20230821144151.207339-6-xingyu.wu@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230821144151.207339-1-xingyu.wu@starfivetech.com> References: <20230821144151.207339-1-xingyu.wu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [113.72.145.205] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX061.cuchost.com (172.16.6.61) X-YovoleRuleAgent: yovoleflag Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add I2Srx/I2Stx0/I2Stx1 nodes and pins configuration for the StarFive JH7110 SoC. Signed-off-by: Xingyu Wu Reviewed-by: Walker Chen --- .../jh7110-starfive-visionfive-2.dtsi | 58 +++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 65 +++++++++++++++++++ 2 files changed, 123 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi= b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index d79f94432b27..7179f1a31cf2 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -203,6 +203,24 @@ &i2c6 { status =3D "okay"; }; =20 +&i2srx { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2srx_pins>; + status =3D "okay"; +}; + +&i2stx0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mclk_ext_pins>; + status =3D "okay"; +}; + +&i2stx1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2stx1_pins>; + status =3D "okay"; +}; + &mmc0 { max-frequency =3D <100000000>; bus-width =3D <8>; @@ -337,6 +355,46 @@ GPOEN_SYS_I2C6_DATA, }; }; =20 + i2srx_pins: i2srx-0 { + clk-sd-pins { + pinmux =3D , + , + , + , + ; + input-enable; + }; + }; + + i2stx1_pins: i2stx1-0 { + sd-pins { + pinmux =3D ; + bias-disable; + input-disable; + }; + }; + + mclk_ext_pins: mclk-ext-0 { + mclk-ext-pins { + pinmux =3D ; + input-enable; + }; + }; + mmc0_pins: mmc0-0 { rst-pins { pinmux =3D ; + clocks =3D <&syscrg JH7110_SYSCLK_I2SRX_BCLK_MST>, + <&syscrg JH7110_SYSCLK_I2SRX_APB>, + <&syscrg JH7110_SYSCLK_MCLK>, + <&syscrg JH7110_SYSCLK_MCLK_INNER>, + <&mclk_ext>, + <&syscrg JH7110_SYSCLK_I2SRX_BCLK>, + <&syscrg JH7110_SYSCLK_I2SRX_LRCK>, + <&i2srx_bclk_ext>, + <&i2srx_lrck_ext>; + clock-names =3D "i2sclk", "apb", "mclk", + "mclk_inner", "mclk_ext", "bclk", + "lrck", "bclk_ext", "lrck_ext"; + resets =3D <&syscrg JH7110_SYSRST_I2SRX_APB>, + <&syscrg JH7110_SYSRST_I2SRX_BCLK>; + dmas =3D <0>, <&dma 24>; + dma-names =3D "tx", "rx"; + starfive,syscon =3D <&sys_syscon 0x18 0x2>; + #sound-dai-cells =3D <0>; + status =3D "disabled"; + }; + usb0: usb@10100000 { compatible =3D "starfive,jh7110-usb"; ranges =3D <0x0 0x0 0x10100000 0x100000>; @@ -736,6 +760,47 @@ spi6: spi@120a0000 { status =3D "disabled"; }; =20 + i2stx0: i2s@120b0000 { + compatible =3D "starfive,jh7110-i2stx0"; + reg =3D <0x0 0x120b0000 0x0 0x1000>; + clocks =3D <&syscrg JH7110_SYSCLK_I2STX0_BCLK_MST>, + <&syscrg JH7110_SYSCLK_I2STX0_APB>, + <&syscrg JH7110_SYSCLK_MCLK>, + <&syscrg JH7110_SYSCLK_MCLK_INNER>, + <&mclk_ext>; + clock-names =3D "i2sclk", "apb", "mclk", + "mclk_inner","mclk_ext"; + resets =3D <&syscrg JH7110_SYSRST_I2STX0_APB>, + <&syscrg JH7110_SYSRST_I2STX0_BCLK>; + dmas =3D <&dma 47>; + dma-names =3D "tx"; + #sound-dai-cells =3D <0>; + status =3D "disabled"; + }; + + i2stx1: i2s@120c0000 { + compatible =3D "starfive,jh7110-i2stx1"; + reg =3D <0x0 0x120c0000 0x0 0x1000>; + clocks =3D <&syscrg JH7110_SYSCLK_I2STX1_BCLK_MST>, + <&syscrg JH7110_SYSCLK_I2STX1_APB>, + <&syscrg JH7110_SYSCLK_MCLK>, + <&syscrg JH7110_SYSCLK_MCLK_INNER>, + <&mclk_ext>, + <&syscrg JH7110_SYSCLK_I2STX1_BCLK>, + <&syscrg JH7110_SYSCLK_I2STX1_LRCK>, + <&i2stx_bclk_ext>, + <&i2stx_lrck_ext>; + clock-names =3D "i2sclk", "apb", "mclk", + "mclk_inner", "mclk_ext", "bclk", + "lrck", "bclk_ext", "lrck_ext"; + resets =3D <&syscrg JH7110_SYSRST_I2STX1_APB>, + <&syscrg JH7110_SYSRST_I2STX1_BCLK>; + dmas =3D <&dma 48>; + dma-names =3D "tx"; + #sound-dai-cells =3D <0>; + status =3D "disabled"; + }; + sfctemp: temperature-sensor@120e0000 { compatible =3D "starfive,jh7110-temp"; reg =3D <0x0 0x120e0000 0x0 0x10000>; --=20 2.25.1