From nobody Thu Dec 18 16:36:31 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55439C83F15 for ; Mon, 28 Aug 2023 16:00:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232606AbjH1P7x (ORCPT ); Mon, 28 Aug 2023 11:59:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40974 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230234AbjH1P7V (ORCPT ); Mon, 28 Aug 2023 11:59:21 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CEB1610C for ; Mon, 28 Aug 2023 08:59:17 -0700 (PDT) Received: from dude05.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::54]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1qaedy-0005pk-Sk; Mon, 28 Aug 2023 17:59:10 +0200 From: Michael Tretter Date: Mon, 28 Aug 2023 17:59:06 +0200 Subject: [PATCH 1/5] drm/bridge: samsung-dsim: add more mipi-dsi device debug information MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230818-samsung-dsim-v1-1-b39716db6b7a@pengutronix.de> References: <20230818-samsung-dsim-v1-0-b39716db6b7a@pengutronix.de> In-Reply-To: <20230818-samsung-dsim-v1-0-b39716db6b7a@pengutronix.de> To: Inki Dae , Jagan Teki , Marek Szyprowski , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, Michael Tretter , Marco Felsch X-Mailer: b4 0.12.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::54 X-SA-Exim-Mail-From: m.tretter@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marco Felsch Since the MIPI configuration can be changed on demand it is very useful to print more MIPI settings during the MIPI device attach step. Signed-off-by: Marco Felsch Signed-off-by: Michael Tretter Acked-by: Inki Dae Reviewed-by: Adam Ford #imx8mm-beacon Reviewed-by: Inki Dae Reviewed-by: Marco Felsch Tested-by: Adam Ford #imx8mm-beacon Tested-by: Frieder Schrempf # Kontron BL --- drivers/gpu/drm/bridge/samsung-dsim.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge= /samsung-dsim.c index 73ec60757dbc..6778f1751faa 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -1711,7 +1711,10 @@ static int samsung_dsim_host_attach(struct mipi_dsi_= host *host, return ret; } =20 - DRM_DEV_INFO(dev, "Attached %s device\n", device->name); + DRM_DEV_INFO(dev, "Attached %s device (lanes:%d bpp:%d mode-flags:0x%lx)\= n", + device->name, device->lanes, + mipi_dsi_pixel_format_to_bpp(device->format), + device->mode_flags); =20 drm_bridge_add(&dsi->bridge); =20 --=20 2.39.2 From nobody Thu Dec 18 16:36:31 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D46BC83F18 for ; Mon, 28 Aug 2023 16:00:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232636AbjH1P76 (ORCPT ); Mon, 28 Aug 2023 11:59:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40958 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229664AbjH1P7T (ORCPT ); Mon, 28 Aug 2023 11:59:19 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 755A010B for ; Mon, 28 Aug 2023 08:59:17 -0700 (PDT) Received: from dude05.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::54]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1qaedz-0005pk-GH; Mon, 28 Aug 2023 17:59:11 +0200 From: Michael Tretter Date: Mon, 28 Aug 2023 17:59:07 +0200 Subject: [PATCH 2/5] drm/bridge: samsung-dsim: reread ref clock before configuring PLL MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230818-samsung-dsim-v1-2-b39716db6b7a@pengutronix.de> References: <20230818-samsung-dsim-v1-0-b39716db6b7a@pengutronix.de> In-Reply-To: <20230818-samsung-dsim-v1-0-b39716db6b7a@pengutronix.de> To: Inki Dae , Jagan Teki , Marek Szyprowski , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, Michael Tretter X-Mailer: b4 0.12.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::54 X-SA-Exim-Mail-From: m.tretter@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The PLL reference clock may change at runtime. Thus, reading the clock rate during probe is not sufficient to correctly configure the PLL for the expected hs clock. Read the actual rate of the reference clock before calculating the PLL configuration parameters. Signed-off-by: Michael Tretter Reviewed-by: Marco Felsch Tested-by: Frieder Schrempf # Kontron BL --- drivers/gpu/drm/bridge/samsung-dsim.c | 16 +++++++++------- include/drm/bridge/samsung-dsim.h | 1 + 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge= /samsung-dsim.c index 6778f1751faa..da90c2038042 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -611,7 +611,12 @@ static unsigned long samsung_dsim_set_pll(struct samsu= ng_dsim *dsi, u16 m; u32 reg; =20 - fin =3D dsi->pll_clk_rate; + if (dsi->pll_clk) + fin =3D clk_get_rate(dsi->pll_clk); + else + fin =3D dsi->pll_clk_rate; + dev_dbg(dsi->dev, "PLL ref clock freq %lu\n", fin); + fout =3D samsung_dsim_pll_find_pms(dsi, fin, freq, &p, &m, &s); if (!fout) { dev_err(dsi->dev, @@ -1821,18 +1826,15 @@ static int samsung_dsim_parse_dt(struct samsung_dsi= m *dsi) u32 lane_polarities[5] =3D { 0 }; struct device_node *endpoint; int i, nr_lanes, ret; - struct clk *pll_clk; =20 ret =3D samsung_dsim_of_read_u32(node, "samsung,pll-clock-frequency", &dsi->pll_clk_rate, 1); /* If it doesn't exist, read it from the clock instead of failing */ if (ret < 0) { dev_dbg(dev, "Using sclk_mipi for pll clock frequency\n"); - pll_clk =3D devm_clk_get(dev, "sclk_mipi"); - if (!IS_ERR(pll_clk)) - dsi->pll_clk_rate =3D clk_get_rate(pll_clk); - else - return PTR_ERR(pll_clk); + dsi->pll_clk =3D devm_clk_get(dev, "sclk_mipi"); + if (IS_ERR(dsi->pll_clk)) + return PTR_ERR(dsi->pll_clk); } =20 /* If it doesn't exist, use pixel clock instead of failing */ diff --git a/include/drm/bridge/samsung-dsim.h b/include/drm/bridge/samsung= -dsim.h index 05100e91ecb9..31ff88f152fb 100644 --- a/include/drm/bridge/samsung-dsim.h +++ b/include/drm/bridge/samsung-dsim.h @@ -87,6 +87,7 @@ struct samsung_dsim { void __iomem *reg_base; struct phy *phy; struct clk **clks; + struct clk *pll_clk; struct regulator_bulk_data supplies[2]; int irq; struct gpio_desc *te_gpio; --=20 2.39.2 From nobody Thu Dec 18 16:36:31 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D0FEC83F16 for ; Mon, 28 Aug 2023 16:00:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232643AbjH1QAA (ORCPT ); Mon, 28 Aug 2023 12:00:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40976 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229746AbjH1P7V (ORCPT ); Mon, 28 Aug 2023 11:59:21 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B12E2115 for ; Mon, 28 Aug 2023 08:59:18 -0700 (PDT) Received: from dude05.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::54]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1qaee0-0005pk-3q; Mon, 28 Aug 2023 17:59:12 +0200 From: Michael Tretter Date: Mon, 28 Aug 2023 17:59:08 +0200 Subject: [PATCH 3/5] drm/bridge: samsung-dsim: update PLL reference clock MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230818-samsung-dsim-v1-3-b39716db6b7a@pengutronix.de> References: <20230818-samsung-dsim-v1-0-b39716db6b7a@pengutronix.de> In-Reply-To: <20230818-samsung-dsim-v1-0-b39716db6b7a@pengutronix.de> To: Inki Dae , Jagan Teki , Marek Szyprowski , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, Michael Tretter X-Mailer: b4 0.12.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::54 X-SA-Exim-Mail-From: m.tretter@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The PLL requires a clock between 2 MHz and 30 MHz after the pre-divider. The reference clock for the PLL may change due to changes to it's parent clock. Thus, the frequency may be out of range or unsuited for generating the high speed clock for MIPI DSI. Try to keep the pre-devider small, and set the reference clock close to 30 MHz before recalculating the PLL configuration. Use a divider with a power of two for the reference clock as this seems to work best in my tests. Signed-off-by: Michael Tretter Reviewed-by: Marco Felsch Tested-by: Frieder Schrempf # Kontron BL --- drivers/gpu/drm/bridge/samsung-dsim.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge= /samsung-dsim.c index da90c2038042..4de6e4f116db 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -611,10 +611,21 @@ static unsigned long samsung_dsim_set_pll(struct sams= ung_dsim *dsi, u16 m; u32 reg; =20 - if (dsi->pll_clk) + if (dsi->pll_clk) { + /* + * Ensure that the reference clock is generated with a power of + * two divider from its parent, but close to the PLLs upper + * limit of the valid range of 2 MHz to 30 MHz. + */ + fin =3D clk_get_rate(clk_get_parent(dsi->pll_clk)); + while (fin > 30 * MHZ) + fin =3D fin / 2; + clk_set_rate(dsi->pll_clk, fin); + fin =3D clk_get_rate(dsi->pll_clk); - else + } else { fin =3D dsi->pll_clk_rate; + } dev_dbg(dsi->dev, "PLL ref clock freq %lu\n", fin); =20 fout =3D samsung_dsim_pll_find_pms(dsi, fin, freq, &p, &m, &s); --=20 2.39.2 From nobody Thu Dec 18 16:36:31 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C98A7C71153 for ; Mon, 28 Aug 2023 16:00:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232617AbjH1P7y (ORCPT ); Mon, 28 Aug 2023 11:59:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231271AbjH1P7V (ORCPT ); Mon, 28 Aug 2023 11:59:21 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4989E119 for ; Mon, 28 Aug 2023 08:59:19 -0700 (PDT) Received: from dude05.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::54]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1qaee0-0005pk-N8; Mon, 28 Aug 2023 17:59:12 +0200 From: Michael Tretter Date: Mon, 28 Aug 2023 17:59:09 +0200 Subject: [PATCH 4/5] drm/bridge: samsung-dsim: adjust porches by rounding up MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230818-samsung-dsim-v1-4-b39716db6b7a@pengutronix.de> References: <20230818-samsung-dsim-v1-0-b39716db6b7a@pengutronix.de> In-Reply-To: <20230818-samsung-dsim-v1-0-b39716db6b7a@pengutronix.de> To: Inki Dae , Jagan Teki , Marek Szyprowski , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, Michael Tretter X-Mailer: b4 0.12.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::54 X-SA-Exim-Mail-From: m.tretter@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The porches must be rounded up to make the samsung-dsim work. Signed-off-by: Michael Tretter Reviewed-by: Adam Ford #imx8mm-beacon Reviewed-by: Marco Felsch Tested-by: Adam Ford #imx8mm-beacon Tested-by: Frieder Schrempf # Kontron BL --- drivers/gpu/drm/bridge/samsung-dsim.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge= /samsung-dsim.c index 4de6e4f116db..459be953be55 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -974,9 +974,9 @@ static void samsung_dsim_set_display_mode(struct samsun= g_dsim *dsi) =20 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) { int byte_clk_khz =3D dsi->hs_clock / 1000 / 8; - int hfp =3D (m->hsync_start - m->hdisplay) * byte_clk_khz / m->clock; - int hbp =3D (m->htotal - m->hsync_end) * byte_clk_khz / m->clock; - int hsa =3D (m->hsync_end - m->hsync_start) * byte_clk_khz / m->clock; + int hfp =3D DIV_ROUND_UP((m->hsync_start - m->hdisplay) * byte_clk_khz, = m->clock); + int hbp =3D DIV_ROUND_UP((m->htotal - m->hsync_end) * byte_clk_khz, m->c= lock); + int hsa =3D DIV_ROUND_UP((m->hsync_end - m->hsync_start) * byte_clk_khz,= m->clock); =20 /* remove packet overhead when possible */ hfp =3D max(hfp - 6, 0); --=20 2.39.2 From nobody Thu Dec 18 16:36:31 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 636A9C83F11 for ; Mon, 28 Aug 2023 16:00:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232599AbjH1P7w (ORCPT ); Mon, 28 Aug 2023 11:59:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58460 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232596AbjH1P7W (ORCPT ); Mon, 28 Aug 2023 11:59:22 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4BCCA123 for ; Mon, 28 Aug 2023 08:59:19 -0700 (PDT) Received: from dude05.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::54]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1qaee1-0005pk-FX; Mon, 28 Aug 2023 17:59:13 +0200 From: Michael Tretter Date: Mon, 28 Aug 2023 17:59:10 +0200 Subject: [PATCH 5/5] drm/bridge: samsung-dsim: calculate porches in Hz MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230818-samsung-dsim-v1-5-b39716db6b7a@pengutronix.de> References: <20230818-samsung-dsim-v1-0-b39716db6b7a@pengutronix.de> In-Reply-To: <20230818-samsung-dsim-v1-0-b39716db6b7a@pengutronix.de> To: Inki Dae , Jagan Teki , Marek Szyprowski , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, Michael Tretter X-Mailer: b4 0.12.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::54 X-SA-Exim-Mail-From: m.tretter@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Calculating the byte_clk in kHz is imprecise for a hs_clock of 55687500 Hz, which may be used with a pixel clock of 74.25 MHz with mode 1920x1080-30. Fix the calculation by using HZ instead of kHZ. This requires to change the type to u64 to prevent overflows of the integer type. Signed-off-by: Michael Tretter Reviewed-by: Adam Ford #imx8mm-beacon Reviewed-by: Marco Felsch Tested-by: Adam Ford #imx8mm-beacon Tested-by: Frieder Schrempf # Kontron BL --- drivers/gpu/drm/bridge/samsung-dsim.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge= /samsung-dsim.c index 459be953be55..eb7aca2b9ab7 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -973,10 +973,12 @@ static void samsung_dsim_set_display_mode(struct sams= ung_dsim *dsi) u32 reg; =20 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) { - int byte_clk_khz =3D dsi->hs_clock / 1000 / 8; - int hfp =3D DIV_ROUND_UP((m->hsync_start - m->hdisplay) * byte_clk_khz, = m->clock); - int hbp =3D DIV_ROUND_UP((m->htotal - m->hsync_end) * byte_clk_khz, m->c= lock); - int hsa =3D DIV_ROUND_UP((m->hsync_end - m->hsync_start) * byte_clk_khz,= m->clock); + u64 byte_clk =3D dsi->hs_clock / 8; + u64 pix_clk =3D m->clock * 1000; + + int hfp =3D DIV64_U64_ROUND_UP((m->hsync_start - m->hdisplay) * byte_clk= , pix_clk); + int hbp =3D DIV64_U64_ROUND_UP((m->htotal - m->hsync_end) * byte_clk, pi= x_clk); + int hsa =3D DIV64_U64_ROUND_UP((m->hsync_end - m->hsync_start) * byte_cl= k, pix_clk); =20 /* remove packet overhead when possible */ hfp =3D max(hfp - 6, 0); --=20 2.39.2