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Wysocki" , Kevin Hilman , Ulf Hansson , Pavel Machek , Len Brown , Greg Kroah-Hartman , Bjorn Andersson , Andy Gross , Konrad Dybcio , Mike Turquette , Stephen Boyd , Taniya Das Cc: linux-pm@vger.kernel.org, Linux Kernel Mailing List , linux-arm-msm@vger.kernel.org, Jagadeesh Kona Subject: [PATCH v2 6/6] venus: pm_helpers: Use dev_pm_genpd_set_hwmode to switch GDSC mode Date: Wed, 16 Aug 2023 17:57:41 +0300 Message-Id: <20230816145741.1472721-7-abel.vesa@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230816145741.1472721-1-abel.vesa@linaro.org> References: <20230816145741.1472721-1-abel.vesa@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Jagadeesh Kona This change demonstrates the use of dev_pm_genpd_set_hwmode API from video driver to switch the video mvs0 gdsc to SW/HW modes at runtime based on requirement. This change adds a new boolean array member vcodec_pmdomains_hwctrl in venus_resources structure to indicate if GDSC's have HW control support or not. This data is used in vcodec_control_v4() to check if GDSC has support to switch to HW control mode and then call dev_pm_genpd_set_hwmode to switch the GDSC mode. Signed-off-by: Jagadeesh Kona Signed-off-by: Abel Vesa Acked-by: Konrad Dybcio --- drivers/media/platform/qcom/venus/core.c | 4 ++ drivers/media/platform/qcom/venus/core.h | 1 + .../media/platform/qcom/venus/pm_helpers.c | 47 ++++++++----------- 3 files changed, 25 insertions(+), 27 deletions(-) diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platf= orm/qcom/venus/core.c index 054b8e74ba4f..8145062ab6f7 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -706,6 +706,7 @@ static const struct venus_resources sdm845_res_v2 =3D { .vcodec1_clks =3D { "vcodec1_core", "vcodec1_bus" }, .vcodec_clks_num =3D 2, .vcodec_pmdomains =3D { "venus", "vcodec0", "vcodec1" }, + .vcodec_pmdomains_hwctrl =3D { false, true, true }, .vcodec_pmdomains_num =3D 3, .opp_pmdomain =3D (const char *[]) { "cx", NULL }, .vcodec_num =3D 2, @@ -755,6 +756,7 @@ static const struct venus_resources sc7180_res =3D { .vcodec0_clks =3D { "vcodec0_core", "vcodec0_bus" }, .vcodec_clks_num =3D 2, .vcodec_pmdomains =3D { "venus", "vcodec0" }, + .vcodec_pmdomains_hwctrl =3D { false, true }, .vcodec_pmdomains_num =3D 2, .opp_pmdomain =3D (const char *[]) { "cx", NULL }, .vcodec_num =3D 1, @@ -812,6 +814,7 @@ static const struct venus_resources sm8250_res =3D { .vcodec0_clks =3D { "vcodec0_core" }, .vcodec_clks_num =3D 1, .vcodec_pmdomains =3D { "venus", "vcodec0" }, + .vcodec_pmdomains_hwctrl =3D { false, true }, .vcodec_pmdomains_num =3D 2, .opp_pmdomain =3D (const char *[]) { "mx", NULL }, .vcodec_num =3D 1, @@ -871,6 +874,7 @@ static const struct venus_resources sc7280_res =3D { .vcodec0_clks =3D {"vcodec_core", "vcodec_bus"}, .vcodec_clks_num =3D 2, .vcodec_pmdomains =3D { "venus", "vcodec0" }, + .vcodec_pmdomains_hwctrl =3D { false, true }, .vcodec_pmdomains_num =3D 2, .opp_pmdomain =3D (const char *[]) { "cx", NULL }, .vcodec_num =3D 1, diff --git a/drivers/media/platform/qcom/venus/core.h b/drivers/media/platf= orm/qcom/venus/core.h index 4a633261ece4..6d591ecad482 100644 --- a/drivers/media/platform/qcom/venus/core.h +++ b/drivers/media/platform/qcom/venus/core.h @@ -73,6 +73,7 @@ struct venus_resources { const char * const vcodec1_clks[VIDC_VCODEC_CLKS_NUM_MAX]; unsigned int vcodec_clks_num; const char * const vcodec_pmdomains[VIDC_PMDOMAINS_NUM_MAX]; + bool vcodec_pmdomains_hwctrl[VIDC_PMDOMAINS_NUM_MAX]; unsigned int vcodec_pmdomains_num; const char **opp_pmdomain; unsigned int vcodec_num; diff --git a/drivers/media/platform/qcom/venus/pm_helpers.c b/drivers/media= /platform/qcom/venus/pm_helpers.c index 48c9084bb4db..c53eef23c793 100644 --- a/drivers/media/platform/qcom/venus/pm_helpers.c +++ b/drivers/media/platform/qcom/venus/pm_helpers.c @@ -408,35 +408,28 @@ static const struct venus_pm_ops pm_ops_v3 =3D { =20 static int vcodec_control_v4(struct venus_core *core, u32 coreid, bool ena= ble) { - void __iomem *ctrl, *stat; - u32 val; - int ret; - - if (IS_V6(core)) { - ctrl =3D core->wrapper_base + WRAPPER_CORE_POWER_CONTROL_V6; - stat =3D core->wrapper_base + WRAPPER_CORE_POWER_STATUS_V6; - } else if (coreid =3D=3D VIDC_CORE_ID_1) { - ctrl =3D core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_CONTROL; - stat =3D core->wrapper_base + WRAPPER_VCODEC0_MMCC_POWER_STATUS; - } else { - ctrl =3D core->wrapper_base + WRAPPER_VCODEC1_MMCC_POWER_CONTROL; - stat =3D core->wrapper_base + WRAPPER_VCODEC1_MMCC_POWER_STATUS; - } - - if (enable) { - writel(0, ctrl); - - ret =3D readl_poll_timeout(stat, val, val & BIT(1), 1, 100); - if (ret) - return ret; - } else { - writel(1, ctrl); + int i, ret =3D 0; + struct device *dev =3D core->dev; + const struct venus_resources *res =3D core->res; =20 - ret =3D readl_poll_timeout(stat, val, !(val & BIT(1)), 1, 100); - if (ret) - return ret; + for (i =3D 0; i < res->vcodec_pmdomains_num; i++) { + if (res->vcodec_pmdomains_hwctrl[i]) { + + if (!core->pmdomains[i]) + return -ENODEV; + + /* + * enable( true ), switch the gdsc to SW mode + * enable( false), switch the gdsc to HW mode + */ + ret =3D dev_pm_genpd_set_hwmode(core->pmdomains[i], !enable); + if (ret) { + dev_err(dev, "Failed to switch power-domain:%d to %s mode\n", + i, enable ? "SW" : "HW"); + return ret; + } + } } - return 0; } =20 --=20 2.34.1