From nobody Wed Dec 17 21:28:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D2EDC001E0 for ; Wed, 16 Aug 2023 09:08:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243185AbjHPJHx (ORCPT ); Wed, 16 Aug 2023 05:07:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243022AbjHPJHh (ORCPT ); Wed, 16 Aug 2023 05:07:37 -0400 Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3AB0D19A4; Wed, 16 Aug 2023 02:07:36 -0700 (PDT) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37G3jWvo017037; Wed, 16 Aug 2023 02:07:26 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=a6w+d+NKHXM64yo+EW8SiLVMC8o1+XmhvT/M9ZyrlKk=; b=ladfCfTA3PEl8myWKtiRGdnwesfBZ4nzV2b12TOtfaO57P/IEhYpo11fMURJs0Qg9Ghf 2FrSfdgvryyMl/p6eGkT8ObPZ+ssO8BkYFhTPhfghoj2n+jdwcVre9CBk7TPa32Gnekr ni3kDXG+91SHfHPPY31uOZjpfhwTXV0jL+YYq6EfSIB4+jjgVvtH8uG3W5yER9AsZ0lA 1LvuvhLQyiXP5FqdS9yH+48zXJ/t4dqFQxTO5Qw74kZfHZ75V3gBnLzukDjuFQdrACXE i85XwR6AqjnO5es5iHwz4ryIIkBZmeG6WmNoljOIUdzoI5oA+/lAJxzin7mqm6VfF4df Hw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3sgptkrw8x-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 16 Aug 2023 02:07:26 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 16 Aug 2023 02:07:24 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 16 Aug 2023 02:07:24 -0700 Received: from marvell-OptiPlex-7090.marvell.com (unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id 7D9643F7043; Wed, 16 Aug 2023 02:07:20 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , , , , , "Alexander Lobakin" Subject: [PATCH v2 net] octeontx2-pf: fix page_pool creation fail for rings > 32k Date: Wed, 16 Aug 2023 14:37:18 +0530 Message-ID: <20230816090718.2481252-1-rkannoth@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: Sig4uvGjuF9BDwIfz_e4Frf2RFlURHnS X-Proofpoint-GUID: Sig4uvGjuF9BDwIfz_e4Frf2RFlURHnS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-08-16_07,2023-08-15_02,2023-05-22_02 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" octeontx2 driver calls page_pool_create() during driver probe() and fails if queue size > 32k. Page pool infra uses these buffers as shock absorbers for burst traffic. These pages are pinned down over time as working sets varies, due to the recycling nature of page pool, given page pool (currently) don't have a shrinker mechanism, the pages remain pinned down in ptr_ring. Instead of clamping page_pool size to 32k at most, limit it even more to 2k to avoid wasting memory. This have been tested on octeontx2 CN10KA hardware. TCP and UDP tests using iperf shows not performance regressions. Fixes: b2e3406a38f0 ("octeontx2-pf: Add support for page pool") Suggested-by: Alexander Lobakin Reviewed-by: Sunil Goutham Signed-off-by: Ratheesh Kannoth --- ChangeLogs: vi->v2: Commit message changes and typo fixes v0->v1: Commit message changes. --- drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c | 2 +- drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c b/dri= vers/net/ethernet/marvell/octeontx2/nic/otx2_common.c index 77c8f650f7ac..fc8a1220eb39 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c @@ -1432,7 +1432,7 @@ int otx2_pool_init(struct otx2_nic *pfvf, u16 pool_id, } =20 pp_params.flags =3D PP_FLAG_PAGE_FRAG | PP_FLAG_DMA_MAP; - pp_params.pool_size =3D numptrs; + pp_params.pool_size =3D OTX2_PAGE_POOL_SZ; pp_params.nid =3D NUMA_NO_NODE; pp_params.dev =3D pfvf->dev; pp_params.dma_dir =3D DMA_FROM_DEVICE; diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/dri= vers/net/ethernet/marvell/octeontx2/nic/otx2_common.h index ba8091131ec0..f6fea43617ff 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h @@ -30,6 +30,8 @@ #include #include "qos.h" =20 +#define OTX2_PAGE_POOL_SZ 2048 + /* IPv4 flag more fragment bit */ #define IPV4_FLAG_MORE 0x20 =20 --=20 2.25.1