From nobody Fri Sep 20 11:41:43 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E3D1C3DA40 for ; Tue, 15 Aug 2023 15:45:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238229AbjHOPpV (ORCPT ); Tue, 15 Aug 2023 11:45:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49136 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238182AbjHOPox (ORCPT ); Tue, 15 Aug 2023 11:44:53 -0400 Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46819E72 for ; Tue, 15 Aug 2023 08:44:52 -0700 (PDT) Received: by mail-pf1-x42a.google.com with SMTP id d2e1a72fcca58-688142a392eso4279739b3a.3 for ; Tue, 15 Aug 2023 08:44:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1692114292; x=1692719092; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EA3Mv4UUYDYTKgE8UCN4QVB+ZNunBcvwuNsqlG0Ry6I=; b=h5y6LkHH29JJACtPuQFK+ju2t31IHklluAmYjRYh+fL6/vBj+dpbjjuFRH8RzgIJHv 3faXyzAfONVk56VELK7VOhWcS75QSQVePJqTrDnoseYSMoP59ZrBg7pQiCt5m+WhUOND X4HwAb1pEVkyNSyfcuE/NYTOB8f6VL515hgrw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692114292; x=1692719092; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EA3Mv4UUYDYTKgE8UCN4QVB+ZNunBcvwuNsqlG0Ry6I=; b=HZFxWEP0WXUbtvNQ9ALsTtyqm0L8NaxT3nVRI5H2lW+mmZYcXdZMPs/uAiYrgs2hgR 2lk38oVbxNng6Gnh8GPAJMI1JWtVuNK5fHS/pUwHgwnsSjJ77B6P3Tf8t4C0/d3wKbor 297rd8y47cGf41pHn6/G0ulYfmvJ+4ksr1Ls62IcaOI5toowldqPUtJ69ZtDYXxCRl6K +2ckDP/tUxmyc+8Oc4pxWLquroDkiLJoVhpXMRGYzCJp2yowLc2zL1VQgN6tl3HSK6xu 10hC4AVSNEGHvRlRduhpk76lRi3JCinMCKdJ6VZLFTkiPzKJKZlmfIBpLEwi3OoInMRS sM/A== X-Gm-Message-State: AOJu0YzRIEagVdIcq2/L5dq+90lTkvSXtA90HhBJLpENiTYC8SBHyRtf siUSq7mpoME68bqSm/DWywDJ0Q== X-Google-Smtp-Source: AGHT+IFHXM2ifH0wB+IAbVqCwTi6GeJTVYyJNT05exRF3SZCQx7y2NkW6qKN3fV/cPF4uLvnwxcLEg== X-Received: by 2002:a05:6a20:1052:b0:12f:dc31:a71e with SMTP id gt18-20020a056a20105200b0012fdc31a71emr13176557pzc.56.1692114291736; Tue, 15 Aug 2023 08:44:51 -0700 (PDT) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:40cf:3807:f8c8:2d76]) by smtp.gmail.com with ESMTPSA id n13-20020aa78a4d000000b0065e154bac6dsm9431247pfa.133.2023.08.15.08.44.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Aug 2023 08:44:51 -0700 (PDT) From: Hsin-Yi Wang To: Tudor Ambarus , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , Bjorn Andersson Cc: Pratyush Yadav , Michael Walle , "Miquel Raynal )" , "Richard Weinberger )" , "Vignesh Raghavendra )" , Rob Herring , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, cros-qcom-dts-watchers@chromium.org, Andy Gross , Konrad Dybcio Subject: [PATCH 1/4] dt-bindings: mtd: jedec,spi-nor: Add disable-quad-mode property Date: Tue, 15 Aug 2023 23:31:52 +0800 Message-ID: <20230815154412.713846-2-hsinyi@chromium.org> X-Mailer: git-send-email 2.41.0.694.ge786442a9b-goog In-Reply-To: <20230815154412.713846-1-hsinyi@chromium.org> References: <20230815154412.713846-1-hsinyi@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Some flash devices, eg. gd25lq64c, enable quad mode by default after spi_nor_parse_bfpt(). However, the systems using these flash devices may required the quad mode to be turned off for using write protection or to avoid a potential short issue[1]. Add a disable-quad-mode property in devicetree that system can use it to override the quad mode status parsed from BFPT. [1] https://www.elm-tech.com/ja/products/spi-flash-memory/gd25lq64/gd25lq64.pdf page 13 Signed-off-by: Hsin-Yi Wang --- Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Doc= umentation/devicetree/bindings/mtd/jedec,spi-nor.yaml index 58f0cea160ef5..4cf1da1108500 100644 --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml @@ -72,6 +72,13 @@ properties: be used on such systems, to denote the absence of a reliable reset mechanism. =20 + disable-quad-mode: + type: boolean + description: + Some flash devices enables QE bit after BFPT is parsed. However, som= e system + may required quad mode to be disabled to use write protection. This = boolean + flag is to override the quad enable status parsed from BFPT. + no-wp: type: boolean description: --=20 2.41.0.694.ge786442a9b-goog From nobody Fri Sep 20 11:41:43 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AE59AC07E8A for ; Tue, 15 Aug 2023 15:45:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238236AbjHOPpX (ORCPT ); Tue, 15 Aug 2023 11:45:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238188AbjHOPo4 (ORCPT ); Tue, 15 Aug 2023 11:44:56 -0400 Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A04ED10DC for ; Tue, 15 Aug 2023 08:44:55 -0700 (PDT) Received: by mail-pf1-x42e.google.com with SMTP id d2e1a72fcca58-68879fc4871so16830b3a.0 for ; Tue, 15 Aug 2023 08:44:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1692114295; x=1692719095; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xmLPugTGz1sgSy2J/v99Dk0J3o8zfc9d+fDcwlxsiEo=; b=hPdGnKSUgljhFqFsgGLQzZfUk5Zd5v3vXX+lFx5n/q9s02AfGmaHSqc010GOa/OM3f aNaofPdOvBFPFjUmGdt3gDNvOc1wV1TJoZpvyVHeBIsK21QCzXmvuoygHnn6HnbssZcB EsnO0+NmyNRllTqEzVtLDpy5CY61OZisnow1Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692114295; x=1692719095; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xmLPugTGz1sgSy2J/v99Dk0J3o8zfc9d+fDcwlxsiEo=; b=S0vCnZi7GLEmD48ccHR+F4Y4XTanPllw69UX20BYLN6HPf/bbHck/U1sfLsq6Li6/K A5lAYwC91hzkb474Ev5dGR7itZUX1we6mTW9F6Yc3amYTPB81BF10XnFVtQOegBb8xyi VKcHLFRfz7m3nQm2owf7QPNqw4JXtcU2R8CF3JT58lePz+9VheGdc10UhCvQcNCJlwPY m2uGaBC0wYDVgx1fxpmznNFY4mNzfzESfLMMwZUunnhCwmnW2zZ7of8pIZ6QR3zbleOD GFdPiBv8f4traeKkwLJGy2Hioe+Qz4nIKJaxLXJB65O6U0u2COCXsXvIoA6pQxrK6JLC jmqw== X-Gm-Message-State: AOJu0Yx/RcWIuDtW4nhga+hY7BfR75NVwldjovMFUHL8+AeEElGzXFh+ 6XZY9vII+mKk+ofFy3RocPNR+A== X-Google-Smtp-Source: AGHT+IFGfwXqvhlQgK3dZJYanVm1WhEoRWmNzCEnvvClZuT/nup6kWHRH9gSZE0NGJjts8ZfBG+bbA== X-Received: by 2002:a05:6a00:1a50:b0:668:73f5:dce0 with SMTP id h16-20020a056a001a5000b0066873f5dce0mr12705130pfv.29.1692114295080; Tue, 15 Aug 2023 08:44:55 -0700 (PDT) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:40cf:3807:f8c8:2d76]) by smtp.gmail.com with ESMTPSA id n13-20020aa78a4d000000b0065e154bac6dsm9431247pfa.133.2023.08.15.08.44.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Aug 2023 08:44:54 -0700 (PDT) From: Hsin-Yi Wang To: Tudor Ambarus , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , Bjorn Andersson Cc: Pratyush Yadav , Michael Walle , "Miquel Raynal )" , "Richard Weinberger )" , "Vignesh Raghavendra )" , Rob Herring , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, cros-qcom-dts-watchers@chromium.org, Andy Gross , Konrad Dybcio Subject: [PATCH 2/4] mtd: spi-nor: sfdp: read disable-quad-mode property Date: Tue, 15 Aug 2023 23:31:53 +0800 Message-ID: <20230815154412.713846-3-hsinyi@chromium.org> X-Mailer: git-send-email 2.41.0.694.ge786442a9b-goog In-Reply-To: <20230815154412.713846-1-hsinyi@chromium.org> References: <20230815154412.713846-1-hsinyi@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Some flash devices, eg. gd25lq64c, enable quad mode by default after spi_nor_parse_bfpt(). However, the systems using these flash devices may required the quad mode to be turned off to use write protection or to avoid a potential short issue[1]. Add a disable-quad-mode property in devicetree that system can use it to override the quad mode status parsed from BFPT. [1]https://www.elm-tech.com/ja/products/spi-flash-memory/gd25lq64/gd25lq64.= pdf page 13 Signed-off-by: Hsin-Yi Wang --- drivers/mtd/spi-nor/core.c | 5 +++++ drivers/mtd/spi-nor/core.h | 1 + drivers/mtd/spi-nor/debugfs.c | 1 + 3 files changed, 7 insertions(+) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 614960c7d22cc..dcf4ff46c37ae 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2847,6 +2847,11 @@ static void spi_nor_init_flags(struct spi_nor *nor) if (of_property_read_bool(np, "no-wp")) nor->flags |=3D SNOR_F_NO_WP; =20 + if (of_property_read_bool(np, "disable-quad-mode")) { + nor->flags |=3D SNOR_F_DISABLE_QUAD; + nor->params->quad_enable =3D NULL; + } + if (flags & SPI_NOR_SWP_IS_VOLATILE) nor->flags |=3D SNOR_F_SWP_IS_VOLATILE; =20 diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 9217379b9cfef..b06bd97668f3a 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -133,6 +133,7 @@ enum spi_nor_option_flags { SNOR_F_RWW =3D BIT(14), SNOR_F_ECC =3D BIT(15), SNOR_F_NO_WP =3D BIT(16), + SNOR_F_DISABLE_QUAD =3D BIT(17), }; =20 struct spi_nor_read_command { diff --git a/drivers/mtd/spi-nor/debugfs.c b/drivers/mtd/spi-nor/debugfs.c index 6e163cb5b478c..c17451ae0931a 100644 --- a/drivers/mtd/spi-nor/debugfs.c +++ b/drivers/mtd/spi-nor/debugfs.c @@ -28,6 +28,7 @@ static const char *const snor_f_names[] =3D { SNOR_F_NAME(RWW), SNOR_F_NAME(ECC), SNOR_F_NAME(NO_WP), + SNOR_F_NAME(DISABLE_QUAD), }; #undef SNOR_F_NAME =20 --=20 2.41.0.694.ge786442a9b-goog From nobody Fri Sep 20 11:41:43 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD7B2C07E8C for ; Tue, 15 Aug 2023 15:45:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238245AbjHOPpY (ORCPT ); Tue, 15 Aug 2023 11:45:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49186 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238191AbjHOPo7 (ORCPT ); Tue, 15 Aug 2023 11:44:59 -0400 Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A785E72 for ; Tue, 15 Aug 2023 08:44:59 -0700 (PDT) Received: by mail-pf1-x42b.google.com with SMTP id d2e1a72fcca58-68859ba3a93so378274b3a.1 for ; Tue, 15 Aug 2023 08:44:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1692114298; x=1692719098; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tA3QjSCigQ8q8wip9gFTKQkaEIdBJK1A3l6+t1K7Bv0=; b=ejBR2jtUerzx5wnrj86G8N+bYfois34YCppqR75oLTPLq7/QzDutph+WKgbHb9TqkQ BRwskwQ64WTnA2SvrsJQrwU2R/Yf0P8FKH2BrA2mU1DIq1lqfoHLYujw3hlFqPKexAE0 PjCMKLHX9eH8M7wWAqubZGqfJFjytNf2qHyGE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692114298; x=1692719098; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tA3QjSCigQ8q8wip9gFTKQkaEIdBJK1A3l6+t1K7Bv0=; b=C/pw1J3Bn7B/0uLCA2tm4JcNI8l46U63PFS2qpSTx5M2IHRhksRQScKztu1ruF7TQJ UTXVUM2GU3YkZO8qs3p1jwSaEgZa6PPuxWI3BWaUQMaqnJR+ev/T/I/W/UtyaGrBJ0R7 PwwDZWfUmZsHAuJQnlmxXHEU3MpXskhd1qpVXurzySLNDK45CJvvF1dx3BoQ6qkUxoRA SZjd8F40scKj9DsudhSVKuBC7zMXtB6QTltthqyFtutykYCbo65QJLWsD61iiZGZmQtj zXwnmeB+1jQdcd4fNmdwKrevyKbDbZDVJtNPtUx3PdZwACP7DsuE6ZKzyzTB4L7JA+oU Sf+A== X-Gm-Message-State: AOJu0Ywa9Aqv82rmjplDKoe2jCynm474UHUdjd4xRihWz3OoCb2oJQhA XmjGOAzZWy/EvXbO9mTKImm05g== X-Google-Smtp-Source: AGHT+IG+MhhXs3J/eE7KIJtSsSOonQIqrRHLUlpGdM77zZQi1lncYBUpQPdXQrlw7WkocLYr2AbghA== X-Received: by 2002:a05:6a00:2305:b0:687:2fa9:532d with SMTP id h5-20020a056a00230500b006872fa9532dmr11655270pfh.17.1692114298463; Tue, 15 Aug 2023 08:44:58 -0700 (PDT) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:40cf:3807:f8c8:2d76]) by smtp.gmail.com with ESMTPSA id n13-20020aa78a4d000000b0065e154bac6dsm9431247pfa.133.2023.08.15.08.44.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Aug 2023 08:44:58 -0700 (PDT) From: Hsin-Yi Wang To: Tudor Ambarus , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , Bjorn Andersson Cc: Pratyush Yadav , Michael Walle , "Miquel Raynal )" , "Richard Weinberger )" , "Vignesh Raghavendra )" , Rob Herring , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, cros-qcom-dts-watchers@chromium.org, Andy Gross , Konrad Dybcio Subject: [PATCH 3/4] arm64: dts: mediatek: mt8183: disable quad mode for spi nor Date: Tue, 15 Aug 2023 23:31:54 +0800 Message-ID: <20230815154412.713846-4-hsinyi@chromium.org> X-Mailer: git-send-email 2.41.0.694.ge786442a9b-goog In-Reply-To: <20230815154412.713846-1-hsinyi@chromium.org> References: <20230815154412.713846-1-hsinyi@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Some of the SKUs are using gigadevice gd25lq64c flash chip. The chip default enables quad mode, which results in the write protect pin set to IO pin. In mt8183 kukui, we won't use quad enable for all SKUs, so apply the property to disable spi nor's quad mode. Signed-off-by: Hsin-Yi Wang --- arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/bo= ot/dts/mediatek/mt8183-kukui.dtsi index 6ce16a265e053..8e4761e2b8ff4 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi @@ -877,6 +877,7 @@ w25q64dw: flash@0 { compatible =3D "winbond,w25q64dw", "jedec,spi-nor"; reg =3D <0>; spi-max-frequency =3D <25000000>; + disable-quad-mode; }; }; =20 --=20 2.41.0.694.ge786442a9b-goog From nobody Fri Sep 20 11:41:43 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4E6FC07E8E for ; Tue, 15 Aug 2023 15:45:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238258AbjHOPp0 (ORCPT ); Tue, 15 Aug 2023 11:45:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238199AbjHOPpD (ORCPT ); Tue, 15 Aug 2023 11:45:03 -0400 Received: from mail-pf1-x432.google.com (mail-pf1-x432.google.com [IPv6:2607:f8b0:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6B29810C6 for ; Tue, 15 Aug 2023 08:45:02 -0700 (PDT) Received: by mail-pf1-x432.google.com with SMTP id d2e1a72fcca58-686daaa5f1fso3811126b3a.3 for ; Tue, 15 Aug 2023 08:45:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1692114302; x=1692719102; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gJmTT5Birsmw3IffSKTzNizstUWs73hZ2XtnCyouma4=; b=EmtRFWNxOZBhCSvbwn/tqeAcE99fLpxaVbN7woJu/mWoDOtjxym1jTZkxHhu07Rkyt aRrgPSp/P/3sucNU9SeuOykjKSQh3VlqmEj8eU7wU4xRqA6huNIOrfmc4oNT57mf+z5F 6gU0Vk6XMHXfclV87Ur5S7pFb+TluJkDGSF1w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1692114302; x=1692719102; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gJmTT5Birsmw3IffSKTzNizstUWs73hZ2XtnCyouma4=; b=lxUPeXWmJ1PdswgqVrcQGnGaLRPoynBj2FFigOluFm89NfAMxSFGU3V2fAUHgP+dAx 6LrWLaNRz5iOIkcynxgqXFUyYAwYGNr4PEJ5Xx7cFUITyrXnfhp1QofAGPvHl5FBt4Jz tGd3ibLdq+mCizQcOk6fmVwfDwTq55L4Hw8TxWqVuP7oy4qzCUTHT3w3Eyr0vTeojKRM J3N6BH7fEeXJWD4rw1nXVkXpIwaIM/MF/bdpJLtWZJADVPrOjjLEqAwRhnMAnejL2mu1 o+rjWYDxGVskwdg7HIuaV461KsDFh/LMx019+8fDaFLUxg5mcXnHpHeg+gn8II7YZsB6 VGGg== X-Gm-Message-State: AOJu0YyqAlQv5OHABBGNUPh3TOYCxyCpPAc5+Ez16i6w1lR/nyRZOKoT hkVc33Ji1EDA+QVOwhxmtUGncw== X-Google-Smtp-Source: AGHT+IF1i0bsPTgkJk9HYJHsQ+5ia/nkZZCBU7zl2is+oYE8IhKDNs3GjUWaIoKqVbHs5puDt5BuXg== X-Received: by 2002:a05:6a00:10cb:b0:688:48be:50b4 with SMTP id d11-20020a056a0010cb00b0068848be50b4mr1899247pfu.16.1692114301925; Tue, 15 Aug 2023 08:45:01 -0700 (PDT) Received: from hsinyi-z840.tpe.corp.google.com ([2401:fa00:1:10:40cf:3807:f8c8:2d76]) by smtp.gmail.com with ESMTPSA id n13-20020aa78a4d000000b0065e154bac6dsm9431247pfa.133.2023.08.15.08.44.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Aug 2023 08:45:01 -0700 (PDT) From: Hsin-Yi Wang To: Tudor Ambarus , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , Bjorn Andersson Cc: Pratyush Yadav , Michael Walle , "Miquel Raynal )" , "Richard Weinberger )" , "Vignesh Raghavendra )" , Rob Herring , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, cros-qcom-dts-watchers@chromium.org, Andy Gross , Konrad Dybcio Subject: [PATCH 4/4] arm64: dts: qcom: sc7180: disable quad mode for spi nor Date: Tue, 15 Aug 2023 23:31:55 +0800 Message-ID: <20230815154412.713846-5-hsinyi@chromium.org> X-Mailer: git-send-email 2.41.0.694.ge786442a9b-goog In-Reply-To: <20230815154412.713846-1-hsinyi@chromium.org> References: <20230815154412.713846-1-hsinyi@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Some of the SKUs are using gigadevice gd25lq64c flash chip. The chip default enables quad mode, which results in the write protect pin set to IO pin. In trogdor platforms, we won't use quad enable for all SKUs, so apply the property to disable spi nor's quad mode. Signed-off-by: Hsin-Yi Wang --- arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot= /dts/qcom/sc7180-trogdor.dtsi index 5a33e16a8b677..0806ce8e86bea 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -436,6 +436,7 @@ flash@0 { spi-max-frequency =3D <37500000>; spi-tx-bus-width =3D <2>; spi-rx-bus-width =3D <2>; + disable-quad-mode; }; }; =20 --=20 2.41.0.694.ge786442a9b-goog