From nobody Thu Sep 11 12:46:15 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F816C07E8B for ; Mon, 14 Aug 2023 08:54:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235338AbjHNIyh (ORCPT ); Mon, 14 Aug 2023 04:54:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49182 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234766AbjHNIxx (ORCPT ); Mon, 14 Aug 2023 04:53:53 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D3C891 for ; Mon, 14 Aug 2023 01:53:53 -0700 (PDT) Message-ID: <20230814085112.687588373@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1692003231; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=pgQJfQpslITAglfzeFbwVD5u5BN9zZNZTRQkZDXXSN4=; b=IHFiWIGMKoHOuMcEZpQdp/I2x91VyrRpezp+ijjepqkWmBkzPY/WOB5lXWZjtequoKYUMJ ujZhHYq7Nw9IVwQmlrcD6BDGXDRAopzS1slfFIDBB4NZTbqEqjj0KZQYs7h2OjmjrOekUk Q3gNpfLZncesYfDl0BcIax4vdnImFeTa6iloRGUTMGWF5aUbsPumBH9q7ClzQGZr30aU2K WIw9TB048bgj0B36GQigD6CJoipcVzg/ACDy3v8y+py0yKvPrIAFhGoSd1PFsD/55IhB0G Cu9IcMfDiHTk+Ur1p8ONTV0wzRqqjWndE5uxm2NemDIP9i7IsB5osKW+4f3Utg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1692003231; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=pgQJfQpslITAglfzeFbwVD5u5BN9zZNZTRQkZDXXSN4=; b=sgG4ENn41V9l2B1qOFIc6SzUzvL+GAW1hui83YUVc5wq3NPET6TGlVRa9cAdqi+6SsA/aW 0xV0hlCH7bkAZnBA== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Tom Lendacky , Andrew Cooper , Arjan van de Ven , Huang Rui , Juergen Gross , Dimitri Sivanich , Michael Kelley , Wei Liu , Pu Wen , Qiuxu Zhuo , Sohil Mehta Subject: [patch V4 11/41] x86/cpu: Remove pointless evaluation of x86_coreid_bits References: <20230814085006.593997112@linutronix.de> MIME-Version: 1.0 Date: Mon, 14 Aug 2023 10:53:51 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" cpuinfo_x86::x86_coreid_bits is only used by the AMD numa topology code. No point in evaluating it on non AMD systems. No functional change. Signed-off-by: Thomas Gleixner Tested-by: Juergen Gross Tested-by: Sohil Mehta Tested-by: Michael Kelley Reviewed-by: Arjan van de Ven --- arch/x86/kernel/cpu/intel.c | 13 ------------- arch/x86/kernel/cpu/zhaoxin.c | 14 -------------- 2 files changed, 27 deletions(-) --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -488,19 +488,6 @@ static void early_init_intel(struct cpui setup_clear_cpu_cap(X86_FEATURE_PGE); } =20 - if (c->cpuid_level >=3D 0x00000001) { - u32 eax, ebx, ecx, edx; - - cpuid(0x00000001, &eax, &ebx, &ecx, &edx); - /* - * If HTT (EDX[28]) is set EBX[16:23] contain the number of - * apicids which are reserved per package. Store the resulting - * shift value for the package management code. - */ - if (edx & (1U << 28)) - c->x86_coreid_bits =3D get_count_order((ebx >> 16) & 0xff); - } - check_memory_type_self_snoop_errata(c); =20 /* --- a/arch/x86/kernel/cpu/zhaoxin.c +++ b/arch/x86/kernel/cpu/zhaoxin.c @@ -65,20 +65,6 @@ static void early_init_zhaoxin(struct cp set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC); } - - if (c->cpuid_level >=3D 0x00000001) { - u32 eax, ebx, ecx, edx; - - cpuid(0x00000001, &eax, &ebx, &ecx, &edx); - /* - * If HTT (EDX[28]) is set EBX[16:23] contain the number of - * apicids which are reserved per package. Store the resulting - * shift value for the package management code. - */ - if (edx & (1U << 28)) - c->x86_coreid_bits =3D get_count_order((ebx >> 16) & 0xff); - } - } =20 static void init_zhaoxin(struct cpuinfo_x86 *c)