From nobody Fri Sep 12 01:36:19 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E10FC001DE for ; Thu, 10 Aug 2023 00:38:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232528AbjHJAiu (ORCPT ); Wed, 9 Aug 2023 20:38:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59346 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231875AbjHJAig (ORCPT ); Wed, 9 Aug 2023 20:38:36 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D5D811BF7; Wed, 9 Aug 2023 17:38:33 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 37A0cOsX014071; Wed, 9 Aug 2023 19:38:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691627904; bh=z4OV57lSCAoQhb85slW8Rs/YcSK/nhWTReFljQynbDc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=LT8jAO5URl0vP9OMVKZ/iA9Jga3Melmm7R2UhLfwXVvlY9kXXhV4okXR70/w1jFI6 4LMwVEMxWsTPVZgUUIhZsbTMZG9G66DenND/aCcYkCHXHARvmQjWL3j+dWxiuGnAIX XhQDvRrFKAz0zTjxl23QJzSlcUV737b3mAdjQW6U= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 37A0cODo015690 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Aug 2023 19:38:24 -0500 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 9 Aug 2023 19:38:23 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 9 Aug 2023 19:38:24 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 37A0cGFE014775; Wed, 9 Aug 2023 19:38:23 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Dhruva Gole CC: , , , Andrew Davis Subject: [PATCH v3 11/13] arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level Date: Wed, 9 Aug 2023 19:38:12 -0500 Message-ID: <20230810003814.85450-12-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230810003814.85450-1-afd@ti.com> References: <20230810003814.85450-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" TSCADC nodes defined in the top-level J721e SoC dtsi files are incomplete and may not be functional unless they are extended with pinmux and/or device information. Disable the TSCADC nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 2 ++ arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 2 ++ arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 2 ++ arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 10 ---------- 4 files changed, 6 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm6= 4/boot/dts/ti/k3-j721e-beagleboneai64.dts index f06e7bda46f01..9f3a809ddf90b 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts @@ -747,6 +747,7 @@ &usb1 { }; =20 &tscadc0 { + status =3D "okay"; /* BBB Header: P9.39, P9.40, P9.37, P9.38, P9.33, P9.36, P9.35 */ adc { ti,adc-channels =3D <0 1 2 3 4 5 6>; @@ -754,6 +755,7 @@ adc { }; =20 &tscadc1 { + status =3D "okay"; /* MCU mikroBUS Header J10.1 - MCU_ADC1_AIN0 */ adc { ti,adc-channels =3D <0>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/a= rm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 824874a7dcb95..fe5207ac7d85d 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -619,12 +619,14 @@ partition@3fe0000 { }; =20 &tscadc0 { + status =3D "okay"; adc { ti,adc-channels =3D <0 1 2 3 4 5 6 7>; }; }; =20 &tscadc1 { + status =3D "okay"; adc { ti,adc-channels =3D <0 1 2 3 4 5 6 7>; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/b= oot/dts/ti/k3-j721e-mcu-wakeup.dtsi index 4d107eee9b341..37a8c80de3bc5 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -411,6 +411,7 @@ tscadc0: tscadc@40200000 { dmas =3D <&main_udmap 0x7400>, <&main_udmap 0x7401>; dma-names =3D "fifo0", "fifo1"; + status =3D "disabled"; =20 adc { #io-channel-cells =3D <1>; @@ -430,6 +431,7 @@ tscadc1: tscadc@40210000 { dmas =3D <&main_udmap 0x7402>, <&main_udmap 0x7403>; dma-names =3D "fifo0", "fifo1"; + status =3D "disabled"; =20 adc { #io-channel-cells =3D <1>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/t= i/k3-j721e-sk.dts index ed4994d264f26..4032601fd53fa 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -828,16 +828,6 @@ &usb1 { phy-names =3D "cdns3,usb3-phy"; }; =20 -&tscadc0 { - /* Unused */ - status =3D "disabled"; -}; - -&tscadc1 { - /* Unused */ - status =3D "disabled"; -}; - &mcu_cpsw { pinctrl-names =3D "default"; pinctrl-0 =3D <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; --=20 2.39.2