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[107.15.246.199]) by smtp.gmail.com with ESMTPSA id x13-20020a0ce24d000000b0063d31b493e1sm69098qvl.99.2023.08.09.17.32.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Aug 2023 17:32:14 -0700 (PDT) From: John Clark To: "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Heiko Stuebner" , linux-rockchip@lists.infradead.org Cc: "Thomas McKahan" , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, John Clark Subject: [PATCH] arm64: dts: rockchip: Add NanoPC T6 PCIe Ethernet support Date: Thu, 10 Aug 2023 00:31:56 +0000 Message-Id: <20230810003156.22123-1-inindev@gmail.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Device tree entries for PCIe 2.5G Ethernet NICs Signed-off-by: John Clark --- .../boot/dts/rockchip/rk3588-nanopc-t6.dts | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64= /boot/dts/rockchip/rk3588-nanopc-t6.dts index cec126a77111..0bd80e515754 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts @@ -115,6 +115,16 @@ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { vin-supply =3D <&vcc4v0_sys>; }; =20 + vcc_3v3_pcie20: vcc3v3-pcie20-regulator { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_3v3_pcie20"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_3v3_s3>; + }; + vbus5v0_typec: vbus5v0-typec-regulator { compatible =3D "regulator-fixed"; enable-active-high; @@ -140,6 +150,18 @@ vcc3v3_pcie30: vcc3v3-pcie30-regulator { }; }; =20 +&combphy0_ps { + status =3D "okay"; +}; + +&combphy1_ps { + status =3D "okay"; +}; + +&combphy2_psu { + status =3D "okay"; +}; + &cpu_l0 { cpu-supply =3D <&vdd_cpu_lit_s0>; }; @@ -391,6 +413,22 @@ i2s0_8ch_p0_0: endpoint { }; }; =20 +&pcie2x1l0 { + reset-gpios =3D <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply =3D <&vcc_3v3_pcie20>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie2_0_rst>; + status =3D "okay"; +}; + +&pcie2x1l2 { + reset-gpios =3D <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply =3D <&vcc_3v3_pcie20>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie2_2_rst>; + status =3D "okay"; +}; + &pcie30phy { status =3D "okay"; }; @@ -425,6 +463,14 @@ hym8563_int: hym8563-int { }; =20 pcie { + pcie2_0_rst: pcie2-0-rst { + rockchip,pins =3D <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie2_2_rst: pcie2-2-rst { + rockchip,pins =3D <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + pcie_m2_0_pwren: pcie-m20-pwren { rockchip,pins =3D <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; }; --=20 2.40.1