From nobody Fri Sep 12 01:22:00 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDEA1C04A94 for ; Tue, 8 Aug 2023 18:57:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231592AbjHHS5Y (ORCPT ); Tue, 8 Aug 2023 14:57:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231418AbjHHS4r (ORCPT ); Tue, 8 Aug 2023 14:56:47 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E2021D043 for ; Tue, 8 Aug 2023 10:15:37 -0700 (PDT) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-585f254c41aso69438487b3.1 for ; Tue, 08 Aug 2023 10:15:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1691514936; x=1692119736; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=oeLSMOOGvL9cO3G8G5G5v8LLBetvrU+vq+cAagyUyl8=; b=njzC62ovLLfM2KxOGhwyeZ8Qka978mzw0kBCsOl1hL2xkVyqyFT2ivyrjY+v4/5KHb RaSJFTGmWLuNpAev2OAHSfd+a5jG6kZGOQmRj7m/w1WAT129c9IIEkvP4K3f6ZQd7QTJ MPvs4HcDv4e7Hn52LQxS7zlw9T2pFmV5aps0z74KRuQmefy62CCE28TS2jmozF32gIfz 1A+TDvawajYrLI/KtknfJkDFhA8Qp/XP+zu8Ol76lj/TVXilNH6XTpQeIhqfBJCamaTf oLdQ/0LXTgdHc/8cbV0xNZgt7/vgYN9SKl6hgfrkyiXjvVTMTQ9BU+8NFAU96J3WjN4C fQMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691514936; x=1692119736; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=oeLSMOOGvL9cO3G8G5G5v8LLBetvrU+vq+cAagyUyl8=; b=GxllE02Y387Lhqj19DRnHCSli7N1hXsRoiLBUmec9FhFRpRyPUmytHuEIU51Xl3ZDe 9LSTZ0If6CfCIkpWs7Xkv5goWHnXc8llEYtdcoddBICdtMHCO5U33nmdaZ2m7J7oENAd 2WyGNRE5gKA+0gZt+/0H0LAZRfdUVFljBrpEoPhP3nnIFrIWdBJk7/5vrJOrLYv+cwnC LZBYtr8q1OI7eUkhDkAyBuPAXzKQRMhMTiuM4V8xU+7mYBIX6dR3wgA6VnV6dJBe5ZOm oOGIilffNAlQClb8K4KC7ypAu8KB1MbtMxBry2axmShgEEtpcIKf9blE++ZvS0KzxMAY X4hA== X-Gm-Message-State: AOJu0Yw6yg4pJPbiRypSBssbrBmwDA8BfrMREJgfFth64bhMbS4m0WxG I0mB5TUZgxzkaslmnIwCGyD3ltkvSJVC X-Google-Smtp-Source: AGHT+IEltyUMOjx4CqY3It2Vu3ogrRSkm9aKOByuvAMMav1KZjJ5jW4KHWKVXTd7SskTfZ37E4b6sPNIVOKS X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:986a:71d7:3b1e:ac1d]) (user=mshavit job=sendgmr) by 2002:a81:ac66:0:b0:583:529d:1b9d with SMTP id z38-20020a81ac66000000b00583529d1b9dmr4111ywj.5.1691514936613; Tue, 08 Aug 2023 10:15:36 -0700 (PDT) Date: Wed, 9 Aug 2023 01:12:05 +0800 In-Reply-To: <20230808171446.2187795-1-mshavit@google.com> Mime-Version: 1.0 References: <20230808171446.2187795-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.640.ga95def55d0-goog Message-ID: <20230809011204.v5.9.I5ee79793b444ddb933e8bc1eb7b77e728d7f8350@changeid> Subject: [PATCH v5 9/9] iommu/arm-smmu-v3: Rename cdcfg to cd_table From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, robin.murphy@arm.com, nicolinc@nvidia.com, jgg@nvidia.com, jean-philippe@linaro.org, Michael Shavit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" cdcfg is a confusing name, especially given other variables with the cfg suffix in this driver. cd_table more clearly describes what is being operated on. Reviewed-by: Jason Gunthorpe Reviewed-by: Nicolin Chen Signed-off-by: Michael Shavit --- (no changes since v3) Changes in v3: - Commit message update Changes in v2: - New commit drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 66 ++++++++++----------- 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 488d12dd2d4aa..e29e548776c1d 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1028,18 +1028,18 @@ static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_= master *master, u32 ssid) unsigned int idx; struct arm_smmu_l1_ctx_desc *l1_desc; struct arm_smmu_device *smmu =3D master->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg =3D &master->cd_table; + struct arm_smmu_ctx_desc_cfg *cd_table =3D &master->cd_table; =20 - if (!cdcfg->l1_desc) - return cdcfg->cdtab + ssid * CTXDESC_CD_DWORDS; + if (!cd_table->l1_desc) + return cd_table->cdtab + ssid * CTXDESC_CD_DWORDS; =20 idx =3D ssid >> CTXDESC_SPLIT; - l1_desc =3D &cdcfg->l1_desc[idx]; + l1_desc =3D &cd_table->l1_desc[idx]; if (!l1_desc->l2ptr) { if (arm_smmu_alloc_cd_leaf_table(smmu, l1_desc)) return NULL; =20 - l1ptr =3D cdcfg->cdtab + idx * CTXDESC_L1_DESC_DWORDS; + l1ptr =3D cd_table->cdtab + idx * CTXDESC_L1_DESC_DWORDS; arm_smmu_write_cd_l1_desc(l1ptr, l1_desc); /* An invalid L1CD can be cached */ arm_smmu_sync_cd(master, ssid, false); @@ -1134,33 +1134,33 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu= _master *master) size_t l1size; size_t max_contexts; struct arm_smmu_device *smmu =3D master->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg =3D &master->cd_table; + struct arm_smmu_ctx_desc_cfg *cd_table =3D &master->cd_table; =20 - cdcfg->stall_enabled =3D master->stall_enabled; - cdcfg->max_cds_bits =3D master->ssid_bits; - max_contexts =3D 1 << cdcfg->max_cds_bits; + cd_table->stall_enabled =3D master->stall_enabled; + cd_table->max_cds_bits =3D master->ssid_bits; + max_contexts =3D 1 << cd_table->max_cds_bits; =20 if (!(smmu->features & ARM_SMMU_FEAT_2_LVL_CDTAB) || max_contexts <=3D CTXDESC_L2_ENTRIES) { - cdcfg->num_l1_ents =3D max_contexts; + cd_table->num_l1_ents =3D max_contexts; =20 l1size =3D max_contexts * (CTXDESC_CD_DWORDS << 3); } else { - cdcfg->num_l1_ents =3D DIV_ROUND_UP(max_contexts, + cd_table->num_l1_ents =3D DIV_ROUND_UP(max_contexts, CTXDESC_L2_ENTRIES); =20 - cdcfg->l1_desc =3D devm_kcalloc(smmu->dev, cdcfg->num_l1_ents, - sizeof(*cdcfg->l1_desc), + cd_table->l1_desc =3D devm_kcalloc(smmu->dev, cd_table->num_l1_ents, + sizeof(*cd_table->l1_desc), GFP_KERNEL); - if (!cdcfg->l1_desc) + if (!cd_table->l1_desc) return -ENOMEM; =20 - l1size =3D cdcfg->num_l1_ents * (CTXDESC_L1_DESC_DWORDS << 3); + l1size =3D cd_table->num_l1_ents * (CTXDESC_L1_DESC_DWORDS << 3); } =20 - cdcfg->cdtab =3D dmam_alloc_coherent(smmu->dev, l1size, &cdcfg->cdtab_dma, + cd_table->cdtab =3D dmam_alloc_coherent(smmu->dev, l1size, &cd_table->cdt= ab_dma, GFP_KERNEL); - if (!cdcfg->cdtab) { + if (!cd_table->cdtab) { dev_warn(smmu->dev, "failed to allocate context descriptor\n"); ret =3D -ENOMEM; goto err_free_l1; @@ -1169,9 +1169,9 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_m= aster *master) return 0; =20 err_free_l1: - if (cdcfg->l1_desc) { - devm_kfree(smmu->dev, cdcfg->l1_desc); - cdcfg->l1_desc =3D NULL; + if (cd_table->l1_desc) { + devm_kfree(smmu->dev, cd_table->l1_desc); + cd_table->l1_desc =3D NULL; } return ret; } @@ -1181,30 +1181,30 @@ static void arm_smmu_free_cd_tables(struct arm_smmu= _master *master) int i; size_t size, l1size; struct arm_smmu_device *smmu =3D master->smmu; - struct arm_smmu_ctx_desc_cfg *cdcfg =3D &master->cd_table; + struct arm_smmu_ctx_desc_cfg *cd_table =3D &master->cd_table; =20 - if (cdcfg->l1_desc) { + if (cd_table->l1_desc) { size =3D CTXDESC_L2_ENTRIES * (CTXDESC_CD_DWORDS << 3); =20 - for (i =3D 0; i < cdcfg->num_l1_ents; i++) { - if (!cdcfg->l1_desc[i].l2ptr) + for (i =3D 0; i < cd_table->num_l1_ents; i++) { + if (!cd_table->l1_desc[i].l2ptr) continue; =20 dmam_free_coherent(smmu->dev, size, - cdcfg->l1_desc[i].l2ptr, - cdcfg->l1_desc[i].l2ptr_dma); + cd_table->l1_desc[i].l2ptr, + cd_table->l1_desc[i].l2ptr_dma); } - devm_kfree(smmu->dev, cdcfg->l1_desc); - cdcfg->l1_desc =3D NULL; + devm_kfree(smmu->dev, cd_table->l1_desc); + cd_table->l1_desc =3D NULL; =20 - l1size =3D cdcfg->num_l1_ents * (CTXDESC_L1_DESC_DWORDS << 3); + l1size =3D cd_table->num_l1_ents * (CTXDESC_L1_DESC_DWORDS << 3); } else { - l1size =3D cdcfg->num_l1_ents * (CTXDESC_CD_DWORDS << 3); + l1size =3D cd_table->num_l1_ents * (CTXDESC_CD_DWORDS << 3); } =20 - dmam_free_coherent(smmu->dev, l1size, cdcfg->cdtab, cdcfg->cdtab_dma); - cdcfg->cdtab_dma =3D 0; - cdcfg->cdtab =3D NULL; + dmam_free_coherent(smmu->dev, l1size, cd_table->cdtab, cd_table->cdtab_dm= a); + cd_table->cdtab_dma =3D 0; + cd_table->cdtab =3D NULL; } =20 bool arm_smmu_free_asid(struct arm_smmu_ctx_desc *cd) --=20 2.41.0.640.ga95def55d0-goog