From nobody Fri Dec 19 16:02:41 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6EDD4C001DB for ; Mon, 7 Aug 2023 13:54:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232311AbjHGNyv (ORCPT ); Mon, 7 Aug 2023 09:54:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41262 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234599AbjHGNxk (ORCPT ); Mon, 7 Aug 2023 09:53:40 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6BE391BCB for ; Mon, 7 Aug 2023 06:53:30 -0700 (PDT) Message-ID: <20230807135028.272781311@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1691416408; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=2y86e1A51xAdlHDuJ9fUEP1blarkIhmxyqQLfQd+Qgs=; b=LJCjhhlilULYNiC9ZXNNGMtCE0SZcQiH/MEYuQaWfRqWhLRpDbhwWOLk08s8YvXW2Zycyk 5/y/rcsz5pGZwGI4RfzwkyG9HsVMcj8lVotz7HmCfOed+wDQZ92UkQxEJrJE+ngP2lamEe RfdxCOHIbT00kvt9N90zYPh38xDziVMck/7GpH8F6AlfOfoBtfFqlP1jgkx65mtea7c9UW cunzKO8HhUSRUey9foL+MTw8Ovn91sYodrb10oPgONfjIT7wXju0A2i6Uu3v3U6UWwW4h4 xMj3iY2hJ4PEMuf5d4qjExYGg2x917tjQSIy0WjeGTTix63Wbd8DPyTHj/H74w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1691416408; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=2y86e1A51xAdlHDuJ9fUEP1blarkIhmxyqQLfQd+Qgs=; b=WycnduVW4XP6LfEpzuiNRYbGW8ilR801BFVYjDXAHrck+yUJwntFbihj0CvogBjVfIB3GQ bGXzIJE+isimZCDw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Tom Lendacky , Andrew Cooper , Arjan van de Ven , Huang Rui , Juergen Gross , Dimitri Sivanich , Michael Kelley , Sohil Mehta , K Prateek Nayak , Kan Liang , Zhang Rui , "Paul E. McKenney" , Feng Tang , Andy Shevchenko Subject: [patch 35/53] x86/cpu/topology: Sanitize the APIC admission logic References: <20230807130108.853357011@linutronix.de> MIME-Version: 1.0 Date: Mon, 7 Aug 2023 15:53:28 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move the actually required content of generic_processor_id() into the call sites and use common helper functions for them. This separates the early boot registration and the ACPI hotplug mechanism completely which allows further cleanups and improvements. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/topology.c | 160 +++++++++++++++++------------------- 1 file changed, 78 insertions(+), 82 deletions(-) --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -30,8 +30,10 @@ struct { unsigned int nr_assigned_cpus; unsigned int nr_disabled_cpus; unsigned int nr_rejected_cpus; + u32 boot_cpu_apic_id; } topo_info __read_mostly =3D { .nr_assigned_cpus =3D 1, + .boot_cpu_apic_id =3D BAD_APICID, }; =20 /* @@ -78,78 +80,6 @@ early_initcall(smp_init_primary_thread_m static inline void cpu_mark_primary_thread(unsigned int cpu, unsigned int = apicid) { } #endif =20 -static int topo_lookup_cpuid(u32 apic_id) -{ - int i; - - /* CPU# to APICID mapping is persistent once it is established */ - for (i =3D 0; i < topo_info.nr_assigned_cpus; i++) { - if (cpuid_to_apicid[i] =3D=3D apic_id) - return i; - } - return -ENODEV; -} - -/* - * Should use this API to allocate logical CPU IDs to keep nr_logical_cpui= ds - * and cpuid_to_apicid[] synchronized. - */ -static int allocate_logical_cpuid(u32 apic_id) -{ - int cpu =3D topo_lookup_cpuid(apic_id); - - if (cpu >=3D 0) - return cpu; - - return topo_info.nr_assigned_cpus++; -} - -static void cpu_update_apic(unsigned int cpu, u32 apic_id) -{ -#if defined(CONFIG_SMP) || defined(CONFIG_X86_64) - early_per_cpu(x86_cpu_to_apicid, cpu) =3D apic_id; -#endif - cpuid_to_apicid[cpu] =3D apic_id; - set_cpu_possible(cpu, true); - set_bit(apic_id, phys_cpu_present_map); - set_cpu_present(cpu, true); - - if (system_state !=3D SYSTEM_BOOTING) - cpu_mark_primary_thread(cpu, apic_id); -} - -static int generic_processor_info(int apicid) -{ - int cpu; - - /* The boot CPU must be set before MADT/MPTABLE parsing happens */ - if (cpuid_to_apicid[0] =3D=3D BAD_APICID) - panic("Boot CPU APIC not registered yet\n"); - - if (apicid =3D=3D boot_cpu_physical_apicid) - return 0; - - if (disabled_cpu_apicid =3D=3D apicid) { - int thiscpu =3D topo_info.nr_assigned_cpus + topo_info.nr_disabled_cpus; - - pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n", - thiscpu, apicid); - - topo_info.nr_rejected_cpus++; - return -ENODEV; - } - - if (topo_info.nr_assigned_cpus >=3D nr_cpu_ids) { - pr_warn_once("APIC: CPU limit of %d reached. Ignoring further CPUs\n", n= r_cpu_ids); - topo_info.nr_rejected_cpus++; - return -ENOSPC; - } - - cpu =3D allocate_logical_cpuid(apicid); - cpu_update_apic(cpu, apicid); - return cpu; -} - static int __initdata setup_possible_cpus =3D -1; =20 /* @@ -217,6 +147,43 @@ static int __initdata setup_possible_cpu set_cpu_possible(i, true); } =20 +static int topo_lookup_cpuid(u32 apic_id) +{ + int i; + + /* CPU# to APICID mapping is persistent once it is established */ + for (i =3D 0; i < topo_info.nr_assigned_cpus; i++) { + if (cpuid_to_apicid[i] =3D=3D apic_id) + return i; + } + return -ENODEV; +} + +static int topo_assign_cpunr(u32 apic_id) +{ + int cpu =3D topo_lookup_cpuid(apic_id); + + if (cpu >=3D 0) + return cpu; + + return topo_info.nr_assigned_cpus++; +} + +static void topo_set_cpuids(unsigned int cpu, u32 apic_id, u32 acpi_id) +{ +#if defined(CONFIG_SMP) || defined(CONFIG_X86_64) + early_per_cpu(x86_cpu_to_apicid, cpu) =3D apic_id; + early_per_cpu(x86_cpu_to_acpiid, cpu) =3D acpi_id; +#endif + cpuid_to_apicid[cpu] =3D apic_id; + + set_cpu_possible(cpu, true); + set_cpu_present(cpu, true); + + if (system_state !=3D SYSTEM_BOOTING) + cpu_mark_primary_thread(cpu, apic_id); +} + /** * topology_register_apic - Register an APIC in early topology maps * @apic_id: The APIC ID to set up @@ -229,17 +196,41 @@ void __init topology_register_apic(u32 a =20 if (apic_id >=3D MAX_LOCAL_APIC) { pr_err_once("APIC ID %x exceeds kernel limit of: %x\n", apic_id, MAX_LOC= AL_APIC - 1); + topo_info.nr_rejected_cpus++; return; } =20 - if (!present) { - topo_info.nr_disabled_cpus++; + /* CPU numbers exhausted? */ + if (topo_info.nr_assigned_cpus >=3D nr_cpu_ids) { + pr_warn_once("CPU limit of %d reached. Ignoring further CPUs\n", nr_cpu_= ids); + topo_info.nr_rejected_cpus++; return; } =20 - cpu =3D generic_processor_info(apic_id); - if (cpu >=3D 0) - early_per_cpu(x86_cpu_to_acpiid, cpu) =3D acpi_id; + if (disabled_cpu_apicid =3D=3D apic_id) { + pr_info("Disabling CPU as requested via 'disable_cpu_apicid=3D0x%x'.\n",= apic_id); + topo_info.nr_rejected_cpus++; + return; + } + + if (present) { + /* + * Prevent double registration, which is valid in case of + * the boot CPU APIC because that is registered before the + * enumeration of the APICs via firmware parsers or VM + * guest mechanisms. + */ + if (test_and_set_bit(apic_id, phys_cpu_present_map)) + return; + + if (apic_id =3D=3D topo_info.boot_cpu_apic_id) + cpu =3D 0; + else + cpu =3D topo_assign_cpunr(apic_id); + topo_set_cpuids(cpu, apic_id, acpi_id); + } else { + topo_info.nr_disabled_cpus++; + } } =20 /** @@ -250,8 +241,10 @@ void __init topology_register_apic(u32 a */ void __init topology_register_boot_apic(u32 apic_id) { - cpuid_to_apicid[0] =3D apic_id; - cpu_update_apic(0, apic_id); + WARN_ON_ONCE(topo_info.boot_cpu_apic_id !=3D BAD_APICID); + + topo_info.boot_cpu_apic_id =3D apic_id; + topology_register_apic(apic_id, CPU_ACPIID_INVALID, true); } =20 #ifdef CONFIG_ACPI_HOTPLUG_CPU @@ -269,10 +262,13 @@ int topology_hotplug_apic(u32 apic_id, u =20 cpu =3D topo_lookup_cpuid(apic_id); if (cpu < 0) { - cpu =3D generic_processor_info(apic_id); - if (cpu >=3D 0) - per_cpu(x86_cpu_to_acpiid, cpu) =3D acpi_id; + if (topo_info.nr_assigned_cpus >=3D nr_cpu_ids) + return -ENOSPC; + + cpu =3D topo_assign_cpunr(apic_id); } + set_bit(apic_id, phys_cpu_present_map); + topo_set_cpuids(cpu, apic_id, acpi_id); return cpu; }