From nobody Fri Dec 19 16:03:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B0BAC41513 for ; Mon, 7 Aug 2023 13:54:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234548AbjHGNyb (ORCPT ); Mon, 7 Aug 2023 09:54:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41470 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234536AbjHGNx1 (ORCPT ); Mon, 7 Aug 2023 09:53:27 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3419E92 for ; Mon, 7 Aug 2023 06:53:19 -0700 (PDT) Message-ID: <20230807135027.900644907@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1691416397; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=Fs46OBe57ed0poZNxJMiXrzfary3Rr7oc4qtsgbrZ88=; b=E3PhyayB0rz1Jvqgj8eCacG0GKqZgtdcsSRnrUvhwGg5GrFidqGHXLk42wNvc9rt7DQPkm woXfN+3t5KyGhNa5uQZ490XFzyTQ5xdC7F5KEAtIEC7tYhBo0WQwrydCtE4PcpRZ/Bcq56 SC/ksjaH4I+GQ7goNa9qjiVnP1ebO1j2B1M22963EZm6WsX4zbjDfj/07NuLGLHZH068h7 qqyw5EhQMdeS/e5DU1Q16L0tUFhk+tS6EL1JinTPXgIYj+J1gh0wKNyLj7029/LDRyRN1M vCPhBLdQqAfX+Ysmx1o4lk4XwLDDVjmY04YQjvy3mebD46SaYoo8HWd+E/YwTg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1691416397; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=Fs46OBe57ed0poZNxJMiXrzfary3Rr7oc4qtsgbrZ88=; b=8WKUlQ12W3KaxWZMVFzvM843Twl4ANWZZTcDYhUYDA7sM6BB/6G1iGABZh8ySwfVb/yQjI DKO+q5q6M6uUKfBw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Tom Lendacky , Andrew Cooper , Arjan van de Ven , Huang Rui , Juergen Gross , Dimitri Sivanich , Michael Kelley , Sohil Mehta , K Prateek Nayak , Kan Liang , Zhang Rui , "Paul E. McKenney" , Feng Tang , Andy Shevchenko Subject: [patch 28/53] x86/mpparse: Use new APIC registration function References: <20230807130108.853357011@linutronix.de> MIME-Version: 1.0 Date: Mon, 7 Aug 2023 15:53:17 +0200 (CEST) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Aside of switching over to the new interface, record the number of registered CPUs locally, which allows to make num_processors and disabled_cpus confined to the topology code. No functional change intended. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/mpspec.h | 2 -- arch/x86/kernel/cpu/topology.c | 2 +- arch/x86/kernel/mpparse.c | 21 ++++++++++----------- 3 files changed, 11 insertions(+), 14 deletions(-) --- a/arch/x86/include/asm/mpspec.h +++ b/arch/x86/include/asm/mpspec.h @@ -61,8 +61,6 @@ static inline void e820__memblock_alloc_ #define mpparse_parse_smp_config x86_init_noop #endif =20 -int generic_processor_info(int apicid); - extern DECLARE_BITMAP(phys_cpu_present_map, MAX_LOCAL_APIC); =20 static inline void reset_phys_cpu_present_map(u32 apicid) --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -128,7 +128,7 @@ static void cpu_update_apic(int cpu, u32 cpu_mark_primary_thread(cpu, apicid); } =20 -int generic_processor_info(int apicid) +static int generic_processor_info(int apicid) { int cpu, max =3D nr_cpu_ids; =20 --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c @@ -36,6 +36,8 @@ * Checksum an MP configuration block. */ =20 +static unsigned int num_procs __initdata; + static int __init mpf_checksum(unsigned char *mp, int len) { int sum =3D 0; @@ -48,21 +50,18 @@ static int __init mpf_checksum(unsigned =20 static void __init MP_processor_info(struct mpc_cpu *m) { - int apicid; char *bootup_cpu =3D ""; =20 - if (!(m->cpuflag & CPU_ENABLED)) { - disabled_cpus++; - return; - } + topology_register_apic(m->apicid, CPU_ACPIID_INVALID, m->cpuflag & CPU_EN= ABLED); =20 - apicid =3D m->apicid; + if (!(m->cpuflag & CPU_ENABLED)) + return; =20 if (m->cpuflag & CPU_BOOTPROCESSOR) bootup_cpu =3D " (Bootup-CPU)"; =20 pr_info("Processor #%d%s\n", m->apicid, bootup_cpu); - generic_processor_info(apicid); + num_procs++; } =20 #ifdef CONFIG_X86_IO_APIC @@ -239,9 +238,9 @@ static int __init smp_read_mpc(struct mp } } =20 - if (!num_processors) + if (!num_procs && !acpi_lapic) pr_err("MPTABLE: no processors registered!\n"); - return num_processors; + return num_procs || acpi_lapic; } =20 #ifdef CONFIG_X86_IO_APIC @@ -532,8 +531,8 @@ static __init void mpparse_get_smp_confi } else BUG(); =20 - if (!early) - pr_info("Processors: %d\n", num_processors); + if (!early && !acpi_lapic) + pr_info("Processors: %d\n", num_procs); /* * Only use the first configuration found. */