From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8AE3EE49A8 for ; Tue, 22 Aug 2023 07:09:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233200AbjHVHJn (ORCPT ); Tue, 22 Aug 2023 03:09:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41736 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233190AbjHVHJl (ORCPT ); Tue, 22 Aug 2023 03:09:41 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C72A130 for ; Tue, 22 Aug 2023 00:09:39 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 27C9B649D9 for ; Tue, 22 Aug 2023 07:09:39 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EB24EC433C8; Tue, 22 Aug 2023 07:09:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688178; bh=BtFMSSMS+Ge1Ld7dIKb08UtH8RdD+UZ/1ZtM9xiCV4U=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=u0Ol46gEyBfiDsoZFjf0xjhLBjciINSBkapT8D+OLIMHq0jFpBUh/F3NdYHfjHCTq FYzFCw55NrCB7ZHgGqwiC6IXGzaFBqU8NgmeC2e8WnUUcKYyUUdnAv2rOOIl9xptLu NApEGphJdDxQMgyQl4OHCFZ6czMBW4F5Ey2fzmPWLXOA1SfW9VdlZPLrqXBaD10kAh TdyznxQuHDdT0dTvHxr+cpA75Gwyy+x6kNrBqRoTNpSxgkl89UC/cg5iPR7bIvSl1f Lk3KmfZer6CVsjOSliNtFU1HuVZSf3F6E/OGtaZG3Melp48px7UWABWxvw+I1M5en4 d2XoZpSxbQBGw== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:17 +0200 Subject: [PATCH v2 01/41] mtd: spi-nor: remove catalyst 'flashes' MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-1-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org CAT25xx are actually EEPROMs manufactured by Catalyst. The devices are ancient (DS are from 1998), there are not in-tree users, nor are there any device tree bindings. Remove it. The correct driver is the at25. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/Makefile | 1 - drivers/mtd/spi-nor/catalyst.c | 24 ------------------------ drivers/mtd/spi-nor/core.c | 1 - drivers/mtd/spi-nor/core.h | 1 - 4 files changed, 27 deletions(-) diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e347b435a038..496dae9ca0f3 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -2,7 +2,6 @@ =20 spi-nor-objs :=3D core.o sfdp.o swp.o otp.o sysfs.o spi-nor-objs +=3D atmel.o -spi-nor-objs +=3D catalyst.o spi-nor-objs +=3D eon.o spi-nor-objs +=3D esmt.o spi-nor-objs +=3D everspin.o diff --git a/drivers/mtd/spi-nor/catalyst.c b/drivers/mtd/spi-nor/catalyst.c deleted file mode 100644 index 6d310815fb12..000000000000 --- a/drivers/mtd/spi-nor/catalyst.c +++ /dev/null @@ -1,24 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (C) 2005, Intec Automation Inc. - * Copyright (C) 2014, Freescale Semiconductor, Inc. - */ - -#include - -#include "core.h" - -static const struct flash_info catalyst_nor_parts[] =3D { - /* Catalyst / On Semiconductor -- non-JEDEC */ - { "cat25c11", CAT25_INFO(16, 8, 16, 1) }, - { "cat25c03", CAT25_INFO(32, 8, 16, 2) }, - { "cat25c09", CAT25_INFO(128, 8, 32, 2) }, - { "cat25c17", CAT25_INFO(256, 8, 32, 2) }, - { "cat25128", CAT25_INFO(2048, 8, 64, 2) }, -}; - -const struct spi_nor_manufacturer spi_nor_catalyst =3D { - .name =3D "catalyst", - .parts =3D catalyst_nor_parts, - .nparts =3D ARRAY_SIZE(catalyst_nor_parts), -}; diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 1b0c6770c14e..c44de69c4353 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -1999,7 +1999,6 @@ int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor) =20 static const struct spi_nor_manufacturer *manufacturers[] =3D { &spi_nor_atmel, - &spi_nor_catalyst, &spi_nor_eon, &spi_nor_esmt, &spi_nor_everspin, diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 9217379b9cfe..6d31af6c39ed 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -631,7 +631,6 @@ struct sfdp { =20 /* Manufacturer drivers. */ extern const struct spi_nor_manufacturer spi_nor_atmel; -extern const struct spi_nor_manufacturer spi_nor_catalyst; extern const struct spi_nor_manufacturer spi_nor_eon; extern const struct spi_nor_manufacturer spi_nor_esmt; extern const struct spi_nor_manufacturer spi_nor_everspin; --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC8DBEE49A3 for ; Tue, 22 Aug 2023 07:09:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233202AbjHVHJv (ORCPT ); Tue, 22 Aug 2023 03:09:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41738 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233197AbjHVHJn (ORCPT ); Tue, 22 Aug 2023 03:09:43 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F432130 for ; Tue, 22 Aug 2023 00:09:41 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 2AB8F63DA4 for ; Tue, 22 Aug 2023 07:09:41 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E254DC433CB; Tue, 22 Aug 2023 07:09:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688180; bh=c/YUDEImvGBPGu1w7v7S2H4wM+XOOkWFgbu7J+r0IB4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=kxw4iepq2kMmcPeZL4bDGlKpzuL/qBwEJnOP6pmJ5Yo/8tXsD/kFIGeocLtUf7+Pj n7v1WxkmKkl0wa4pOqoHRJDPMpOR0z50wMhGUlZH2WkSiEghvhAYTerjwm4i7CSCn9 iJifgt4A9WRPNTpnBLTxtuaCnuRriqrIUJvsTnPbE4e2pHNZSPqlsXr0AEhwBtQbnY WtkAp8+VGNnmYLhuNtqdkvBcxzC4gW1Hzoc1E+UIZlhVrnJx/azaz4md/VLkP9ca2z koksrBYaePQKo9c/Cw6iN3tMi32Le44MiJINSvIskLWHmLNzmWocL64vwskiQEK2cp NLgZAAXGJVT/A== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:18 +0200 Subject: [PATCH v2 02/41] mtd: spi-nor: remove Fujitsu MB85RS1MT support MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-2-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This part is not a flash but an EEPROM like FRAM. It is even has a DT binding for the (correct) driver (at25), see Documentation/devicetree/bindings/eeprom/at25.yaml. Just remove it. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/Makefile | 1 - drivers/mtd/spi-nor/core.c | 1 - drivers/mtd/spi-nor/core.h | 1 - drivers/mtd/spi-nor/fujitsu.c | 21 --------------------- 4 files changed, 24 deletions(-) diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index 496dae9ca0f3..5e68468b72fc 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -5,7 +5,6 @@ spi-nor-objs +=3D atmel.o spi-nor-objs +=3D eon.o spi-nor-objs +=3D esmt.o spi-nor-objs +=3D everspin.o -spi-nor-objs +=3D fujitsu.o spi-nor-objs +=3D gigadevice.o spi-nor-objs +=3D intel.o spi-nor-objs +=3D issi.o diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index c44de69c4353..286155002cdc 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2002,7 +2002,6 @@ static const struct spi_nor_manufacturer *manufacture= rs[] =3D { &spi_nor_eon, &spi_nor_esmt, &spi_nor_everspin, - &spi_nor_fujitsu, &spi_nor_gigadevice, &spi_nor_intel, &spi_nor_issi, diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 6d31af6c39ed..dfc20a3296fb 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -634,7 +634,6 @@ extern const struct spi_nor_manufacturer spi_nor_atmel; extern const struct spi_nor_manufacturer spi_nor_eon; extern const struct spi_nor_manufacturer spi_nor_esmt; extern const struct spi_nor_manufacturer spi_nor_everspin; -extern const struct spi_nor_manufacturer spi_nor_fujitsu; extern const struct spi_nor_manufacturer spi_nor_gigadevice; extern const struct spi_nor_manufacturer spi_nor_intel; extern const struct spi_nor_manufacturer spi_nor_issi; diff --git a/drivers/mtd/spi-nor/fujitsu.c b/drivers/mtd/spi-nor/fujitsu.c deleted file mode 100644 index 69cffc5c73ef..000000000000 --- a/drivers/mtd/spi-nor/fujitsu.c +++ /dev/null @@ -1,21 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (C) 2005, Intec Automation Inc. - * Copyright (C) 2014, Freescale Semiconductor, Inc. - */ - -#include - -#include "core.h" - -static const struct flash_info fujitsu_nor_parts[] =3D { - /* Fujitsu */ - { "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1) - FLAGS(SPI_NOR_NO_ERASE) }, -}; - -const struct spi_nor_manufacturer spi_nor_fujitsu =3D { - .name =3D "fujitsu", - .parts =3D fujitsu_nor_parts, - .nparts =3D ARRAY_SIZE(fujitsu_nor_parts), -}; --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38696EE49A5 for ; Tue, 22 Aug 2023 07:09:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233197AbjHVHJy (ORCPT ); Tue, 22 Aug 2023 03:09:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233190AbjHVHJp (ORCPT ); Tue, 22 Aug 2023 03:09:45 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9611219E for ; Tue, 22 Aug 2023 00:09:43 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 2FD6664CC7 for ; Tue, 22 Aug 2023 07:09:43 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E0FF4C433C8; Tue, 22 Aug 2023 07:09:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688182; bh=yto9V/zcEZBJmLMoKJpHfJ7xX1RdTjUYPmlgcSHSm3Y=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=XcByFBx9BxiDHx0SrX6nTwNSxcYdjeo9UltySMbXGY707cFzznvdcs8Oy8DbPPO5Y TKu005fIxvsutMN902ugXc1x127/6zsfghqtUDov+klcLahpzNrsa+fHGWX9NEO8ao XP/SjtR50QoSeVvNqF1Qnvwo+Lwipledr52NjDR589DgJ+Lfb4FjtuRO3AHUQ13HSL ED6JXjS9jshKbtJunlwRmXVMkYO2iCLFMQ/o3dzRgL9NhMnT79o7vWCzJFH2FyCFnd OlIHgy/nW8kYL7DNgNFuIo/QKfjwZ1PPDMY2qKiU+OgNlu/TRavJHggLCpVeM+INJb n0EMFSP6lF4GQ== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:19 +0200 Subject: [PATCH v2 03/41] mtd: spi-nor: xilinx: use SPI_NOR_ID() in S3AN_INFO() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-3-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In commit 59273180299a ("mtd: spi-nor: Create macros to define chip IDs and geometries") SPI_NOR_ID() were introduced, but it did only update the INFO() macro in core.h. Also use it in S3AN_INFO(). Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/xilinx.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 00d53eae5ee8..de5189c38432 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -22,12 +22,7 @@ SPI_MEM_OP_DATA_IN(1, buf, 0)) =20 #define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \ - .id =3D { \ - ((_jedec_id) >> 16) & 0xff, \ - ((_jedec_id) >> 8) & 0xff, \ - (_jedec_id) & 0xff \ - }, \ - .id_len =3D 3, \ + SPI_NOR_ID(_jedec_id, 0), \ .sector_size =3D (8 * (_page_size)), \ .n_sectors =3D (_n_sectors), \ .page_size =3D (_page_size), \ --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0AA35EE49AB for ; Tue, 22 Aug 2023 07:09:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233225AbjHVHJ4 (ORCPT ); Tue, 22 Aug 2023 03:09:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41812 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233217AbjHVHJt (ORCPT ); Tue, 22 Aug 2023 03:09:49 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97D731B9 for ; Tue, 22 Aug 2023 00:09:45 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 283DE64CC7 for ; Tue, 22 Aug 2023 07:09:45 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D7EABC433CA; Tue, 22 Aug 2023 07:09:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688184; bh=i6brw9U/L+6pC4Q/XEJT9zKna/1DXXdaKKQQ6GTutFM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Epky7sjU03u8qG5ooC0OUo1BiWpd6WDMOMD3OAAfBbEqgWZKtCt6tg/d5WxUXt4ap fG8BVwxNEq7WEjzH2Rm407aJQAwZIBJKbtulyt+uRBkNwBrdMSdQ71ne6mIPI4nNQQ wyZySaA38GCR3a1ViegVv3InZhpAzPpjKLxnF+XiGZrl+AjMZNoE74wG18K9LA1gQ5 atqzzy4s/GXJIWPibwBJI00bZAXO1zbYaUQtCP0MCUPNWp6tnW44Xxw/eHUavuJ0y4 dxaxSf3POYrhNoCvFTPblALI+97VhESjU4Wlf/fO4s6uB4TYh5gx+1xxOGqwltu9Jl OZQjDcPjFzEcQ== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:20 +0200 Subject: [PATCH v2 04/41] mtd: spi-nor: xilinx: remove addr_nbytes from S3AN_INFO() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-4-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The default value of addr_nbytes is already 3. Drop it. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/xilinx.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index de5189c38432..34267591282c 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -27,7 +27,6 @@ .n_sectors =3D (_n_sectors), \ .page_size =3D (_page_size), \ .n_banks =3D 1, \ - .addr_nbytes =3D 3, \ .flags =3D SPI_NOR_NO_FR =20 /* Xilinx S3AN share MFR with Atmel SPI NOR */ --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF375EE49B2 for ; Tue, 22 Aug 2023 07:09:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233241AbjHVHJ6 (ORCPT ); Tue, 22 Aug 2023 03:09:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233234AbjHVHJu (ORCPT ); Tue, 22 Aug 2023 03:09:50 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A07D9CD4 for ; Tue, 22 Aug 2023 00:09:47 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 35D96649D9 for ; Tue, 22 Aug 2023 07:09:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CEF3FC433CC; Tue, 22 Aug 2023 07:09:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688186; bh=FEz+x044HaJXIEP12prthCCwYdEPCM16pe3GigXUbHQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=JWyCxz8JTz1AlvMZRRrbhgZttEfqaIvq7ONiuvSFtykGBos/XatVt2eJEAVZH+04o byWQyHE9X/t+rdF0vW2T71GvuREtPxpkLhthdXy8XqkgBeoD8suLuDS4eCT393RFd3 TYa4J1LJbwdO80pz8J8TyoRFNgp016K4d2DPLfyCW3nouwTV+eR4dVCECeNCRaRdst OjNJY7MgDNKJ6CE1dCduK+ocUN1Au2Ho8E9ZQ2ZWRopm09I0Wgn2UTRTwAoWZ5GOFj tRCzcxZl4XvCdGXPzacC/G6bPZkL6Xq7uqoFnrXTKUCSMj4h8uYIsPbv/BKlgCamIx 3Sn0E1+Yn+iaQ== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:21 +0200 Subject: [PATCH v2 05/41] mtd: spi-nor: convert .n_sectors to .size MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-5-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org .n_sectors is rarely used. In fact it is only used in swp.c and to calculate the flash size in the core. The use in swp.c might be converted to use the (largest) flash erase size. For now, we just locally calculate the sector size. Simplify the flash_info database and set the size of the flash directly. This also let us use the SZ_x macros. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.c | 2 +- drivers/mtd/spi-nor/core.h | 8 ++++---- drivers/mtd/spi-nor/swp.c | 9 +++++---- drivers/mtd/spi-nor/xilinx.c | 4 ++-- 4 files changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 286155002cdc..f4cc2eafcc5e 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2999,7 +2999,7 @@ static void spi_nor_init_default_params(struct spi_no= r *nor) =20 /* Set SPI NOR sizes. */ params->writesize =3D 1; - params->size =3D (u64)info->sector_size * info->n_sectors; + params->size =3D info->size; params->bank_size =3D params->size; params->page_size =3D info->page_size; =20 diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index dfc20a3296fb..12c35409493b 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -443,9 +443,9 @@ struct spi_nor_fixups { * @id: the flash's ID bytes. The first three bytes are the * JEDIC ID. JEDEC ID zero means "no ID" (mostly older ch= ips). * @id_len: the number of bytes of ID. + * @size: the size of the flash in bytes. * @sector_size: the size listed here is what works with SPINOR_OP_SE, = which * isn't necessarily called a "sector" by the vendor. - * @n_sectors: the number of sectors. * @n_banks: the number of banks. * @page_size: the flash's page size. * @addr_nbytes: number of address bytes to send. @@ -505,8 +505,8 @@ struct flash_info { char *name; u8 id[SPI_NOR_MAX_ID_LEN]; u8 id_len; + size_t size; unsigned sector_size; - u16 n_sectors; u16 page_size; u8 n_banks; u8 addr_nbytes; @@ -556,8 +556,8 @@ struct flash_info { .id_len =3D 6 =20 #define SPI_NOR_GEOMETRY(_sector_size, _n_sectors, _n_banks) \ + .size =3D (_sector_size) * (_n_sectors), \ .sector_size =3D (_sector_size), \ - .n_sectors =3D (_n_sectors), \ .page_size =3D 256, \ .n_banks =3D (_n_banks) =20 @@ -575,8 +575,8 @@ struct flash_info { SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 1), =20 #define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_nbytes) \ + .size =3D (_sector_size) * (_n_sectors), \ .sector_size =3D (_sector_size), \ - .n_sectors =3D (_n_sectors), \ .page_size =3D (_page_size), \ .n_banks =3D 1, \ .addr_nbytes =3D (_addr_nbytes), \ diff --git a/drivers/mtd/spi-nor/swp.c b/drivers/mtd/spi-nor/swp.c index 5ab9d5324860..40bf52867095 100644 --- a/drivers/mtd/spi-nor/swp.c +++ b/drivers/mtd/spi-nor/swp.c @@ -34,17 +34,18 @@ static u8 spi_nor_get_sr_tb_mask(struct spi_nor *nor) static u64 spi_nor_get_min_prot_length_sr(struct spi_nor *nor) { unsigned int bp_slots, bp_slots_needed; + unsigned int sector_size =3D nor->info->sector_size; + u64 n_sectors =3D div_u64(nor->params->size, sector_size); u8 mask =3D spi_nor_get_sr_bp_mask(nor); =20 /* Reserved one for "protect none" and one for "protect all". */ bp_slots =3D (1 << hweight8(mask)) - 2; - bp_slots_needed =3D ilog2(nor->info->n_sectors); + bp_slots_needed =3D ilog2(n_sectors); =20 if (bp_slots_needed > bp_slots) - return nor->info->sector_size << - (bp_slots_needed - bp_slots); + return sector_size << (bp_slots_needed - bp_slots); else - return nor->info->sector_size; + return sector_size; } =20 static void spi_nor_get_locked_range_sr(struct spi_nor *nor, u8 sr, loff_t= *ofs, diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 34267591282c..284e2e4970ab 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -23,8 +23,8 @@ =20 #define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \ SPI_NOR_ID(_jedec_id, 0), \ + .size =3D 8 * (_page_size) * (_n_sectors), \ .sector_size =3D (8 * (_page_size)), \ - .n_sectors =3D (_n_sectors), \ .page_size =3D (_page_size), \ .n_banks =3D 1, \ .flags =3D SPI_NOR_NO_FR @@ -138,7 +138,7 @@ static int xilinx_nor_setup(struct spi_nor *nor, page_size =3D (nor->params->page_size =3D=3D 264) ? 256 : 512; nor->params->page_size =3D page_size; nor->mtd.writebufsize =3D page_size; - nor->params->size =3D 8 * page_size * nor->info->n_sectors; + nor->params->size =3D nor->info->size; nor->mtd.erasesize =3D 8 * page_size; } else { /* Flash in Default addressing mode */ --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 812CDEE49A5 for ; Tue, 22 Aug 2023 07:10:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233227AbjHVHKD (ORCPT ); Tue, 22 Aug 2023 03:10:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41798 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233221AbjHVHJy (ORCPT ); Tue, 22 Aug 2023 03:09:54 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 973711AB for ; Tue, 22 Aug 2023 00:09:49 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 2E6CB649DF for ; Tue, 22 Aug 2023 07:09:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DA44AC433C7; Tue, 22 Aug 2023 07:09:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688188; bh=LgVMUtw1CM1hDbEFLUFoQErg4cNgw+t9IA0MTKH/DNQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=jBsWh4AbN5xuoP2VMKu92lKhW32mdi+Sy37q5FxcJXuSONJCFCsZ5jzXbrtcMEXM2 ASWrF2AUDhx6mKaT/5f6q0YPGyqFISys9zjBGBwC6kSr3sK0a/fjbxezqpRXBynHco KGdEuxM5OBY5boVl+ad9CrJTwMbgcInZN+GAGACX0xkk766AiJzoynMNSsjAYVCMok Y+RkoVMxHcP0/w7TU2wXBEyBXdpa4lLRjOn/VJdj9m+5S6CvalHZfzJ1Hqb2kD523f 7A3oapaq/LjPciswfkjTpKitcIRj2qm8xWIisGuwistihrwVHahmxG+OZ5YPx1GHjB ZWxu8aFo4s3wA== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:22 +0200 Subject: [PATCH v2 06/41] mtd: spi-nor: default page_size to 256 bytes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-6-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFO() macro always set the page_size to 256 bytes. Make that an optional parameter. This default is a sane one for all older flashes, newer ones will set the page size by its SFDP tables anyway. Signed-off-by: Michael Walle Reviewed-by: Miquel Raynal --- drivers/mtd/spi-nor/core.c | 7 +------ drivers/mtd/spi-nor/core.h | 8 ++++++-- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index f4cc2eafcc5e..d27ad1295ee0 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2018,11 +2018,6 @@ static const struct spi_nor_manufacturer *manufactur= ers[] =3D { static const struct flash_info spi_nor_generic_flash =3D { .name =3D "spi-nor-generic", .n_banks =3D 1, - /* - * JESD216 rev A doesn't specify the page size, therefore we need a - * sane default. - */ - .page_size =3D 256, .parse_sfdp =3D true, }; =20 @@ -3001,7 +2996,7 @@ static void spi_nor_init_default_params(struct spi_no= r *nor) params->writesize =3D 1; params->size =3D info->size; params->bank_size =3D params->size; - params->page_size =3D info->page_size; + params->page_size =3D info->page_size ?: SPI_NOR_DEFAULT_PAGE_SIZE; =20 if (!(info->flags & SPI_NOR_NO_FR)) { /* Default to Fast Read for DT and non-DT platform devices. */ diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 12c35409493b..25bc18197614 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -10,6 +10,11 @@ #include "sfdp.h" =20 #define SPI_NOR_MAX_ID_LEN 6 +/* + * 256 bytes is a sane default for most older flashes. Newer flashes will + * have the page size defined within their SFDP tables. + */ +#define SPI_NOR_DEFAULT_PAGE_SIZE 256 =20 /* Standard SPI NOR flash operations. */ #define SPI_NOR_READID_OP(naddr, ndummy, buf, len) \ @@ -447,7 +452,7 @@ struct spi_nor_fixups { * @sector_size: the size listed here is what works with SPINOR_OP_SE, = which * isn't necessarily called a "sector" by the vendor. * @n_banks: the number of banks. - * @page_size: the flash's page size. + * @page_size: (optional) the flash's page size. Defaults to 256. * @addr_nbytes: number of address bytes to send. * * @parse_sfdp: true when flash supports SFDP tables. The false value = has no @@ -558,7 +563,6 @@ struct flash_info { #define SPI_NOR_GEOMETRY(_sector_size, _n_sectors, _n_banks) \ .size =3D (_sector_size) * (_n_sectors), \ .sector_size =3D (_sector_size), \ - .page_size =3D 256, \ .n_banks =3D (_n_banks) =20 /* Used when the "_ext_id" is two bytes at most */ --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BCE87EE49A8 for ; Tue, 22 Aug 2023 07:10:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233256AbjHVHKH (ORCPT ); Tue, 22 Aug 2023 03:10:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58506 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233206AbjHVHJ7 (ORCPT ); Tue, 22 Aug 2023 03:09:59 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF102CC7 for ; Tue, 22 Aug 2023 00:09:51 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 3A59164D4C for ; Tue, 22 Aug 2023 07:09:51 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D5360C433CB; Tue, 22 Aug 2023 07:09:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688190; bh=2ZHDvbq3+3zLWqFwJBCT9nsnQo0T+nMGUO9QmyxfUBo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=SAmXAVz6nj0bs8b2qLxVSXEdd2MX/4RP2Ymem5Sq9Lp9T6soqnOby52kDxVxiqy7R mt50w4imKBuCYRrMRYwD5F+zVH4q34tYlrPolxb7mV5Fq2sMY5s5P2pqS/aA5ybpXk wM3PVFIRX3DVfK3bgjvtvelxRUeKy/kG4uNqY8p7EU0s7jDNpEWsRm8azeBfzI8iHq YZ+ToT3ng98XIjC+9rm7J14qKZS3uxQJkIk2o0J8OiyIhV9biakXsIWBFDNr3vhMkg 4RaFjulGPKrTEtp2kkcQ/YTsDCONzVyoGv+YJjLoY1PFLzzUZWvY+uD7cjA0AUIXvK HjV7qp1Dpx1uw== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:23 +0200 Subject: [PATCH v2 07/41] mtd: spi-nor: store .n_banks in struct spi_nor_flash_parameter MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-7-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org First, fixups might want to replace the n_banks parameter, thus we need it in the (writable) parameter struct. Secondly, this way we can have a default in the core and just skip setting the n_banks in the flash_info database. Most of the flashes doesn't have more than one bank. Signed-off-by: Michael Walle Reviewed-by: Miquel Raynal Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/core.c | 7 ++++--- drivers/mtd/spi-nor/core.h | 2 ++ 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index d27ad1295ee0..e27f1323fa0b 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2862,7 +2862,7 @@ static void spi_nor_init_flags(struct spi_nor *nor) if (flags & NO_CHIP_ERASE) nor->flags |=3D SNOR_F_NO_OP_CHIP_ERASE; =20 - if (flags & SPI_NOR_RWW && nor->info->n_banks > 1 && + if (flags & SPI_NOR_RWW && nor->params->n_banks > 1 && !nor->controller_ops) nor->flags |=3D SNOR_F_RWW; } @@ -2926,8 +2926,8 @@ static int spi_nor_late_init_params(struct spi_nor *n= or) if (nor->flags & SNOR_F_HAS_LOCK && !nor->params->locking_ops) spi_nor_init_default_locking_ops(nor); =20 - if (nor->info->n_banks > 1) - params->bank_size =3D div64_u64(params->size, nor->info->n_banks); + if (params->n_banks > 1) + params->bank_size =3D div64_u64(params->size, params->n_banks); =20 return 0; } @@ -2997,6 +2997,7 @@ static void spi_nor_init_default_params(struct spi_no= r *nor) params->size =3D info->size; params->bank_size =3D params->size; params->page_size =3D info->page_size ?: SPI_NOR_DEFAULT_PAGE_SIZE; + params->n_banks =3D info->n_banks; =20 if (!(info->flags & SPI_NOR_NO_FR)) { /* Default to Fast Read for DT and non-DT platform devices. */ diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 25bc18197614..2fc999f2787c 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -358,6 +358,7 @@ struct spi_nor_otp { * in octal DTR mode. * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register * command in octal DTR mode. + * @n_banks: number of banks. * @n_dice: number of dice in the flash memory. * @vreg_offset: volatile register offset for each die. * @hwcaps: describes the read and page program hardware @@ -394,6 +395,7 @@ struct spi_nor_flash_parameter { u8 addr_mode_nbytes; u8 rdsr_dummy; u8 rdsr_addr_nbytes; + u8 n_banks; u8 n_dice; u32 *vreg_offset; =20 --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE35FEE49A3 for ; Tue, 22 Aug 2023 07:10:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233239AbjHVHKO (ORCPT ); Tue, 22 Aug 2023 03:10:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233233AbjHVHKE (ORCPT ); Tue, 22 Aug 2023 03:10:04 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A0C2BCD4 for ; Tue, 22 Aug 2023 00:09:53 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 1EE3B64D18 for ; Tue, 22 Aug 2023 07:09:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CBA84C433C8; Tue, 22 Aug 2023 07:09:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688192; bh=YWcF5FYjmBa5ZzNhVXuTsMWow8CghL/K0RmXeemBMIU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=TsjNsNl5KE+5gIEKx76Yi79TjlkLlVljlVzLJ1C6OlosqeY4UtLuH4PUIQSxLFBx4 xtrbP1+P2//22eYCRJllvW9ehshooGzcqQvEmaynmiSWhkLhQJ7Rq2L8EDdRwxRV0g sZOtPpyR/Iy0W19Oc9jU+zaDldcF8sYRAv1H2WDJybUeX5QARjSDX5aGjc6f0T7xXx kHJBizWvTGVPZPOBCzt92+8tKV/o13y0BN69X5aIWIzatdhjwpjbkVu50FIKeVVdde 2RskH8m58rXXPSiUM8jJX9cje+uQJetTmYZIrJcxcnBKAAIVZ60zPtVQeT8GGnGj80 Z07h9/4Q1a79g== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:24 +0200 Subject: [PATCH v2 08/41] mtd: spi-nor: default .n_banks to 1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-8-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org If .n_banks is not set in the flash_info database, the default value should be 1. This way, we don't have to always set the .n_banks parameter in flash_info. Signed-off-by: Michael Walle Reviewed-by: Miquel Raynal Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/core.c | 3 +-- drivers/mtd/spi-nor/core.h | 8 ++++---- drivers/mtd/spi-nor/xilinx.c | 1 - 3 files changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index e27f1323fa0b..68baf6032639 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2017,7 +2017,6 @@ static const struct spi_nor_manufacturer *manufacture= rs[] =3D { =20 static const struct flash_info spi_nor_generic_flash =3D { .name =3D "spi-nor-generic", - .n_banks =3D 1, .parse_sfdp =3D true, }; =20 @@ -2997,7 +2996,7 @@ static void spi_nor_init_default_params(struct spi_no= r *nor) params->size =3D info->size; params->bank_size =3D params->size; params->page_size =3D info->page_size ?: SPI_NOR_DEFAULT_PAGE_SIZE; - params->n_banks =3D info->n_banks; + params->n_banks =3D info->n_banks ?: SPI_NOR_DEFAULT_N_BANKS; =20 if (!(info->flags & SPI_NOR_NO_FR)) { /* Default to Fast Read for DT and non-DT platform devices. */ diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 2fc999f2787c..8627d0b95be6 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -15,6 +15,7 @@ * have the page size defined within their SFDP tables. */ #define SPI_NOR_DEFAULT_PAGE_SIZE 256 +#define SPI_NOR_DEFAULT_N_BANKS 1 =20 /* Standard SPI NOR flash operations. */ #define SPI_NOR_READID_OP(naddr, ndummy, buf, len) \ @@ -453,7 +454,7 @@ struct spi_nor_fixups { * @size: the size of the flash in bytes. * @sector_size: the size listed here is what works with SPINOR_OP_SE, = which * isn't necessarily called a "sector" by the vendor. - * @n_banks: the number of banks. + * @n_banks: (optional) the number of banks. Defaults to 1. * @page_size: (optional) the flash's page size. Defaults to 256. * @addr_nbytes: number of address bytes to send. * @@ -570,7 +571,7 @@ struct flash_info { /* Used when the "_ext_id" is two bytes at most */ #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors) \ SPI_NOR_ID((_jedec_id), (_ext_id)), \ - SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 1), + SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 0), =20 #define INFOB(_jedec_id, _ext_id, _sector_size, _n_sectors, _n_banks) \ SPI_NOR_ID((_jedec_id), (_ext_id)), \ @@ -578,13 +579,12 @@ struct flash_info { =20 #define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors) \ SPI_NOR_ID6((_jedec_id), (_ext_id)), \ - SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 1), + SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 0), =20 #define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_nbytes) \ .size =3D (_sector_size) * (_n_sectors), \ .sector_size =3D (_sector_size), \ .page_size =3D (_page_size), \ - .n_banks =3D 1, \ .addr_nbytes =3D (_addr_nbytes), \ .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, \ =20 diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 284e2e4970ab..8d4539e32dfe 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -26,7 +26,6 @@ .size =3D 8 * (_page_size) * (_n_sectors), \ .sector_size =3D (8 * (_page_size)), \ .page_size =3D (_page_size), \ - .n_banks =3D 1, \ .flags =3D SPI_NOR_NO_FR =20 /* Xilinx S3AN share MFR with Atmel SPI NOR */ --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21AEAEE49A3 for ; Tue, 22 Aug 2023 07:10:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233265AbjHVHKR (ORCPT ); Tue, 22 Aug 2023 03:10:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33622 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233242AbjHVHKL (ORCPT ); Tue, 22 Aug 2023 03:10:11 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6FF7FCEF for ; Tue, 22 Aug 2023 00:09:56 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C424B648F1 for ; Tue, 22 Aug 2023 07:09:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C1D42C433C7; Tue, 22 Aug 2023 07:09:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688195; bh=mNibVHfe5bNQ3u2ZbNVsMAi+XFRvTnwGKmym/9VH1zA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=HRusENO6K0UrU4wOUYDCVPQpUJnv7A+osg9fdJwYuF9tw4n1zX/Tj4vT6rD+EGZZW PulewcoNlc7sBZkTQTTlx6um5U3QmBz19VGEoe3vdmpnyt+8qrBbvALjRI1twq2T6q 7zAmlgzyzTaGNtqdnWuHjgu+6dNB5WwN1foAJwel8cbcezUMnbaZim6gNlclr9eOYA +JWHBIHp6GNvcvL5Lsb2Z4sVNVYN0LM5FClCVAvHBfZroyzZP0MkNnOuZTuK77+jLt /WivawNROzcwyXKGGfrZXQKIJVQV4l3mwTZFYPuNPgIEBO0C0akOW4U/Dn89N0LzUb bBt1pJzoxnsow== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:25 +0200 Subject: [PATCH v2 09/41] mtd: spi-nor: push 4k SE handling into spi_nor_select_uniform_erase() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-9-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 4k sector erase sizes are only a thing with uniform erase types. Push the "we want 4k erase sizes" handling into spi_nor_select_uniform_erase(). One might wonder why the former sector_size isn't used anymore. It is because we either search for the largest erase size or if selected through kconfig, the 4k erase size. Now, why is that correct? For this, we have to differentiate between (1) flashes with SFDP and (2) without SFDP. For (1), we just set one (or two if SECT_4K is set) erase types and wanted_size is exactly one of these. For (2) things are a bit more complicated. For flashes which we don't have in our flash_info database, the generic driver is used and sector_size was already 0, which in turn selected the largest erase size. For flashes which had SFDP and an entry in flash_info, sector_size was always the largest sector and thus the largest erase type. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/core.c | 27 +++++++++------------------ 1 file changed, 9 insertions(+), 18 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 68baf6032639..c84be791341e 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2512,13 +2512,6 @@ static int spi_nor_select_pp(struct spi_nor *nor, /** * spi_nor_select_uniform_erase() - select optimum uniform erase type * @map: the erase map of the SPI NOR - * @wanted_size: the erase type size to search for. Contains the value of - * info->sector_size, the "small sector" size in case - * CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is defined or 0 if - * there is no information about the sector size. The - * latter is the case if the flash parameters are parsed - * solely by SFDP, then the largest supported erase type - * is selected. * * Once the optimum uniform sector erase command is found, disable all the * other. @@ -2526,13 +2519,16 @@ static int spi_nor_select_pp(struct spi_nor *nor, * Return: pointer to erase type on success, NULL otherwise. */ static const struct spi_nor_erase_type * -spi_nor_select_uniform_erase(struct spi_nor_erase_map *map, - const u32 wanted_size) +spi_nor_select_uniform_erase(struct spi_nor_erase_map *map) { const struct spi_nor_erase_type *tested_erase, *erase =3D NULL; int i; u8 uniform_erase_type =3D map->uniform_erase_type; =20 + /* + * Search for the biggest erase size, except for when compiled + * to use 4k erases. + */ for (i =3D SNOR_ERASE_TYPE_MAX - 1; i >=3D 0; i--) { if (!(uniform_erase_type & BIT(i))) continue; @@ -2544,10 +2540,11 @@ spi_nor_select_uniform_erase(struct spi_nor_erase_m= ap *map, continue; =20 /* - * If the current erase size is the one, stop here: + * If the current erase size is the 4k one, stop here, * we have found the right uniform Sector Erase command. */ - if (tested_erase->size =3D=3D wanted_size) { + if (IS_ENABLED(CONFIG_MTD_SPI_NOR_USE_4K_SECTORS) && + tested_erase->size =3D=3D SZ_4K) { erase =3D tested_erase; break; } @@ -2575,7 +2572,6 @@ static int spi_nor_select_erase(struct spi_nor *nor) struct spi_nor_erase_map *map =3D &nor->params->erase_map; const struct spi_nor_erase_type *erase =3D NULL; struct mtd_info *mtd =3D &nor->mtd; - u32 wanted_size =3D nor->info->sector_size; int i; =20 /* @@ -2586,13 +2582,8 @@ static int spi_nor_select_erase(struct spi_nor *nor) * manage the SPI flash memory as uniform with a single erase sector * size, when possible. */ -#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS - /* prefer "small sector" erase if possible */ - wanted_size =3D 4096u; -#endif - if (spi_nor_has_uniform_erase(nor)) { - erase =3D spi_nor_select_uniform_erase(map, wanted_size); + erase =3D spi_nor_select_uniform_erase(map); if (!erase) return -EINVAL; nor->erase_opcode =3D erase->opcode; --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6241CEE49A8 for ; Tue, 22 Aug 2023 07:10:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232439AbjHVHKW (ORCPT ); Tue, 22 Aug 2023 03:10:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233263AbjHVHKQ (ORCPT ); Tue, 22 Aug 2023 03:10:16 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB806E4B for ; Tue, 22 Aug 2023 00:09:58 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id BDCAA64CC7 for ; Tue, 22 Aug 2023 07:09:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 76B06C433C8; Tue, 22 Aug 2023 07:09:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688197; bh=1OgNf4tLGuQwWEt84lEgtGRwADQcaJNsRP1fBfkjLdU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=fDpOxO4Ik24Xe7vxK2z6dOcGjSqHT6jk8Pow/2BzPxi65Xj0cJcr8RTivJqhzcfte x6zve5TIbhGL6YrPGcTuD+4GLy1IuZD1s9K47TavY+gW8VfEzUwysgzsiFpPUnHGJT k1129GaPAivTh1Sakcre1M5l4aXmALsJTQYTTIr42CtqsDNEAmNcishkTuSwrrbvnV Ri5GCYJqPTT2kwirlfsXsME2j6S3BRkx02XZQWEnblv8p2ZUq9tEyrEAG2O+EzZ3n6 +JR7QoSwiH9plyflFbNCRqhGsLi8f/Hjde5sYfz9I/Y3qu9QfCGnrRr4puWs4UrZ1W HZcD9ML3TNBMA== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:26 +0200 Subject: [PATCH v2 10/41] mtd: spi-nor: make sector_size optional MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-10-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Most of the (old, non-SFDP) flashes use a sector size of 64k. Make that a default value so it can be optional in the flash_info database. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.c | 6 ++++-- drivers/mtd/spi-nor/core.h | 8 +++++--- drivers/mtd/spi-nor/swp.c | 6 +++++- 3 files changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index c84be791341e..368851ff9f40 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2756,7 +2756,8 @@ static void spi_nor_no_sfdp_init_params(struct spi_no= r *nor) { struct spi_nor_flash_parameter *params =3D nor->params; struct spi_nor_erase_map *map =3D ¶ms->erase_map; - const u8 no_sfdp_flags =3D nor->info->no_sfdp_flags; + const struct flash_info *info =3D nor->info; + const u8 no_sfdp_flags =3D info->no_sfdp_flags; u8 i, erase_mask; =20 if (no_sfdp_flags & SPI_NOR_DUAL_READ) { @@ -2810,7 +2811,8 @@ static void spi_nor_no_sfdp_init_params(struct spi_no= r *nor) i++; } erase_mask |=3D BIT(i); - spi_nor_set_erase_type(&map->erase_type[i], nor->info->sector_size, + spi_nor_set_erase_type(&map->erase_type[i], + info->sector_size ?: SPI_NOR_DEFAULT_SECTOR_SIZE, SPINOR_OP_SE); spi_nor_init_uniform_erase_map(map, erase_mask, params->size); } diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 8627d0b95be6..fba3ea8536a5 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -16,6 +16,7 @@ */ #define SPI_NOR_DEFAULT_PAGE_SIZE 256 #define SPI_NOR_DEFAULT_N_BANKS 1 +#define SPI_NOR_DEFAULT_SECTOR_SIZE SZ_64K =20 /* Standard SPI NOR flash operations. */ #define SPI_NOR_READID_OP(naddr, ndummy, buf, len) \ @@ -452,8 +453,9 @@ struct spi_nor_fixups { * JEDIC ID. JEDEC ID zero means "no ID" (mostly older ch= ips). * @id_len: the number of bytes of ID. * @size: the size of the flash in bytes. - * @sector_size: the size listed here is what works with SPINOR_OP_SE, = which - * isn't necessarily called a "sector" by the vendor. + * @sector_size: (optional) the size listed here is what works with + * SPINOR_OP_SE, which isn't necessarily called a "sector= " by + * the vendor. Defaults to 64k. * @n_banks: (optional) the number of banks. Defaults to 1. * @page_size: (optional) the flash's page size. Defaults to 256. * @addr_nbytes: number of address bytes to send. @@ -565,7 +567,7 @@ struct flash_info { =20 #define SPI_NOR_GEOMETRY(_sector_size, _n_sectors, _n_banks) \ .size =3D (_sector_size) * (_n_sectors), \ - .sector_size =3D (_sector_size), \ + .sector_size =3D (_sector_size =3D=3D SZ_64K) ? 0 : (_sector_size), \ .n_banks =3D (_n_banks) =20 /* Used when the "_ext_id" is two bytes at most */ diff --git a/drivers/mtd/spi-nor/swp.c b/drivers/mtd/spi-nor/swp.c index 40bf52867095..585813310ee1 100644 --- a/drivers/mtd/spi-nor/swp.c +++ b/drivers/mtd/spi-nor/swp.c @@ -34,7 +34,11 @@ static u8 spi_nor_get_sr_tb_mask(struct spi_nor *nor) static u64 spi_nor_get_min_prot_length_sr(struct spi_nor *nor) { unsigned int bp_slots, bp_slots_needed; - unsigned int sector_size =3D nor->info->sector_size; + /* + * sector_size will eventually be replaced with the max erase size of + * the flash. For now, we need to have that ugly default. + */ + unsigned int sector_size =3D nor->info->sector_size ?: SPI_NOR_DEFAULT_SE= CTOR_SIZE; u64 n_sectors =3D div_u64(nor->params->size, sector_size); u8 mask =3D spi_nor_get_sr_bp_mask(nor); =20 --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B366EE49A3 for ; Tue, 22 Aug 2023 07:10:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233268AbjHVHKe (ORCPT ); Tue, 22 Aug 2023 03:10:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46474 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233271AbjHVHKY (ORCPT ); Tue, 22 Aug 2023 03:10:24 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 44809E5F for ; Tue, 22 Aug 2023 00:10:00 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B680964D60 for ; Tue, 22 Aug 2023 07:09:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6EF07C433B8; Tue, 22 Aug 2023 07:09:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688199; bh=MWS7MPMcyXYnPaxXkyMoRAv+7UP5ZUtOhI3xJyiqbck=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=YV2cDWeA/QXuaAQaG0fZ8e9OqjXJF+UQu1RwTIy4P7QFBwnlsM73eQWQ9MsLLodKr BqJ6eoTtpR2dElrbZSeeHoE65u7gys2iuBWZuS7aCANTFL/KvRloTgXiC7eX2Ob/NH krvyUj1HzzZm3HThomOLG66uCrumwS4Q5GGl57lGJ5Jou9RLVJ06gZciYFWC3jPYOx xC9HkJkNzaen4vSgVUqTxKbf40Yq8YQs7GviojDJg9yozzP9RiJZiQp8vlg1L0Oh6A 1/MZIpoppqCtg/rEuacS0zW5X1JMaGdqXnP60Z/XoDWi+nv+o3fObfgzr8CdwsyVrI AJSNb5CfYxQhw== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:27 +0200 Subject: [PATCH v2 11/41] mtd: spi-nor: drop .parse_sfdp MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-11-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Drop the size parameter to indicate we need to do SFDP, we can do that because it is guaranteed that the size will be set by SFDP and because PARSE_SFDP forced the SFDP parsing it must be overwritten. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/core.c | 3 +-- drivers/mtd/spi-nor/core.h | 23 ++++++++++++++++------- drivers/mtd/spi-nor/eon.c | 3 +-- drivers/mtd/spi-nor/gigadevice.c | 3 +-- drivers/mtd/spi-nor/issi.c | 4 +--- drivers/mtd/spi-nor/macronix.c | 1 - drivers/mtd/spi-nor/spansion.c | 12 ------------ drivers/mtd/spi-nor/sst.c | 1 - drivers/mtd/spi-nor/winbond.c | 7 ++----- 9 files changed, 22 insertions(+), 35 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 368851ff9f40..4ba1778eda4b 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2017,7 +2017,6 @@ static const struct spi_nor_manufacturer *manufacture= rs[] =3D { =20 static const struct flash_info spi_nor_generic_flash =3D { .name =3D "spi-nor-generic", - .parse_sfdp =3D true, }; =20 static const struct flash_info *spi_nor_match_id(struct spi_nor *nor, @@ -3069,7 +3068,7 @@ static int spi_nor_init_params(struct spi_nor *nor) =20 spi_nor_init_default_params(nor); =20 - if (nor->info->parse_sfdp) { + if (spi_nor_needs_sfdp(nor)) { ret =3D spi_nor_parse_sfdp(nor); if (ret) { dev_err(nor->dev, "BFPT parsing failed. Please consider using SPI_NOR_S= KIP_SFDP when declaring the flash\n"); diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index fba3ea8536a5..9e6ad02b03b0 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -460,9 +460,6 @@ struct spi_nor_fixups { * @page_size: (optional) the flash's page size. Defaults to 256. * @addr_nbytes: number of address bytes to send. * - * @parse_sfdp: true when flash supports SFDP tables. The false value = has no - * meaning. If one wants to skip the SFDP tables, one sho= uld - * instead use the SPI_NOR_SKIP_SFDP sfdp_flag. * @flags: flags that indicate support that is not defined by the * JESD216 standard in its SFDP tables. Flag meanings: * SPI_NOR_HAS_LOCK: flash supports lock/unlock via SR @@ -521,7 +518,6 @@ struct flash_info { u8 n_banks; u8 addr_nbytes; =20 - bool parse_sfdp; u16 flags; #define SPI_NOR_HAS_LOCK BIT(0) #define SPI_NOR_HAS_TB BIT(1) @@ -598,9 +594,6 @@ struct flash_info { .n_regions =3D (_n_regions), \ }, =20 -#define PARSE_SFDP \ - .parse_sfdp =3D true, \ - #define FLAGS(_flags) \ .flags =3D (_flags), \ =20 @@ -740,6 +733,22 @@ static inline struct spi_nor *mtd_to_spi_nor(struct mt= d_info *mtd) return container_of(mtd, struct spi_nor, mtd); } =20 +/** + * spi_nor_needs_sfdp() - returns true if SFDP parsing is used for this fl= ash. + * + * Return: true if SFDP parsing is needed + */ +static inline bool spi_nor_needs_sfdp(const struct spi_nor *nor) +{ + /* + * The flash size is one property parsed by the SFDP. We use it as an + * indicator whether we need SFDP parsing for a particular flash. I.e. + * non-legacy flash entries in flash_info will have a size of zero iff + * SFDP should be used. + */ + return nor->info->size; +} + #ifdef CONFIG_DEBUG_FS void spi_nor_debugfs_register(struct spi_nor *nor); void spi_nor_debugfs_shutdown(void); diff --git a/drivers/mtd/spi-nor/eon.c b/drivers/mtd/spi-nor/eon.c index 50a11053711f..434aaf155856 100644 --- a/drivers/mtd/spi-nor/eon.c +++ b/drivers/mtd/spi-nor/eon.c @@ -25,8 +25,7 @@ static const struct flash_info eon_nor_parts[] =3D { { "en25qh64", INFO(0x1c7017, 0, 64 * 1024, 128) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, { "en25qh128", INFO(0x1c7018, 0, 64 * 1024, 256) }, - { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512) - PARSE_SFDP }, + { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 0) }, { "en25s64", INFO(0x1c3817, 0, 64 * 1024, 128) NO_SFDP_FLAGS(SECT_4K) }, }; diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadev= ice.c index d57ddaf1525b..7cf142c75529 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -62,8 +62,7 @@ static const struct flash_info gigadevice_nor_parts[] =3D= { FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "gd25q256", INFO(0xc84019, 0, 64 * 1024, 512) - PARSE_SFDP + { "gd25q256", INFO(0xc84019, 0, 64 * 1024, 0) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6) FIXUP_FLAGS(SPI_NOR_4B_OPCODES) .fixups =3D &gd25q256_fixups }, diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index accdf7aa2bfd..9d22b799ce94 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -62,8 +62,7 @@ static const struct flash_info issi_nor_parts[] =3D { NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, { "is25lp128", INFO(0x9d6018, 0, 64 * 1024, 256) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "is25lp256", INFO(0x9d6019, 0, 64 * 1024, 512) - PARSE_SFDP + { "is25lp256", INFO(0x9d6019, 0, 64 * 1024, 0) FIXUP_FLAGS(SPI_NOR_4B_OPCODES) .fixups =3D &is25lp256_fixups }, { "is25wp032", INFO(0x9d7016, 0, 64 * 1024, 64) @@ -73,7 +72,6 @@ static const struct flash_info issi_nor_parts[] =3D { { "is25wp128", INFO(0x9d7018, 0, 64 * 1024, 256) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "is25wp256", INFO(0x9d7019, 0, 0, 0) - PARSE_SFDP FIXUP_FLAGS(SPI_NOR_4B_OPCODES) FLAGS(SPI_NOR_QUAD_PP) .fixups =3D &is25lp256_fixups }, diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index eb149e517c1f..0f3bd3ed8eff 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -83,7 +83,6 @@ static const struct flash_info macronix_nor_parts[] =3D { NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, { "mx25uw51245g", INFOB(0xc2813a, 0, 0, 0, 4) - PARSE_SFDP FLAGS(SPI_NOR_RWW) }, { "mx25v8035f", INFO(0xc22314, 0, 64 * 1024, 16) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 709822fced86..e6468569f178 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -849,59 +849,47 @@ static const struct flash_info spansion_nor_parts[] = =3D { NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, { "s25fs256t", INFO6(0x342b19, 0x0f0890, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s25fs256t_fixups }, { "s25hl512t", INFO6(0x342a1a, 0x0f0390, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s25hx_t_fixups }, { "s25hl01gt", INFO6(0x342a1b, 0x0f0390, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s25hx_t_fixups }, { "s25hl02gt", INFO6(0x342a1c, 0x0f0090, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) FLAGS(NO_CHIP_ERASE) .fixups =3D &s25hx_t_fixups }, { "s25hs512t", INFO6(0x342b1a, 0x0f0390, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s25hx_t_fixups }, { "s25hs01gt", INFO6(0x342b1b, 0x0f0390, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s25hx_t_fixups }, { "s25hs02gt", INFO6(0x342b1c, 0x0f0090, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) FLAGS(NO_CHIP_ERASE) .fixups =3D &s25hx_t_fixups }, { "cy15x104q", INFO6(0x042cc2, 0x7f7f7f, 512 * 1024, 1) FLAGS(SPI_NOR_NO_ERASE) }, { "s28hl512t", INFO(0x345a1a, 0, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s28hx_t_fixups, }, { "s28hl01gt", INFO(0x345a1b, 0, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s28hx_t_fixups, }, { "s28hs512t", INFO(0x345b1a, 0, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s28hx_t_fixups, }, { "s28hs01gt", INFO(0x345b1b, 0, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s28hx_t_fixups, }, { "s28hs02gt", INFO(0x345b1c, 0, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s28hx_t_fixups, }, diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index 197d2c1101ed..57df68eab6aa 100644 --- a/drivers/mtd/spi-nor/sst.c +++ b/drivers/mtd/spi-nor/sst.c @@ -115,7 +115,6 @@ static const struct flash_info sst_nor_parts[] =3D { NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, { "sst26vf032b", INFO(0xbf2642, 0, 0, 0) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - PARSE_SFDP .fixups =3D &sst26vf_nor_fixups }, { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index cd99c9a1c568..c21fed842762 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -126,8 +126,7 @@ static const struct flash_info winbond_nor_parts[] =3D { { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) .fixups =3D &w25q256_fixups }, - { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512) - PARSE_SFDP }, + { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 0) }, { "w25q256jw", INFO(0xef6019, 0, 64 * 1024, 512) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, @@ -135,10 +134,8 @@ static const struct flash_info winbond_nor_parts[] =3D= { NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) }, { "w25q512nwq", INFO(0xef6020, 0, 0, 0) - PARSE_SFDP OTP_INFO(256, 3, 0x1000, 0x1000) }, - { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 1024) - PARSE_SFDP + { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 0) OTP_INFO(256, 3, 0x1000, 0x1000) }, { "w25q512jvq", INFO(0xef4020, 0, 64 * 1024, 1024) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77D0FEE49A5 for ; Tue, 22 Aug 2023 07:10:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232306AbjHVHKp (ORCPT ); Tue, 22 Aug 2023 03:10:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46436 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233242AbjHVHKl (ORCPT ); Tue, 22 Aug 2023 03:10:41 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE8FFCD9 for ; Tue, 22 Aug 2023 00:10:15 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 9BB7B649D9 for ; Tue, 22 Aug 2023 07:10:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 66ACDC433C8; Tue, 22 Aug 2023 07:09:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688200; bh=Zs1A1HxiQPsOM73l5lBrT2OaeEpwSq16bUHtLZRB2hM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=lOO0Zwi1fSHW+5O6Y9lMi4o9D+VRhJWXOASsDq/RCdENK8VWml5uEpDRZopB2l3iU GPJqAik2JrAq8IJiUd5Do2W9gjIz9O8I4SiYvLvYwvyoZIqSvdnjsHlDV6WjkUjL/X 9k5XKAKyMwkcC0FmPusv47Eeh7pKtQ7lKMQzh0rGeMji4s7oy0K6IB/wASGzfmt2nI 6qGzyPNaJjqUuXZ8fJWX5Ea7YcOwG7zgp9CTD+iM/5TaJ/COh1Wb0TaDNFP85Hu2Gs EOhFbjBdcf0SbQuXa97z13ab30NfK/55UIwER+gOznvI/y1ifPJT9cGsWEgEvRM8Xk F5qKYeWtqypRQ== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:28 +0200 Subject: [PATCH v2 12/41] mtd: spi-nor: introduce (temporary) INFO0() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-12-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The id will be converted to an own structure. To differentiate between flashes with and without IDs, introduce a temporary macro INFO0() and convert all flashes with no ID to use it. After the flash_info conversion, that macro will be removed along with all the other INFOx() macros. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.h | 3 +++ drivers/mtd/spi-nor/issi.c | 4 ++-- drivers/mtd/spi-nor/micron-st.c | 18 +++++++++--------- 3 files changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 9e6ad02b03b0..c42b65623da7 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -571,6 +571,9 @@ struct flash_info { SPI_NOR_ID((_jedec_id), (_ext_id)), \ SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 0), =20 +#define INFO0(_sector_size, _n_sectors) \ + SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 0), + #define INFOB(_jedec_id, _ext_id, _sector_size, _n_sectors, _n_banks) \ SPI_NOR_ID((_jedec_id), (_ext_id)), \ SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), (_n_banks)), diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index 9d22b799ce94..b936a28a85df 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -77,11 +77,11 @@ static const struct flash_info issi_nor_parts[] =3D { .fixups =3D &is25lp256_fixups }, =20 /* PMC */ - { "pm25lv512", INFO(0, 0, 32 * 1024, 2) + { "pm25lv512", INFO0(32 * 1024, 2) NO_SFDP_FLAGS(SECT_4K) .fixups =3D &pm25lv_nor_fixups }, - { "pm25lv010", INFO(0, 0, 32 * 1024, 4) + { "pm25lv010", INFO0(32 * 1024, 4) NO_SFDP_FLAGS(SECT_4K) .fixups =3D &pm25lv_nor_fixups }, diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 6ad080c52ab5..5406a3af2ce0 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -272,15 +272,15 @@ static const struct flash_info st_nor_parts[] =3D { { "m25p64", INFO(0x202017, 0, 64 * 1024, 128) }, { "m25p128", INFO(0x202018, 0, 256 * 1024, 64) }, =20 - { "m25p05-nonjedec", INFO(0, 0, 32 * 1024, 2) }, - { "m25p10-nonjedec", INFO(0, 0, 32 * 1024, 4) }, - { "m25p20-nonjedec", INFO(0, 0, 64 * 1024, 4) }, - { "m25p40-nonjedec", INFO(0, 0, 64 * 1024, 8) }, - { "m25p80-nonjedec", INFO(0, 0, 64 * 1024, 16) }, - { "m25p16-nonjedec", INFO(0, 0, 64 * 1024, 32) }, - { "m25p32-nonjedec", INFO(0, 0, 64 * 1024, 64) }, - { "m25p64-nonjedec", INFO(0, 0, 64 * 1024, 128) }, - { "m25p128-nonjedec", INFO(0, 0, 256 * 1024, 64) }, + { "m25p05-nonjedec", INFO0( 32 * 1024, 2) }, + { "m25p10-nonjedec", INFO0( 32 * 1024, 4) }, + { "m25p20-nonjedec", INFO0( 64 * 1024, 4) }, + { "m25p40-nonjedec", INFO0( 64 * 1024, 8) }, + { "m25p80-nonjedec", INFO0( 64 * 1024, 16) }, + { "m25p16-nonjedec", INFO0( 64 * 1024, 32) }, + { "m25p32-nonjedec", INFO0( 64 * 1024, 64) }, + { "m25p64-nonjedec", INFO0( 64 * 1024, 128) }, + { "m25p128-nonjedec", INFO0(256 * 1024, 64) }, =20 { "m45pe10", INFO(0x204011, 0, 64 * 1024, 2) }, { "m45pe80", INFO(0x204014, 0, 64 * 1024, 16) }, --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5A603EE49AC for ; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688202; bh=Ym0ePFBuvOMB5hND1UICh6uDKKeCI9HAbCa87A/Yodc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=buXckBOnWIUs+FHeg8bNWJEn2/nVM1X0+bXUwgocMUBqPzZ84LqG/tTnOxiSjbAwq /DJnG16p6d725ASyiF/ZOtUsiW6+eXzgXvQyMYa6Wj2bk2r/BGpg+Favi/MG7K1fhE 1ithQl8ZdaAe1nH60sPNCA4h0AnmPF/7jv+z4lP/Kk2RqBnGKbJTUreSwi4PaoIhqw 5FAT7EaUAc52FtHNoc03qaREX6n9EEBGcEvgNHO4daUVzjOOLWkVzpsX9hG8CMGjZh 0aSb7PoYK1AZE06zQrXCybJCoV1vtpWPpk7EXVoZM8/lY5GcQfJAJhrquDIQ5hBZ1J 05tODpJ2hqSww== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:29 +0200 Subject: [PATCH v2 13/41] mtd: spi-nor: move the .id and .id_len into an own structure MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-13-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Create a new structure to hold a flash ID and its length. The goal is to have a new macro SNOR_ID() which can have a flexible id length. This way we can get rid of all the individual INFOx() macros. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.c | 6 +++--- drivers/mtd/spi-nor/core.h | 33 ++++++++++++++++++++++++--------- drivers/mtd/spi-nor/micron-st.c | 4 ++-- drivers/mtd/spi-nor/spansion.c | 4 ++-- drivers/mtd/spi-nor/sysfs.c | 6 +++--- drivers/mtd/spi-nor/winbond.c | 1 - 6 files changed, 34 insertions(+), 20 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 4ba1778eda4b..80c340c7863a 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2028,8 +2028,8 @@ static const struct flash_info *spi_nor_match_id(stru= ct spi_nor *nor, for (i =3D 0; i < ARRAY_SIZE(manufacturers); i++) { for (j =3D 0; j < manufacturers[i]->nparts; j++) { part =3D &manufacturers[i]->parts[j]; - if (part->id_len && - !memcmp(part->id, id, part->id_len)) { + if (part->id && + !memcmp(part->id->bytes, id, part->id->len)) { nor->manufacturer =3D manufacturers[i]; return part; } @@ -3370,7 +3370,7 @@ static const struct flash_info *spi_nor_get_flash_inf= o(struct spi_nor *nor, * If caller has specified name of flash model that can normally be * detected using JEDEC, let's verify it. */ - if (name && info->id_len) { + if (name && info->id) { const struct flash_info *jinfo; =20 jinfo =3D spi_nor_detect(nor); diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index c42b65623da7..81535f31907f 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -446,12 +446,22 @@ struct spi_nor_fixups { int (*late_init)(struct spi_nor *nor); }; =20 +/** + * struct spi_nor_id - SPI NOR flash ID. + * + * @bytes: the flash's ID bytes. The first three bytes are the JEDIC ID. + * @len: the number of bytes of ID. + */ +struct spi_nor_id { + const u8 *bytes; + u8 len; +}; + /** * struct flash_info - SPI NOR flash_info entry. + * @id: pointer to struct spi_nor_id or NULL, which means "no ID" (mostly + * older chips). * @name: the name of the flash. - * @id: the flash's ID bytes. The first three bytes are the - * JEDIC ID. JEDEC ID zero means "no ID" (mostly older ch= ips). - * @id_len: the number of bytes of ID. * @size: the size of the flash in bytes. * @sector_size: (optional) the size listed here is what works with * SPINOR_OP_SE, which isn't necessarily called a "sector= " by @@ -510,8 +520,7 @@ struct spi_nor_fixups { */ struct flash_info { char *name; - u8 id[SPI_NOR_MAX_ID_LEN]; - u8 id_len; + const struct spi_nor_id *id; size_t size; unsigned sector_size; u16 page_size; @@ -554,12 +563,18 @@ struct flash_info { #define SPI_NOR_ID_3ITEMS(_id) ((_id) >> 16) & 0xff, SPI_NOR_ID_2ITEMS(_id) =20 #define SPI_NOR_ID(_jedec_id, _ext_id) \ - .id =3D { SPI_NOR_ID_3ITEMS(_jedec_id), SPI_NOR_ID_2ITEMS(_ext_id) }, \ - .id_len =3D !(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0)) + .id =3D &(const struct spi_nor_id){ \ + .bytes =3D (const u8[]){ SPI_NOR_ID_3ITEMS(_jedec_id), \ + SPI_NOR_ID_2ITEMS(_ext_id) }, \ + .len =3D !(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0)), \ + } =20 #define SPI_NOR_ID6(_jedec_id, _ext_id) \ - .id =3D { SPI_NOR_ID_3ITEMS(_jedec_id), SPI_NOR_ID_3ITEMS(_ext_id) }, \ - .id_len =3D 6 + .id =3D &(const struct spi_nor_id){ \ + .bytes =3D (const u8[]){ SPI_NOR_ID_3ITEMS(_jedec_id), \ + SPI_NOR_ID_3ITEMS(_ext_id) }, \ + .len =3D 6, \ + } =20 #define SPI_NOR_GEOMETRY(_sector_size, _n_sectors, _n_banks) \ .size =3D (_sector_size) * (_n_sectors), \ diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 5406a3af2ce0..229c951efcce 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -78,7 +78,7 @@ static int micron_st_nor_octal_dtr_en(struct spi_nor *nor) return ret; } =20 - if (memcmp(buf, nor->info->id, nor->info->id_len)) + if (memcmp(buf, nor->info->id->bytes, nor->info->id->len)) return -EINVAL; =20 return 0; @@ -114,7 +114,7 @@ static int micron_st_nor_octal_dtr_dis(struct spi_nor *= nor) return ret; } =20 - if (memcmp(buf, nor->info->id, nor->info->id_len)) + if (memcmp(buf, nor->info->id->bytes, nor->info->id->len)) return -EINVAL; =20 return 0; diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index e6468569f178..d7012ab3de2c 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -228,7 +228,7 @@ static int cypress_nor_octal_dtr_en(struct spi_nor *nor) return ret; } =20 - if (memcmp(buf, nor->info->id, nor->info->id_len)) + if (memcmp(buf, nor->info->id->bytes, nor->info->id->len)) return -EINVAL; =20 return 0; @@ -272,7 +272,7 @@ static int cypress_nor_octal_dtr_dis(struct spi_nor *no= r) return ret; } =20 - if (memcmp(buf, nor->info->id, nor->info->id_len)) + if (memcmp(buf, nor->info->id->bytes, nor->info->id->len)) return -EINVAL; =20 return 0; diff --git a/drivers/mtd/spi-nor/sysfs.c b/drivers/mtd/spi-nor/sysfs.c index c09bb832b3b9..2dfdc555a69f 100644 --- a/drivers/mtd/spi-nor/sysfs.c +++ b/drivers/mtd/spi-nor/sysfs.c @@ -35,8 +35,8 @@ static ssize_t jedec_id_show(struct device *dev, struct spi_device *spi =3D to_spi_device(dev); struct spi_mem *spimem =3D spi_get_drvdata(spi); struct spi_nor *nor =3D spi_mem_get_drvdata(spimem); - const u8 *id =3D nor->info->id_len ? nor->info->id : nor->id; - u8 id_len =3D nor->info->id_len ?: SPI_NOR_MAX_ID_LEN; + const u8 *id =3D nor->info->id ? nor->info->id->bytes : nor->id; + u8 id_len =3D nor->info->id ? nor->info->id->len : SPI_NOR_MAX_ID_LEN; =20 return sysfs_emit(buf, "%*phN\n", id_len, id); } @@ -78,7 +78,7 @@ static umode_t spi_nor_sysfs_is_visible(struct kobject *k= obj, =20 if (attr =3D=3D &dev_attr_manufacturer.attr && !nor->manufacturer) return 0; - if (attr =3D=3D &dev_attr_jedec_id.attr && !nor->info->id_len && !nor->id) + if (attr =3D=3D &dev_attr_jedec_id.attr && !nor->info->id && !nor->id) return 0; =20 return 0444; diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index c21fed842762..7873cc394f07 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -121,7 +121,6 @@ static const struct flash_info winbond_nor_parts[] =3D { { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16) NO_SFDP_FLAGS(SECT_4K) }, { "w25q128", INFO(0xef4018, 0, 0, 0) - PARSE_SFDP FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1FD6EEE49A8 for ; Tue, 22 Aug 2023 07:11:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233278AbjHVHLF (ORCPT ); Tue, 22 Aug 2023 03:11:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50604 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233282AbjHVHK7 (ORCPT ); Tue, 22 Aug 2023 03:10:59 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A98851A5 for ; Tue, 22 Aug 2023 00:10:32 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A5403649E9 for ; Tue, 22 Aug 2023 07:10:05 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 62AACC433CC; Tue, 22 Aug 2023 07:10:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688204; bh=ZU2Q5S8n0WBM33+d5apjMFKUzdUvVi8jQVBjbDv54Zo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=CLpFl8rdoJ0R6kk2mTdBt/4eZwu6kCVd5JURG9mxSKaP3NPXSf/YHb2WLGLXKZkcv tbS2Me1I+qtzw5Q2e/cykCBwrkObgHz0PtWBzhj1ZHDXAgMorXbVRQbtEQkQEP75JT guEyQt7rb97+xz56hKkm9/6XDTnu0iVOj/5tfqfTzneJyPM6mr13KlzSqsboVltws/ 6RIbRfnNncd1oE6jeCTHFkJbgTc+L5TozmwXP4g3k7xq/q8w6wxiue+uKdmr/cgJbL SVxgjmS+jbmnv70KrVWBMOgYGenjFmK1+8S9tyapLBQB3Tg2pDDELpM6MrWW5wHiYC FSvgnt1lgxitg== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:30 +0200 Subject: [PATCH v2 14/41] mtd: spi-nor: rename .otp_org to .otp and make it a pointer MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-14-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Move the OTP ops out of the flash_info structure. Besides of saving some space, there will be a new macro SNOR_OTP() which can be used to set the ops: .otp =3D SNOR_OTP(...), Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/core.c | 2 +- drivers/mtd/spi-nor/core.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 80c340c7863a..1c443fe568cf 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2978,7 +2978,7 @@ static void spi_nor_init_default_params(struct spi_no= r *nor) struct device_node *np =3D spi_nor_get_flash_node(nor); =20 params->quad_enable =3D spi_nor_sr2_bit1_quad_enable; - params->otp.org =3D &info->otp_org; + params->otp.org =3D info->otp; =20 /* Default to 16-bit Write Status (01h) Command */ nor->flags |=3D SNOR_F_HAS_16BIT_SR; diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 81535f31907f..c22f5cf65a58 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -555,7 +555,7 @@ struct flash_info { =20 u8 mfr_flags; =20 - const struct spi_nor_otp_organization otp_org; + const struct spi_nor_otp_organization *otp; const struct spi_nor_fixups *fixups; }; =20 @@ -605,7 +605,7 @@ struct flash_info { .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, \ =20 #define OTP_INFO(_len, _n_regions, _base, _offset) \ - .otp_org =3D { \ + .otp =3D &(const struct spi_nor_otp_organization){ \ .len =3D (_len), \ .base =3D (_base), \ .offset =3D (_offset), \ --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38CD9EE49A8 for ; Tue, 22 Aug 2023 07:11:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233306AbjHVHLI (ORCPT ); Tue, 22 Aug 2023 03:11:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233294AbjHVHLD (ORCPT ); Tue, 22 Aug 2023 03:11:03 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C96F6E52 for ; Tue, 22 Aug 2023 00:10:35 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AF60A64D6B for ; Tue, 22 Aug 2023 07:10:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 58F37C433CA; Tue, 22 Aug 2023 07:10:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688206; bh=1BqJXay47IJkDiLieyHrXUXTDhVgV0Z2mEF/bEZLRbo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=MfbuYVyqfTz+LJxpA3Vvlht5s9QxfQq07qdNfo7uh1io30zLA/F8vF2IUFWl+JTBX E6BitISMs6u8vHDOVb2PNMTkiQoSXakdRGY1kjqPdgtmr1PZmy2Lx0UAh/XHPnTmR6 GHobdbYGm9u2v8d2d7L/Mpxv0+1oS+n6zNLpylLjHEGrW6vP/ZBjhAa//WbE+Chptj 5h9WLfPU7yiLz1dAzGJ9oHJR79OLM6aZ4z1ZsrG85Pb0S75WEX6jEpFuhMIx/f2pX5 Bu8Ll+FJBfaB7Y6l2fYSmxzkv9D2ZZaIB9Rl6Wf/UbAxTJZW9ZX693zPBOyX0g2AaM kDAek4EHWz10g== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:31 +0200 Subject: [PATCH v2 15/41] mtd: spi-nor: add SNOR_ID() and SNOR_OTP() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-15-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org After all the preparation, it is now time to introduce the new macros to specify flashes in our database: SNOR_ID() and SNOR_OTP(). An flash_info entry might now look like: { .id =3D SNOR_ID(0xef, 0x60, 0x16), .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, } Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/core.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index c22f5cf65a58..420e5ca2cfe1 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -559,6 +559,20 @@ struct flash_info { const struct spi_nor_fixups *fixups; }; =20 +#define SNOR_ID(...) \ + (&(const struct spi_nor_id){ \ + .bytes =3D (const u8[]){ __VA_ARGS__ }, \ + .len =3D sizeof((u8[]){ __VA_ARGS__ }), \ + }) + +#define SNOR_OTP(_len, _n_regions, _base, _offset) \ + (&(const struct spi_nor_otp_organization){ \ + .len =3D (_len), \ + .base =3D (_base), \ + .offset =3D (_offset), \ + .n_regions =3D (_n_regions), \ + }) + #define SPI_NOR_ID_2ITEMS(_id) ((_id) >> 8) & 0xff, (_id) & 0xff #define SPI_NOR_ID_3ITEMS(_id) ((_id) >> 16) & 0xff, SPI_NOR_ID_2ITEMS(_id) =20 --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9956EE49A3 for ; Tue, 22 Aug 2023 07:11:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233270AbjHVHLa (ORCPT ); Tue, 22 Aug 2023 03:11:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233338AbjHVHLP (ORCPT ); Tue, 22 Aug 2023 03:11:15 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DB6ECCE9 for ; Tue, 22 Aug 2023 00:10:49 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 8B2D764D78 for ; Tue, 22 Aug 2023 07:10:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 50CF4C433CD; Tue, 22 Aug 2023 07:10:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688208; bh=/w74BS2QCeQojVG/rqqHstQ1qJ1lqBhIWSXiUyyFHDE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Y9l3diezSTIUpTQ1jlL2Z1l1ckiNNZ1kHcK1cdTLblNpqsjTIN/foIXCRd9ShP2M+ 6wAtZFlqswuYfZQr2e+nnB1nxtfFc6jLNyC2cq8FK/5/Im7I+K4g7J25YvCbJXU3kF unXKJ05xDpVEenVzEvVmBvbh1TmXvASmaT58kOk+t8WR9YMWUK6AQMyvr/updAd5Gk f8qgwEtyaGh0AQPiBEWkbqAP1+4+OuG9ms2+MrpyPMclq7XLZdP/RcOxROFvyROrw3 URPUJW/tyrK7kVWG2LZnDfD32MmSTNSV5lvhD7ji7NByXYv8okRATEaBpfU+gmMGuS xfu0JxTb6bwjg== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:32 +0200 Subject: [PATCH v2 16/41] mtd: spi-nor: remove or move flash_info comments MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-16-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Most of the comments are a relict of the past when the flash_info was just one table. Most of them are useless. Remove them. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/atmel.c | 1 - drivers/mtd/spi-nor/eon.c | 1 - drivers/mtd/spi-nor/esmt.c | 1 - drivers/mtd/spi-nor/everspin.c | 1 - drivers/mtd/spi-nor/intel.c | 1 - drivers/mtd/spi-nor/issi.c | 2 -- drivers/mtd/spi-nor/macronix.c | 1 - drivers/mtd/spi-nor/spansion.c | 3 --- drivers/mtd/spi-nor/sst.c | 1 - drivers/mtd/spi-nor/winbond.c | 1 - drivers/mtd/spi-nor/xmc.c | 2 +- 11 files changed, 1 insertion(+), 14 deletions(-) diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c index 58968c1e7d2f..d2de2cb0c066 100644 --- a/drivers/mtd/spi-nor/atmel.c +++ b/drivers/mtd/spi-nor/atmel.c @@ -163,7 +163,6 @@ static const struct spi_nor_fixups atmel_nor_global_pro= tection_fixups =3D { }; =20 static const struct flash_info atmel_nor_parts[] =3D { - /* Atmel -- some are (confusingly) marketed as "DataFlash" */ { "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4) FLAGS(SPI_NOR_HAS_LOCK) NO_SFDP_FLAGS(SECT_4K) diff --git a/drivers/mtd/spi-nor/eon.c b/drivers/mtd/spi-nor/eon.c index 434aaf155856..4848ffe8b38f 100644 --- a/drivers/mtd/spi-nor/eon.c +++ b/drivers/mtd/spi-nor/eon.c @@ -9,7 +9,6 @@ #include "core.h" =20 static const struct flash_info eon_nor_parts[] =3D { - /* EON -- en25xxx */ { "en25f32", INFO(0x1c3116, 0, 64 * 1024, 64) NO_SFDP_FLAGS(SECT_4K) }, { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64) }, diff --git a/drivers/mtd/spi-nor/esmt.c b/drivers/mtd/spi-nor/esmt.c index fcc3b0e7cda9..12779bec5f99 100644 --- a/drivers/mtd/spi-nor/esmt.c +++ b/drivers/mtd/spi-nor/esmt.c @@ -9,7 +9,6 @@ #include "core.h" =20 static const struct flash_info esmt_nor_parts[] =3D { - /* ESMT */ { "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) }, diff --git a/drivers/mtd/spi-nor/everspin.c b/drivers/mtd/spi-nor/everspin.c index 84a07c2e0536..d02c32f2f7ad 100644 --- a/drivers/mtd/spi-nor/everspin.c +++ b/drivers/mtd/spi-nor/everspin.c @@ -9,7 +9,6 @@ #include "core.h" =20 static const struct flash_info everspin_nor_parts[] =3D { - /* Everspin */ { "mr25h128", CAT25_INFO(16 * 1024, 1, 256, 2) }, { "mr25h256", CAT25_INFO(32 * 1024, 1, 256, 2) }, { "mr25h10", CAT25_INFO(128 * 1024, 1, 256, 3) }, diff --git a/drivers/mtd/spi-nor/intel.c b/drivers/mtd/spi-nor/intel.c index 9179f2d09cba..aba62759a02e 100644 --- a/drivers/mtd/spi-nor/intel.c +++ b/drivers/mtd/spi-nor/intel.c @@ -9,7 +9,6 @@ #include "core.h" =20 static const struct flash_info intel_nor_parts[] =3D { - /* Intel/Numonyx -- xxxs33b */ { "160s33b", INFO(0x898911, 0, 64 * 1024, 32) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, { "320s33b", INFO(0x898912, 0, 64 * 1024, 64) diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index b936a28a85df..d31401bcab64 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -47,7 +47,6 @@ static const struct spi_nor_fixups pm25lv_nor_fixups =3D { }; =20 static const struct flash_info issi_nor_parts[] =3D { - /* ISSI */ { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2) NO_SFDP_FLAGS(SECT_4K) }, { "is25lq040b", INFO(0x9d4013, 0, 64 * 1024, 8) @@ -76,7 +75,6 @@ static const struct flash_info issi_nor_parts[] =3D { FLAGS(SPI_NOR_QUAD_PP) .fixups =3D &is25lp256_fixups }, =20 - /* PMC */ { "pm25lv512", INFO0(32 * 1024, 2) NO_SFDP_FLAGS(SECT_4K) .fixups =3D &pm25lv_nor_fixups diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index 0f3bd3ed8eff..b21e688fe056 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -33,7 +33,6 @@ static const struct spi_nor_fixups mx25l25635_fixups =3D { }; =20 static const struct flash_info macronix_nor_parts[] =3D { - /* Macronix */ { "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1) NO_SFDP_FLAGS(SECT_4K) }, { "mx25l2005a", INFO(0xc22012, 0, 64 * 1024, 4) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index d7012ab3de2c..1a1d2368c462 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -756,9 +756,6 @@ static const struct spi_nor_fixups s25fs_s_nor_fixups = =3D { }; =20 static const struct flash_info spansion_nor_parts[] =3D { - /* Spansion/Cypress -- single (large) sector size only, at least - * for the chips listed here (without boot sectors). - */ { "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64) NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128) diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index 57df68eab6aa..1e06c6841a18 100644 --- a/drivers/mtd/spi-nor/sst.c +++ b/drivers/mtd/spi-nor/sst.c @@ -61,7 +61,6 @@ static const struct spi_nor_fixups sst26vf_nor_fixups =3D= { }; =20 static const struct flash_info sst_nor_parts[] =3D { - /* SST -- large erase sizes are "overlays", "sectors" are 4K */ { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 7873cc394f07..2d3ae972b419 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -42,7 +42,6 @@ static const struct spi_nor_fixups w25q256_fixups =3D { }; =20 static const struct flash_info winbond_nor_parts[] =3D { - /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ { "w25x05", INFO(0xef3010, 0, 64 * 1024, 1) NO_SFDP_FLAGS(SECT_4K) }, { "w25x10", INFO(0xef3011, 0, 64 * 1024, 2) diff --git a/drivers/mtd/spi-nor/xmc.c b/drivers/mtd/spi-nor/xmc.c index 051411e86339..48062ccb22fa 100644 --- a/drivers/mtd/spi-nor/xmc.c +++ b/drivers/mtd/spi-nor/xmc.c @@ -9,7 +9,6 @@ #include "core.h" =20 static const struct flash_info xmc_nor_parts[] =3D { - /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ { "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, @@ -18,6 +17,7 @@ static const struct flash_info xmc_nor_parts[] =3D { SPI_NOR_QUAD_READ) }, }; =20 +/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ const struct spi_nor_manufacturer spi_nor_xmc =3D { .name =3D "xmc", .parts =3D xmc_nor_parts, --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE78EEE49A3 for ; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688210; bh=yRymFxs0ZgCRKKfeCO93P0NNgII3piuTmdoZV/3f5XU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=kVhTsKoTYuerp+l0yRF7WqiCX5iyQFqQOOO8PhCFn4vyGqRzin/xCzIzM/HXhkgSZ Edd3UHHHwSCD0tIOyYHkwmdIXLTzP01MoFSUTHsyFPOKawmrXWRt5jmgaWpOJdcDpG jHMIYuyaiDumJDC+kRjl4IDhgnufcOVT3Vcjf6Br14gXQR8hZdGRw+giCL6dX0jiY7 ihWTwNgxhfTTaDcjpa31nhhjp5s/8qUGbtI7/rLbDNmonaiuPijdUskBhf6AD7f3Hs 4uOlrjvuA1kQdAZ7rKehe11N6J/2PoGIKg161WLtmg5B2iDILLrFG7lEibhXsFcRA7 BbEKudoCzDEyQ== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:33 +0200 Subject: [PATCH v2 17/41] mtd: spi-nor: atmel: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-17-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/atmel.c | 122 +++++++++++++++++++++++++++++-----------= ---- 1 file changed, 80 insertions(+), 42 deletions(-) diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c index d2de2cb0c066..ccc985c48ae3 100644 --- a/drivers/mtd/spi-nor/atmel.c +++ b/drivers/mtd/spi-nor/atmel.c @@ -163,48 +163,86 @@ static const struct spi_nor_fixups atmel_nor_global_p= rotection_fixups =3D { }; =20 static const struct flash_info atmel_nor_parts[] =3D { - { "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4) - FLAGS(SPI_NOR_HAS_LOCK) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &at25fs_nor_fixups }, - { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8) - FLAGS(SPI_NOR_HAS_LOCK) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &at25fs_nor_fixups }, - { "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_nor_global_protection_fixups }, - { "at25df321", INFO(0x1f4700, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_nor_global_protection_fixups }, - { "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_nor_global_protection_fixups }, - { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_nor_global_protection_fixups }, - { "at25sl321", INFO(0x1f4216, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8) - NO_SFDP_FLAGS(SECT_4K) }, - { "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_nor_global_protection_fixups }, - { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_nor_global_protection_fixups }, - { "at26df321", INFO(0x1f4700, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_nor_global_protection_fixups }, - { "at45db081d", INFO(0x1f2500, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K) }, + { + .id =3D SNOR_ID(0x1f, 0x66, 0x01), + .name =3D "at25fs010", + .sector_size =3D SZ_32K, + .size =3D SZ_128K, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &at25fs_nor_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x66, 0x04), + .name =3D "at25fs040", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &at25fs_nor_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x44, 0x01), + .name =3D "at25df041a", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &atmel_nor_global_protection_fixups, + }, { + .id =3D SNOR_ID(0x1f, 0x47, 0x00), + .name =3D "at25df321", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &atmel_nor_global_protection_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x47, 0x01), + .name =3D "at25df321a", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &atmel_nor_global_protection_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x48, 0x00), + .name =3D "at25df641", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &atmel_nor_global_protection_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x42, 0x16), + .name =3D "at25sl321", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x1f, 0x04, 0x00), + .name =3D "at26f004", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x1f, 0x45, 0x01), + .name =3D "at26df081a", + .size =3D SZ_1M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &atmel_nor_global_protection_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x46, 0x01), + .name =3D "at26df161a", + .size =3D SZ_2M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &atmel_nor_global_protection_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x47, 0x00), + .name =3D "at26df321", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &atmel_nor_global_protection_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x25, 0x00), + .name =3D "at45db081d", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K, + }, }; =20 const struct spi_nor_manufacturer spi_nor_atmel =3D { --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A88EEE49A3 for ; Tue, 22 Aug 2023 07:11:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233315AbjHVHLQ (ORCPT ); Tue, 22 Aug 2023 03:11:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233309AbjHVHLF (ORCPT ); Tue, 22 Aug 2023 03:11:05 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7337EE61 for ; Tue, 22 Aug 2023 00:10:39 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 87A8F64D7B for ; Tue, 22 Aug 2023 07:10:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 42DB6C433CB; Tue, 22 Aug 2023 07:10:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688212; bh=FMrL+V9+pSz441pre2fqIuiBhaXySkpsxmO1V8C9qk8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=NnnND7hT7KN2mCxrnEse4O7hVa7RnICLH8m3d9nH0sbVyS0JrElMUbNV0mNjuGTzi svpDGG4GbupBmUdFAtjrj6iKuV+xEbyJ4y0RVMBiSTZEI77geG/SDg7neD0CUikUPv y6ConZFZNzIDfvR0QaPRLKLyvRHd16JD8dFzm2/2rJfcexglGOCsLbneWwdKvYZtxN apZWjA4FJR+TtDhwr1naDJpx0eAgjzRdw0h2W5pFRFmF9irg7TgObzrbKaS7maBq23 aeAw3bVRWMEsNLpLFRP+9ITIEZ792fjeD3qs46MhEF8btSF2zPwGn8e1DVcG0EOZCb UBHLFXcMKVz2g== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:34 +0200 Subject: [PATCH v2 18/41] mtd: spi-nor: eon: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-18-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/eon.c | 72 +++++++++++++++++++++++++++++++++++--------= ---- 1 file changed, 54 insertions(+), 18 deletions(-) diff --git a/drivers/mtd/spi-nor/eon.c b/drivers/mtd/spi-nor/eon.c index 4848ffe8b38f..ba09cb6c2abd 100644 --- a/drivers/mtd/spi-nor/eon.c +++ b/drivers/mtd/spi-nor/eon.c @@ -9,24 +9,60 @@ #include "core.h" =20 static const struct flash_info eon_nor_parts[] =3D { - { "en25f32", INFO(0x1c3116, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64) }, - { "en25q32b", INFO(0x1c3016, 0, 64 * 1024, 64) }, - { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128) }, - { "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K) }, - { "en25q80a", INFO(0x1c3014, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "en25qh16", INFO(0x1c7015, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "en25qh32", INFO(0x1c7016, 0, 64 * 1024, 64) }, - { "en25qh64", INFO(0x1c7017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "en25qh128", INFO(0x1c7018, 0, 64 * 1024, 256) }, - { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 0) }, - { "en25s64", INFO(0x1c3817, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K) }, + { + .id =3D SNOR_ID(0x1c, 0x31, 0x16), + .name =3D "en25f32", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x1c, 0x20, 0x16), + .name =3D "en25p32", + .size =3D SZ_4M, + }, { + .id =3D SNOR_ID(0x1c, 0x30, 0x16), + .name =3D "en25q32b", + .size =3D SZ_4M, + }, { + .id =3D SNOR_ID(0x1c, 0x20, 0x17), + .name =3D "en25p64", + .size =3D SZ_8M, + }, { + .id =3D SNOR_ID(0x1c, 0x30, 0x17), + .name =3D "en25q64", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x1c, 0x30, 0x14), + .name =3D "en25q80a", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x1c, 0x70, 0x15), + .name =3D "en25qh16", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x1c, 0x70, 0x16), + .name =3D "en25qh32", + .size =3D SZ_4M, + }, { + .id =3D SNOR_ID(0x1c, 0x70, 0x17), + .name =3D "en25qh64", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x1c, 0x70, 0x18), + .name =3D "en25qh128", + .size =3D SZ_16M, + }, { + .id =3D SNOR_ID(0x1c, 0x70, 0x19), + .name =3D "en25qh256", + }, { + .name =3D "en25s64", + .id =3D SNOR_ID(0x1c, 0x38, 0x17), + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, + }, }; =20 const struct spi_nor_manufacturer spi_nor_eon =3D { --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2EC0FEE49A5 for ; Tue, 22 Aug 2023 07:12:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233486AbjHVHMQ (ORCPT ); Tue, 22 Aug 2023 03:12:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36856 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233397AbjHVHLo (ORCPT ); Tue, 22 Aug 2023 03:11:44 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8522410C6 for ; Tue, 22 Aug 2023 00:11:15 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 67C1964D73 for ; Tue, 22 Aug 2023 07:10:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 36B54C433C8; Tue, 22 Aug 2023 07:10:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688214; bh=Oyq3JU+jD6JnYKUuJ4JBwmfio4ODb3qr1zJ7EbxtHwc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=eVtozZejeiHIL8QwemgG7UtgxfZN1SKMylhRkZA+6wPbRLWlfFMMlbjxYSXhdxRko 1elffcVZ4VVThTubT+JqGK9nswKpqpKM9oOaWzK7kHru2EwSgHY0NB5TsQJZsparGc mZ/+VREHYoqDrE9BX2sFLOAMqTaGmXH9qAecOrtBTXK16AujcJy0sb/LAPtvyJgYAK 2W2dmLEPxe6HKcOnNKHA77BqizkovPfsFbi+h4hR2J/MwCwRe5SwhZt93AXTZv6rtL 8a5oZBbXnVShE+ujMxvU7TzzB2C34XBrGaHjVPcPFw915dqOlZr+tO2NZqrsHNU3Qy HBgkwdu74KHBA== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:35 +0200 Subject: [PATCH v2 19/41] mtd: spi-nor: esmt: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-19-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/esmt.c | 28 +++++++++++++++++++--------- 1 file changed, 19 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/spi-nor/esmt.c b/drivers/mtd/spi-nor/esmt.c index 12779bec5f99..089fcd1aa794 100644 --- a/drivers/mtd/spi-nor/esmt.c +++ b/drivers/mtd/spi-nor/esmt.c @@ -9,15 +9,25 @@ #include "core.h" =20 static const struct flash_info esmt_nor_parts[] =3D { - { "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) }, - { "f25l32qa-2s", INFO(0x8c4116, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK) - NO_SFDP_FLAGS(SECT_4K) }, - { "f25l64qa", INFO(0x8c4117, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK) - NO_SFDP_FLAGS(SECT_4K) }, + { + .id =3D SNOR_ID(0x8c, 0x20, 0x16), + .name =3D "f25l32pa", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x8c, 0x41, 0x16), + .name =3D "f25l32qa-2s", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x8c, 0x41, 0x17), + .name =3D "f25l64qa", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SECT_4K, + } }; =20 const struct spi_nor_manufacturer spi_nor_esmt =3D { --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8B1FEE49A5 for ; Tue, 22 Aug 2023 07:11:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233299AbjHVHLU (ORCPT ); Tue, 22 Aug 2023 03:11:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233313AbjHVHLF (ORCPT ); Tue, 22 Aug 2023 03:11:05 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3FB21CCA for ; Tue, 22 Aug 2023 00:10:40 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6881E64D7C for ; Tue, 22 Aug 2023 07:10:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 28BF8C433CC; Tue, 22 Aug 2023 07:10:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688216; bh=1nkVQlo/pntUPcuI8tZ3St9xyXgZLdanptrUEPEewkQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=LFoG8gSTkoJhFzHczhh0BgG1vvx1AhRxcZ6OoMDfYKnXyyyhpwNUEYjCA9ve1azqj 8LtnjVqRwEjf9GLtLDdXOGd94DJBgRxvEW7BAkFDsknGu5IX9US1erettBCjRCTXcz mU7krvqFmZcLSG24J6SH3LTW0ii5F1divg0Rrq9lQA/wUTd6K8TIcmcsjb3gWoui9O HghvIeUnwzAKnyQZCvXXHDYSi8CondZsc3Doh5fl8EIRYW9tMHVLtjv6ayeYZMvyyP UqPPXMBk6stxJB8TlbWd7k/IrnHK6MmxZejXcxL0aw2/Y12K2xvwKLqgyHgSK/cs/K YAByhxOkqJbSA== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:36 +0200 Subject: [PATCH v2 20/41] mtd: spi-nor: everspin: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-20-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/everspin.c | 33 +++++++++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi-nor/everspin.c b/drivers/mtd/spi-nor/everspin.c index d02c32f2f7ad..46776bc10b27 100644 --- a/drivers/mtd/spi-nor/everspin.c +++ b/drivers/mtd/spi-nor/everspin.c @@ -9,10 +9,35 @@ #include "core.h" =20 static const struct flash_info everspin_nor_parts[] =3D { - { "mr25h128", CAT25_INFO(16 * 1024, 1, 256, 2) }, - { "mr25h256", CAT25_INFO(32 * 1024, 1, 256, 2) }, - { "mr25h10", CAT25_INFO(128 * 1024, 1, 256, 3) }, - { "mr25h40", CAT25_INFO(512 * 1024, 1, 256, 3) }, + { + .name =3D "mr25h128", + .size =3D SZ_16K, + .sector_size =3D SZ_16K, + .page_size =3D 256, + .addr_nbytes =3D 2, + .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, + }, { + .name =3D "mr25h256", + .size =3D SZ_32K, + .sector_size =3D SZ_32K, + .page_size =3D 256, + .addr_nbytes =3D 2, + .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, + }, { + .name =3D "mr25h10", + .size =3D SZ_128K, + .sector_size =3D SZ_128K, + .page_size =3D 256, + .addr_nbytes =3D 3, + .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, + }, { + .name =3D "mr25h40", + .size =3D SZ_512K, + .sector_size =3D SZ_512K, + .page_size =3D 256, + .addr_nbytes =3D 3, + .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, + } }; =20 const struct spi_nor_manufacturer spi_nor_everspin =3D { --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7FFCEE49A8 for ; Tue, 22 Aug 2023 07:10:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233272AbjHVHKz (ORCPT ); Tue, 22 Aug 2023 03:10:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50404 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233269AbjHVHKv (ORCPT ); Tue, 22 Aug 2023 03:10:51 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D0A4DCF4 for ; Tue, 22 Aug 2023 00:10:23 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 4A63C64D82 for ; Tue, 22 Aug 2023 07:10:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1A1FDC433C8; Tue, 22 Aug 2023 07:10:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688218; bh=Wbw26ozDm2yZuCOCpEEf+tY0cT7CvfziJiMaObcpSys=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=mmxyc4wJY27mkv279ZEKdvaGRZREKH9zng9wVwhumEcVVM7f0mpztL97pe0poTRPH ND+emjQTT4LHvL3g1/4bJUHVZuPedIjuxMVtTEHkKVSlsiLgGbHRrsqErCYPIjA10U 9BfbpB0nQrUDUUdbEvI7NdS9MN6Vs0UEsl+W5vXVNqV/r5CHLhy/oMevZz75E4pdD+ TwpQClcIQRM83vc29iXj9+qDwMWT6JD6GCD8DxKy6jTli2tkEGkES0FTcoUAMpX5JS e2lb9wmP/HvV3QXsrKXzkG+FChdHz+3W+AToeH41k68rdYfbb5jnHECoITJYyo/0TI n8dcPQF4Ouh2A== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:37 +0200 Subject: [PATCH v2 21/41] mtd: spi-nor: gigadevice: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-21-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/gigadevice.c | 81 ++++++++++++++++++++++++------------= ---- 1 file changed, 49 insertions(+), 32 deletions(-) diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadev= ice.c index 7cf142c75529..0d22cd99715b 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -34,38 +34,55 @@ static const struct spi_nor_fixups gd25q256_fixups =3D { }; =20 static const struct flash_info gigadevice_nor_parts[] =3D { - { "gd25q16", INFO(0xc84015, 0, 64 * 1024, 32) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "gd25q32", INFO(0xc84016, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "gd25lq32", INFO(0xc86016, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "gd25lq64c", INFO(0xc86017, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "gd25lq128d", INFO(0xc86018, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "gd25q256", INFO(0xc84019, 0, 64 * 1024, 0) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - .fixups =3D &gd25q256_fixups }, + { + .id =3D SNOR_ID(0xc8, 0x40, 0x15), + .name =3D "gd25q16", + .size =3D SZ_2M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x40, 0x16), + .name =3D "gd25q32", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x60, 0x16), + .name =3D "gd25lq32", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x40, 0x17), + .name =3D "gd25q64", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x60, 0x17), + .name =3D "gd25lq64c", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x60, 0x18), + .name =3D "gd25lq128d", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x40, 0x18), + .name =3D "gd25q128", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x40, 0x19), + .name =3D "gd25q256", + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6, + .fixups =3D &gd25q256_fixups, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, }; =20 const struct spi_nor_manufacturer spi_nor_gigadevice =3D { --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 369F8EE49A8 for ; Tue, 22 Aug 2023 07:12:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229782AbjHVHMo (ORCPT ); Tue, 22 Aug 2023 03:12:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233399AbjHVHMG (ORCPT ); Tue, 22 Aug 2023 03:12:06 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B02361B0 for ; Tue, 22 Aug 2023 00:11:40 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 39F7864CC7 for ; Tue, 22 Aug 2023 07:10:21 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0BB66C433BC; Tue, 22 Aug 2023 07:10:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688220; bh=pG2FdGd2bZ50xpBr1ZIaO+fF4bmW9tYC4LsRjQC4xQA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=AoMaX57tssEMHT7Lw/b1VgFDu/uH21dVi3RRPacPIp9oLcnrUliyNANPdFyDYBMzl sL5XNZYaKUpmo4JKg2GgaM8/Gc3Jch/Bkgxz4Jlyn1ORuH+xVnpJ9fH+HAefGIZb6g RIW6d+rNRgPiVsJJWqfwljf65Cd7v2HXvUcwf6vzL9gVnLrWX42/hzIzIEG2dfho9Z KnPXlT8NYWhl2Aqpp1helhHCoGW871VfnmEcCghEefgGUtKD/Ewknthprj5RSWkadv t+GE9EpgHyVkINzZNKcJojlEA3ZuxYFc3bLD9jkFDFB+Ri5b7jtY6nTZjy13x5nehJ Kmup4dPWR3zvw== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:38 +0200 Subject: [PATCH v2 22/41] mtd: spi-nor: intel: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-22-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/intel.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/spi-nor/intel.c b/drivers/mtd/spi-nor/intel.c index aba62759a02e..f647359fee7a 100644 --- a/drivers/mtd/spi-nor/intel.c +++ b/drivers/mtd/spi-nor/intel.c @@ -9,12 +9,22 @@ #include "core.h" =20 static const struct flash_info intel_nor_parts[] =3D { - { "160s33b", INFO(0x898911, 0, 64 * 1024, 32) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, - { "320s33b", INFO(0x898912, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, - { "640s33b", INFO(0x898913, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, + { + .id =3D SNOR_ID(0x89, 0x89, 0x11), + .name =3D "160s33b", + .size =3D SZ_2M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + }, { + .id =3D SNOR_ID(0x89, 0x89, 0x12), + .name =3D "320s33b", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + }, { + .id =3D SNOR_ID(0x89, 0x89, 0x13), + .name =3D "640s33b", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + } }; =20 const struct spi_nor_manufacturer spi_nor_intel =3D { --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F823EE49A8 for ; Tue, 22 Aug 2023 07:11:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233363AbjHVHLW (ORCPT ); Tue, 22 Aug 2023 03:11:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50660 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233290AbjHVHLF (ORCPT ); Tue, 22 Aug 2023 03:11:05 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CB9CECC8 for ; Tue, 22 Aug 2023 00:10:40 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 2F54D64D77 for ; Tue, 22 Aug 2023 07:10:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 00447C433C8; Tue, 22 Aug 2023 07:10:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688222; bh=u3h1HEnFV5TaycBrs44qWUZVzeJsRZVGR9YPZRIQPdw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=i6tsOiYacy5pDoG3MZoOfb449zFhRoJ1yWOsPe/y3p1sos9s5RTgahaLvuNnlMeuJ 8W64RS/m199kCR7ORAB/tuBxvFesulQO3nV7Gh3TM78E8Dq/4mdMOeBx6aTe7xBglf mrznSaNkcoeMHepgTfp5mN57qh8bujkykYtyuHBXv52CQ/b3AKay4SQ6uTQBiMTZzd b7UrrzpSsoFrQgcV9E/B6frRZOcShb3TEPQnVn+IW2336BmJlWo/A3I+AlOzQ+uTHN vxh8C7e1zR+vIou6fcsBqOgZfWSveS56jnCVhMBfEI9+G4CBmcYY+f+BpolzziAK8s sSUjdjQTZ9/JQ== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:39 +0200 Subject: [PATCH v2 23/41] mtd: spi-nor: issi: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-23-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/issi.c | 114 +++++++++++++++++++++++++++++++----------= ---- 1 file changed, 78 insertions(+), 36 deletions(-) diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index d31401bcab64..9478f1e61626 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -47,44 +47,86 @@ static const struct spi_nor_fixups pm25lv_nor_fixups = =3D { }; =20 static const struct flash_info issi_nor_parts[] =3D { - { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2) - NO_SFDP_FLAGS(SECT_4K) }, - { "is25lq040b", INFO(0x9d4013, 0, 64 * 1024, 8) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "is25lp016d", INFO(0x9d6015, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "is25lp080d", INFO(0x9d6014, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "is25lp032", INFO(0x9d6016, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "is25lp064", INFO(0x9d6017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "is25lp128", INFO(0x9d6018, 0, 64 * 1024, 256) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "is25lp256", INFO(0x9d6019, 0, 64 * 1024, 0) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - .fixups =3D &is25lp256_fixups }, - { "is25wp032", INFO(0x9d7016, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "is25wp064", INFO(0x9d7017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "is25wp128", INFO(0x9d7018, 0, 64 * 1024, 256) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "is25wp256", INFO(0x9d7019, 0, 0, 0) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - FLAGS(SPI_NOR_QUAD_PP) - .fixups =3D &is25lp256_fixups }, - - { "pm25lv512", INFO0(32 * 1024, 2) - NO_SFDP_FLAGS(SECT_4K) + { + .id =3D SNOR_ID(0x7f, 0x9d, 0x20), + .name =3D "is25cd512", + .sector_size =3D SZ_32K, + .size =3D SZ_64K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x9d, 0x40, 0x13), + .name =3D "is25lq040b", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x60, 0x15), + .name =3D "is25lp016d", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x60, 0x14), + .name =3D "is25lp080d", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x60, 0x16), + .name =3D "is25lp032", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x60, 0x17), + .name =3D "is25lp064", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x60, 0x18), + .name =3D "is25lp128", + .size =3D SZ_16M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x60, 0x19), + .name =3D "is25lp256", + .fixups =3D &is25lp256_fixups, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0x9d, 0x70, 0x16), + .name =3D "is25wp032", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x70, 0x17), + .size =3D SZ_8M, + .name =3D "is25wp064", + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x70, 0x18), + .name =3D "is25wp128", + .size =3D SZ_16M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x70, 0x19), + .name =3D "is25wp256", + .flags =3D SPI_NOR_QUAD_PP, + .fixups =3D &is25lp256_fixups, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .name =3D "pm25lv512", + .sector_size =3D SZ_32K, + .size =3D SZ_64K, + .no_sfdp_flags =3D SECT_4K, .fixups =3D &pm25lv_nor_fixups - }, - { "pm25lv010", INFO0(32 * 1024, 4) - NO_SFDP_FLAGS(SECT_4K) + }, { + .name =3D "pm25lv010", + .sector_size =3D SZ_32K, + .size =3D SZ_128K, + .no_sfdp_flags =3D SECT_4K, .fixups =3D &pm25lv_nor_fixups - }, - { "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, + }, { + .id =3D SNOR_ID(0x7f, 0x9d, 0x46), + .name =3D "pm25lq032", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + } }; =20 static void issi_nor_default_init(struct spi_nor *nor) --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F21BEE49A8 for ; Tue, 22 Aug 2023 07:11:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233369AbjHVHLi (ORCPT ); Tue, 22 Aug 2023 03:11:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58060 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233356AbjHVHLV (ORCPT ); Tue, 22 Aug 2023 03:11:21 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E4630E42 for ; Tue, 22 Aug 2023 00:10:57 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 2128164D7D for ; Tue, 22 Aug 2023 07:10:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E5E1CC433BB; Tue, 22 Aug 2023 07:10:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688224; bh=oMgc1/5JxnhtyDALEk/TOuQOpIC5QJP7tEpRGwFyIfU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=j0ei8pVvf0VQ+WZbuLET4z1QjIyOlT6wIXzUuZPctaECvTI6mpdmHulZsJlVYUx+M OPBRWsKH+GvQ69LUuvS/NPv14oMU6aK3LV55WqzhZwweJIMQyZFZM46HQ07pfurvvp 5EiismGZctT3wHuslwQ8V+vAmssvPm1PeqqVyTEBYA3Ty8Y24XUBEBiDhfGXNhY5Bp nySrLfirCifnF9zQbEp/YNHKDoMC9SasUuKigoz6OY1vjYkecl/4KSVLe3Q95U1AMK TYT8jLMnclDgSNT9Fkr/LKkbptANTuiyLBgLllf8YdCCE7QFzqvawrpiA8y6AitrRu UJRgBNH3KXfug== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:40 +0200 Subject: [PATCH v2 24/41] mtd: spi-nor: macronix: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-24-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/macronix.c | 218 ++++++++++++++++++++++++++++---------= ---- 1 file changed, 150 insertions(+), 68 deletions(-) diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index b21e688fe056..0508a207e9df 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -33,74 +33,156 @@ static const struct spi_nor_fixups mx25l25635_fixups = =3D { }; =20 static const struct flash_info macronix_nor_parts[] =3D { - { "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l2005a", INFO(0xc22012, 0, 64 * 1024, 4) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l4005a", INFO(0xc22013, 0, 64 * 1024, 8) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l8005", INFO(0xc22014, 0, 64 * 1024, 16) }, - { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "mx25u4035", INFO(0xc22533, 0, 64 * 1024, 8) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25u8035", INFO(0xc22534, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256) }, - { "mx25r1635f", INFO(0xc22815, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "mx25r3235f", INFO(0xc22816, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "mx25u12835f", INFO(0xc22538, 0, 64 * 1024, 256) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - .fixups =3D &mx25l25635_fixups }, - { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, - { "mx25u51245g", INFO(0xc2253a, 0, 64 * 1024, 1024) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, - { "mx25uw51245g", INFOB(0xc2813a, 0, 0, 0, 4) - FLAGS(SPI_NOR_RWW) }, - { "mx25v8035f", INFO(0xc22314, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512) }, - { "mx66l51235f", INFO(0xc2201a, 0, 64 * 1024, 1024) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, - { "mx66u51235f", INFO(0xc2253a, 0, 64 * 1024, 1024) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, - { "mx66l1g45g", INFO(0xc2201b, 0, 64 * 1024, 2048) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048) - NO_SFDP_FLAGS(SPI_NOR_QUAD_READ) }, - { "mx66u2g45g", INFO(0xc2253c, 0, 64 * 1024, 4096) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, + { + .id =3D SNOR_ID(0xc2, 0x20, 0x10), + .name =3D "mx25l512e", + .size =3D SZ_64K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x12), + .name =3D "mx25l2005a", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x13), + .name =3D "mx25l4005a", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x14), + .name =3D "mx25l8005", + .size =3D SZ_1M, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x15), + .name =3D "mx25l1606e", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x16), + .name =3D "mx25l3205d", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x9e, 0x16), + .name =3D "mx25l3255e", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x17), + .name =3D "mx25l6405d", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x32), + .name =3D "mx25u2033e", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x36), + .name =3D "mx25u3235f", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x33), + .name =3D "mx25u4035", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x34), + .name =3D "mx25u8035", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x37), + .name =3D "mx25u6435f", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x18), + .name =3D "mx25l12805d", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x26, 0x18), + .name =3D "mx25l12855e", + .size =3D SZ_16M, + }, { + .id =3D SNOR_ID(0xc2, 0x28, 0x15), + .name =3D "mx25r1635f", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x28, 0x16), + .name =3D "mx25r3235f", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x38), + .name =3D "mx25u12835f", + .size =3D SZ_16M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x19), + .name =3D "mx25l25635e", + .size =3D SZ_32M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixups =3D &mx25l25635_fixups + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x39), + .name =3D "mx25u25635f", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K, + FIXUP_FLAGS(SPI_NOR_4B_OPCODES) + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x3a), + .name =3D "mx25u51245g", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0xc2, 0x81, 0x3a), + .name =3D "mx25uw51245g", + .n_banks =3D 4, + .flags =3D SPI_NOR_RWW, + }, { + .id =3D SNOR_ID(0xc2, 0x23, 0x14), + .name =3D "mx25v8035f", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x26, 0x19), + .name =3D "mx25l25655e", + .size =3D SZ_32M, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x1a), + .name =3D "mx66l51235f", + .size =3D SZ_64M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x3a), + .name =3D "mx66u51235f", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x1b), + .name =3D "mx66l1g45g", + .size =3D SZ_128M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x26, 0x1b), + .name =3D "mx66l1g55g", + .size =3D SZ_128M, + .no_sfdp_flags =3D SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x3c), + .name =3D "mx66u2g45g", + .size =3D SZ_256M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, }; =20 static void macronix_nor_default_init(struct spi_nor *nor) --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05F51EE49A8 for ; Tue, 22 Aug 2023 07:11:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via 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t=1692688226; bh=jKxDZT+qryyIWW++zQGnQdmrNqAzQRffxtMJjsy7a/M=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=InL0RwsrRTgr6oCtgNsZ4Ntm4oHOa5wGTMix9P59zckC1urkUet7+Qk70/pTGx09x F+98+Q4+yLFKHMNpznhp1TNWJW8weTYj1n9lWqydlMx8RRY27eznzaGCUUlZJu7795 qk54pL5/49vOHuLQ1gycW6UKCIhIcWWC8PaU0+wsIILqpz7jACJYJWpY5VcjkWZcl3 E3svQqhhLvMYjlRoMy9jwRXsfclHpq2+KGWrDBqMBcaKtlBt4hb++mMqCMFzn628K3 wWG6jVQxk4bGimX+T3/fa4r/s+MQbKw1DEUZRa45XvTtrSwK0K6x76flXrRlVBeVrB wAZ06Ud2jQ/nw== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:41 +0200 Subject: [PATCH v2 25/41] mtd: spi-nor: micron-st: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-25-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/micron-st.c | 405 ++++++++++++++++++++++++++----------= ---- 1 file changed, 268 insertions(+), 137 deletions(-) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 229c951efcce..720fd2fbd0ad 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -159,148 +159,279 @@ static const struct spi_nor_fixups mt35xu512aba_fix= ups =3D { }; =20 static const struct flash_info micron_nor_parts[] =3D { - { "mt35xu512aba", INFO(0x2c5b1a, 0, 128 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_OCTAL_READ | - SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE) - MFR_FLAGS(USE_FSR) - .fixups =3D &mt35xu512aba_fixups - }, - { "mt35xu02g", INFO(0x2c5b1c, 0, 128 * 1024, 2048) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_OCTAL_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - MFR_FLAGS(USE_FSR) + { + .id =3D SNOR_ID(0x2c, 0x5b, 0x1a), + .name =3D "mt35xu512aba", + .sector_size =3D SZ_128K, + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_OCTAL_READ | + SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP, + .mfr_flags =3D USE_FSR, + .fixup_flags =3D SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE, + .fixups =3D &mt35xu512aba_fixups, + }, { + .id =3D SNOR_ID(0x2c, 0x5b, 0x1c), + .name =3D "mt35xu02g", + .sector_size =3D SZ_128K, + .size =3D SZ_256M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_OCTAL_READ, + .mfr_flags =3D USE_FSR, + .fixup_flags =3D SPI_NOR_4B_OPCODES, }, }; =20 static const struct flash_info st_nor_parts[] =3D { - { "n25q016a", INFO(0x20bb15, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, - { "n25q032", INFO(0x20ba16, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SPI_NOR_QUAD_READ) }, - { "n25q032a", INFO(0x20bb16, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SPI_NOR_QUAD_READ) }, - { "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, - { "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, - { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "mt25ql256a", INFO6(0x20ba19, 0x104400, 64 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - MFR_FLAGS(USE_FSR) - }, - { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "mt25qu256a", INFO6(0x20bb19, 0x104400, 64 * 1024, 512) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - MFR_FLAGS(USE_FSR) - }, - { "n25q256ax1", INFO(0x20bb19, 0, 64 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "mt25ql512a", INFO6(0x20ba20, 0x104400, 64 * 1024, 1024) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - MFR_FLAGS(USE_FSR) - }, - { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) + { + .id =3D SNOR_ID(0x20, 0xbb, 0x15), + .name =3D "n25q016a", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x16), + .name =3D "n25q032", + .size =3D SZ_4M, + .no_sfdp_flags =3D SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x16), + .name =3D "n25q032a", + .size =3D SZ_4M, + .no_sfdp_flags =3D SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x17), + .name =3D "n25q064", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x17), + .name =3D "n25q064a", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x18), + .name =3D "n25q128a11", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x18), + .name =3D "n25q128a13", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x19, 0x10, 0x44, 0x00), + .name =3D "mt25ql256a", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x19), + .name =3D "n25q256a", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x19, 0x10, 0x44, 0x00), + .name =3D "mt25qu256a", + .size =3D SZ_32M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x19), + .name =3D "n25q256ax1", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x20, 0x10, 0x44, 0x00), + .name =3D "mt25ql512a", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x20), + .name =3D "n25q512ax3", + .size =3D SZ_64M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x20, 0x10, 0x44, 0x00), + .name =3D "mt25qu512a", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x20), + .name =3D "n25q512a", + .size =3D SZ_64M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x21), + .name =3D "n25q00", + .size =3D SZ_128M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x21), + .name =3D "n25q00a", + .size =3D SZ_128M, + .flags =3D NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x22), + .name =3D "mt25ql02g", + .size =3D SZ_256M, + .flags =3D NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x22), + .name =3D "mt25qu02g", + .size =3D SZ_256M, + .flags =3D NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x10), + .name =3D "m25p05", + .sector_size =3D SZ_32K, + .size =3D SZ_64K, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x11), + .name =3D "m25p10", + .sector_size =3D SZ_32K, + .size =3D SZ_128K, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x12), + .name =3D "m25p20", + .size =3D SZ_256K, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x13), + .name =3D "m25p40", + .size =3D SZ_512K, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x14), + .name =3D "m25p80", + .size =3D SZ_1M, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x15), + .name =3D "m25p16", + .size =3D SZ_2M, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x16), + .name =3D "m25p32", + .size =3D SZ_4M, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x17), + .name =3D "m25p64", + .size =3D SZ_8M, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x18), + .name =3D "m25p128", + .sector_size =3D SZ_256K, + .size =3D SZ_16M, + }, { + .name =3D "m25p05-nonjedec", + .sector_size =3D SZ_32K, + .size =3D SZ_64K, + }, { + .name =3D "m25p10-nonjedec", + .sector_size =3D SZ_32K, + .size =3D SZ_128K, + }, { + .name =3D "m25p20-nonjedec", + .size =3D SZ_256K, + }, { + .name =3D "m25p40-nonjedec", + .size =3D SZ_512K, + }, { + .name =3D "m25p80-nonjedec", + .size =3D SZ_1M, + }, { + .name =3D "m25p16-nonjedec", + .size =3D SZ_2M, + }, { + .name =3D "m25p32-nonjedec", + .size =3D SZ_4M, + }, { + .name =3D "m25p64-nonjedec", + .size =3D SZ_8M, + }, { + .name =3D "m25p128-nonjedec", + .sector_size =3D SZ_256K, + .size =3D SZ_16M, + }, { + .id =3D SNOR_ID(0x20, 0x40, 0x11), + .name =3D "m45pe10", + .size =3D SZ_128K, + }, { + .id =3D SNOR_ID(0x20, 0x40, 0x14), + .name =3D "m45pe80", + .size =3D SZ_1M, + }, { + .id =3D SNOR_ID(0x20, 0x40, 0x15), + .name =3D "m45pe16", + .size =3D SZ_2M, + }, { + .id =3D SNOR_ID(0x20, 0x80, 0x12), + .name =3D "m25pe20", + .size =3D SZ_256K, + }, { + .id =3D SNOR_ID(0x20, 0x80, 0x14), + .name =3D "m25pe80", + .size =3D SZ_1M, + }, { + .id =3D SNOR_ID(0x20, 0x80, 0x15), + .name =3D "m25pe16", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x20, 0x71, 0x15), + .name =3D "m25px16", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x20, 0x71, 0x16), + .name =3D "m25px32", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x20, 0x73, 0x16), + .name =3D "m25px32-s0", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x20, 0x63, 0x16), + .name =3D "m25px32-s1", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x20, 0x71, 0x17), + .name =3D "m25px64", + .size =3D SZ_8M, + }, { + .id =3D SNOR_ID(0x20, 0x71, 0x14), + .name =3D "m25px80", + .size =3D SZ_1M, }, - { "mt25qu512a", INFO6(0x20bb20, 0x104400, 64 * 1024, 1024) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - MFR_FLAGS(USE_FSR) - }, - { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048) - FLAGS(NO_CHIP_ERASE) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "mt25ql02g", INFO(0x20ba22, 0, 64 * 1024, 4096) - FLAGS(NO_CHIP_ERASE) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "mt25qu02g", INFO(0x20bb22, 0, 64 * 1024, 4096) - FLAGS(NO_CHIP_ERASE) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - - { "m25p05", INFO(0x202010, 0, 32 * 1024, 2) }, - { "m25p10", INFO(0x202011, 0, 32 * 1024, 4) }, - { "m25p20", INFO(0x202012, 0, 64 * 1024, 4) }, - { "m25p40", INFO(0x202013, 0, 64 * 1024, 8) }, - { "m25p80", INFO(0x202014, 0, 64 * 1024, 16) }, - { "m25p16", INFO(0x202015, 0, 64 * 1024, 32) }, - { "m25p32", INFO(0x202016, 0, 64 * 1024, 64) }, - { "m25p64", INFO(0x202017, 0, 64 * 1024, 128) }, - { "m25p128", INFO(0x202018, 0, 256 * 1024, 64) }, - - { "m25p05-nonjedec", INFO0( 32 * 1024, 2) }, - { "m25p10-nonjedec", INFO0( 32 * 1024, 4) }, - { "m25p20-nonjedec", INFO0( 64 * 1024, 4) }, - { "m25p40-nonjedec", INFO0( 64 * 1024, 8) }, - { "m25p80-nonjedec", INFO0( 64 * 1024, 16) }, - { "m25p16-nonjedec", INFO0( 64 * 1024, 32) }, - { "m25p32-nonjedec", INFO0( 64 * 1024, 64) }, - { "m25p64-nonjedec", INFO0( 64 * 1024, 128) }, - { "m25p128-nonjedec", INFO0(256 * 1024, 64) }, - - { "m45pe10", INFO(0x204011, 0, 64 * 1024, 2) }, - { "m45pe80", INFO(0x204014, 0, 64 * 1024, 16) }, - { "m45pe16", INFO(0x204015, 0, 64 * 1024, 32) }, - - { "m25pe20", INFO(0x208012, 0, 64 * 1024, 4) }, - { "m25pe80", INFO(0x208014, 0, 64 * 1024, 16) }, - { "m25pe16", INFO(0x208015, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K) }, - - { "m25px16", INFO(0x207115, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K) }, - { "m25px32", INFO(0x207116, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "m25px32-s0", INFO(0x207316, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "m25px32-s1", INFO(0x206316, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "m25px64", INFO(0x207117, 0, 64 * 1024, 128) }, - { "m25px80", INFO(0x207114, 0, 64 * 1024, 16) }, }; =20 /** --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B0CFEE49A3 for ; Tue, 22 Aug 2023 07:13:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231927AbjHVHNO (ORCPT ); Tue, 22 Aug 2023 03:13:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53064 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233485AbjHVHMP (ORCPT ); Tue, 22 Aug 2023 03:12:15 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7772A1B6 for ; Tue, 22 Aug 2023 00:11:49 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 2BE186187E for ; Tue, 22 Aug 2023 07:10:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F2305C433C7; Tue, 22 Aug 2023 07:10:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688228; bh=7Ax3pkPo6UX4EijR1qZKMW+2WThEdBs7d0bv6XlTilA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=IcBfWSowtPRlY+ebEIj+W9z/htUYr3I2KQqmjIJh99d/8ILvrtfHLZRVPwgq0CA/2 euWQ1iUSzItbFUTJu6yWyLBd5coMrbMutokfh1ND5kYEdeXDBK9POXolkAyBcSYBMS CoU+28j/QeJsX33Kj3YNnHL566ZTiTEKFEK1TsOdf7RPMDOCUwZA1hUB78OsoNiNIv UQzH5wOwdJOZFENItaHoW7iP/K+BkNsyLehM4etXPt3oBA/QjYAvawf9FXZdLMK/i4 GiWwqXZQHDg9viy/jOzQCzfmYYCzjISlVEsSIVtyOmPSmpxA+Dip7GMLJFhN3spK2L YtFdz8T5rkasQ== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:42 +0200 Subject: [PATCH v2 26/41] mtd: spi-nor: spansion: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-26-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/spansion.c | 370 +++++++++++++++++++++++++++----------= ---- 1 file changed, 241 insertions(+), 129 deletions(-) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 1a1d2368c462..5953df6aff93 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -756,140 +756,252 @@ static const struct spi_nor_fixups s25fs_s_nor_fixu= ps =3D { }; =20 static const struct flash_info spansion_nor_parts[] =3D { - { "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "s25fl128s0", INFO6(0x012018, 0x4d0080, 256 * 1024, 64) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fl256s0", INFO6(0x010219, 0x4d0080, 256 * 1024, 128) - NO_SFDP_FLAGS(SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fl256s1", INFO6(0x010219, 0x4d0180, 64 * 1024, 512) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fl512s", INFO6(0x010220, 0x4d0080, 256 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fs128s1", INFO6(0x012018, 0x4d0181, 64 * 1024, 256) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - .fixups =3D &s25fs_s_nor_fixups, }, - { "s25fs256s0", INFO6(0x010219, 0x4d0081, 256 * 1024, 128) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - .fixups =3D &s25fs_s_nor_fixups, }, - { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64) }, - { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256) }, - { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8) }, - { "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16) }, - { "s25sl016a", INFO(0x010214, 0, 64 * 1024, 32) }, - { "s25sl032a", INFO(0x010215, 0, 64 * 1024, 64) }, - { "s25sl064a", INFO(0x010216, 0, 64 * 1024, 128) }, - { "s25fl004k", INFO(0xef4013, 0, 64 * 1024, 8) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "s25fl008k", INFO(0xef4014, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "s25fl016k", INFO(0xef4015, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "s25fl064k", INFO(0xef4017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "s25fl116k", INFO(0x014015, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "s25fl132k", INFO(0x014016, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "s25fl164k", INFO(0x014017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K) }, - { "s25fl204k", INFO(0x014013, 0, 64 * 1024, 8) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "s25fl208k", INFO(0x014014, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "s25fl064l", INFO(0x016017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, - { "s25fl128l", INFO(0x016018, 0, 64 * 1024, 256) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, - { "s25fl256l", INFO(0x016019, 0, 64 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, - { "s25fs256t", INFO6(0x342b19, 0x0f0890, 0, 0) - MFR_FLAGS(USE_CLPEF) - .fixups =3D &s25fs256t_fixups }, - { "s25hl512t", INFO6(0x342a1a, 0x0f0390, 0, 0) - MFR_FLAGS(USE_CLPEF) - .fixups =3D &s25hx_t_fixups }, - { "s25hl01gt", INFO6(0x342a1b, 0x0f0390, 0, 0) - MFR_FLAGS(USE_CLPEF) - .fixups =3D &s25hx_t_fixups }, - { "s25hl02gt", INFO6(0x342a1c, 0x0f0090, 0, 0) - MFR_FLAGS(USE_CLPEF) - FLAGS(NO_CHIP_ERASE) - .fixups =3D &s25hx_t_fixups }, - { "s25hs512t", INFO6(0x342b1a, 0x0f0390, 0, 0) - MFR_FLAGS(USE_CLPEF) - .fixups =3D &s25hx_t_fixups }, - { "s25hs01gt", INFO6(0x342b1b, 0x0f0390, 0, 0) - MFR_FLAGS(USE_CLPEF) - .fixups =3D &s25hx_t_fixups }, - { "s25hs02gt", INFO6(0x342b1c, 0x0f0090, 0, 0) - MFR_FLAGS(USE_CLPEF) - FLAGS(NO_CHIP_ERASE) - .fixups =3D &s25hx_t_fixups }, - { "cy15x104q", INFO6(0x042cc2, 0x7f7f7f, 512 * 1024, 1) - FLAGS(SPI_NOR_NO_ERASE) }, - { "s28hl512t", INFO(0x345a1a, 0, 0, 0) - MFR_FLAGS(USE_CLPEF) + { + .id =3D SNOR_ID(0x01, 0x02, 0x15, 0x4d, 0x00), + .name =3D "s25sl032p", + .size =3D SZ_4M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x16, 0x4d, 0x00), + .name =3D "s25sl064p", + .size =3D SZ_8M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00, 0x80), + .name =3D "s25fl128s0", + .size =3D SZ_16M, + .sector_size =3D SZ_256K, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x80), + .name =3D "s25fl128s1", + .size =3D SZ_16M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x80), + .name =3D "s25fl256s0", + .size =3D SZ_32M, + .sector_size =3D SZ_256K, + .no_sfdp_flags =3D SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_= READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x01, 0x80), + .name =3D "s25fl256s1", + .size =3D SZ_32M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x80), + .name =3D "s25fl512s", + .size =3D SZ_64M, + .sector_size =3D SZ_256K, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x81), + .name =3D "s25fs128s1", + .size =3D SZ_16M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + .fixups =3D &s25fs_s_nor_fixups, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x81), + .name =3D "s25fs256s0", + .size =3D SZ_32M, + .sector_size =3D SZ_256K, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x01, 0x81), + .name =3D "s25fs256s1", + .size =3D SZ_32M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x81), + .name =3D "s25fs512s", + .size =3D SZ_64M, + .sector_size =3D SZ_256K, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + .fixups =3D &s25fs_s_nor_fixups, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x03, 0x00), + .name =3D "s25sl12800", + .size =3D SZ_16M, + .sector_size =3D SZ_256K, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x03, 0x01), + .name =3D "s25sl12801", + .size =3D SZ_16M, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00), + .name =3D "s25fl129p0", + .size =3D SZ_16M, + .sector_size =3D SZ_256K, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01), + .name =3D "s25fl129p1", + .size =3D SZ_16M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x12), + .name =3D "s25sl004a", + .size =3D SZ_512K, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x13), + .name =3D "s25sl008a", + .size =3D SZ_1M, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x14), + .name =3D "s25sl016a", + .size =3D SZ_2M, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x15), + .name =3D "s25sl032a", + .size =3D SZ_4M, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x16), + .name =3D "s25sl064a", + .size =3D SZ_8M, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x13), + .name =3D "s25fl004k", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x14), + .name =3D "s25fl008k", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x15), + .name =3D "s25fl016k", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x17), + .name =3D "s25fl064k", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x01, 0x40, 0x15), + .name =3D "s25fl116k", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x01, 0x40, 0x16), + .name =3D "s25fl132k", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x01, 0x40, 0x17), + .name =3D "s25fl164k", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x01, 0x40, 0x13), + .name =3D "s25fl204k", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x01, 0x40, 0x14), + .name =3D "s25fl208k", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x01, 0x60, 0x17), + .name =3D "s25fl064l", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0x01, 0x60, 0x18), + .name =3D "s25fl128l", + .size =3D SZ_16M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0x01, 0x60, 0x19), + .name =3D "s25fl256l", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0x34, 0x2b, 0x19, 0x0f, 0x08, 0x90), + .name =3D "s25fs256t", + .mfr_flags =3D USE_CLPEF, + .fixups =3D &s25fs256t_fixups + }, { + .id =3D SNOR_ID(0x34, 0x2a, 0x1a, 0x0f, 0x03, 0x90), + .name =3D "s25hl512t", + .mfr_flags =3D USE_CLPEF, + .fixups =3D &s25hx_t_fixups + }, { + .id =3D SNOR_ID(0x34, 0x2a, 0x1b, 0x0f, 0x03, 0x90), + .name =3D "s25hl01gt", + .mfr_flags =3D USE_CLPEF, + .fixups =3D &s25hx_t_fixups + }, { + .id =3D SNOR_ID(0x34, 0x2a, 0x1c, 0x0f, 0x00, 0x90), + .name =3D "s25hl02gt", + .mfr_flags =3D USE_CLPEF, + .flags =3D NO_CHIP_ERASE, + .fixups =3D &s25hx_t_fixups + }, { + .id =3D SNOR_ID(0x34, 0x2b, 0x1a, 0x0f, 0x03, 0x90), + .name =3D "s25hs512t", + .mfr_flags =3D USE_CLPEF, + .fixups =3D &s25hx_t_fixups + }, { + .id =3D SNOR_ID(0x34, 0x2b, 0x1b, 0x0f, 0x03, 0x90), + .name =3D "s25hs01gt", + .mfr_flags =3D USE_CLPEF, + .fixups =3D &s25hx_t_fixups + }, { + .id =3D SNOR_ID(0x34, 0x2b, 0x1c, 0x0f, 0x00, 0x90), + .name =3D "s25hs02gt", + .mfr_flags =3D USE_CLPEF, + .flags =3D NO_CHIP_ERASE, + .fixups =3D &s25hx_t_fixups + }, { + .id =3D SNOR_ID(0x04, 0x2c, 0xc2, 0x7f, 0x7f, 0x7f), + .name =3D "cy15x104q", + .size =3D SZ_512K, + .sector_size =3D SZ_512K, + .flags =3D SPI_NOR_NO_ERASE, + }, { + .id =3D SNOR_ID(0x34, 0x5a, 0x1a), + .name =3D "s28hl512t", + .mfr_flags =3D USE_CLPEF, .fixups =3D &s28hx_t_fixups, - }, - { "s28hl01gt", INFO(0x345a1b, 0, 0, 0) - MFR_FLAGS(USE_CLPEF) + }, { + .id =3D SNOR_ID(0x34, 0x5a, 0x1b), + .name =3D "s28hl01gt", + .mfr_flags =3D USE_CLPEF, .fixups =3D &s28hx_t_fixups, - }, - { "s28hs512t", INFO(0x345b1a, 0, 0, 0) - MFR_FLAGS(USE_CLPEF) + }, { + .id =3D SNOR_ID(0x34, 0x5b, 0x1a), + .name =3D "s28hs512t", + .mfr_flags =3D USE_CLPEF, .fixups =3D &s28hx_t_fixups, - }, - { "s28hs01gt", INFO(0x345b1b, 0, 0, 0) - MFR_FLAGS(USE_CLPEF) + }, { + .id =3D SNOR_ID(0x34, 0x5b, 0x1b), + .name =3D "s28hs01gt", + .mfr_flags =3D USE_CLPEF, .fixups =3D &s28hx_t_fixups, - }, - { "s28hs02gt", INFO(0x345b1c, 0, 0, 0) - MFR_FLAGS(USE_CLPEF) + }, { + .id =3D SNOR_ID(0x34, 0x5b, 0x1c), + .name =3D "s28hs02gt", + .mfr_flags =3D USE_CLPEF, .fixups =3D &s28hx_t_fixups, - }, + } }; =20 /** --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A14CBEE49A3 for ; Tue, 22 Aug 2023 07:11:42 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688230; bh=FnqvsVEt1dn/8eNY7lxm1PrsElAnzNiLYIyWKyfbLlM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=AQXsXtIdoRlO6RP41uerEsp+RT8pjiEleA7EOBOXekY+xpg5Y3A5OGZ3mWTj//EcI E9YcdLHyLg6bmroV9IWnYtm60kORf5NkmE1ylpaYksr9PA7AGtHscY1weFgzmcWsXt 3py7J1hhyKTeJBIPWh3mMbZ/8j4y64cTzZrrC9MxqPLNwtKb1oJYwTZ18HEh3vHsWK OphjKxlQgQcFHas1liaME8w0W6ImO7KN8QGmh21vBtYMJpWD2wNAEBz0QfQhwFTXZx fVmwMk3NSzimabUESkze7+lcL6FnIcKeArjLb6tcKl3SmRiwhjn2ZyFNauLn0i7jyf oQh6NmvMbiLGQ== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:43 +0200 Subject: [PATCH v2 27/41] mtd: spi-nor: sst: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-27-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/sst.c | 162 +++++++++++++++++++++++++++++-------------= ---- 1 file changed, 104 insertions(+), 58 deletions(-) diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index 1e06c6841a18..77b271abd342 100644 --- a/drivers/mtd/spi-nor/sst.c +++ b/drivers/mtd/spi-nor/sst.c @@ -61,64 +61,110 @@ static const struct spi_nor_fixups sst26vf_nor_fixups = =3D { }; =20 static const struct flash_info sst_nor_parts[] =3D { - { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP | - SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) }, - { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25wf020a", INFO(0x621612, 0, 64 * 1024, 4) - FLAGS(SPI_NOR_HAS_LOCK) - NO_SFDP_FLAGS(SECT_4K) }, - { "sst25wf040b", INFO(0x621613, 0, 64 * 1024, 8) - FLAGS(SPI_NOR_HAS_LOCK) - NO_SFDP_FLAGS(SECT_4K) }, - { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst26wf016b", INFO(0xbf2651, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "sst26vf016b", INFO(0xbf2641, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "sst26vf032b", INFO(0xbf2642, 0, 0, 0) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - .fixups =3D &sst26vf_nor_fixups }, - { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - .fixups =3D &sst26vf_nor_fixups }, + { + .id =3D SNOR_ID(0xbf, 0x25, 0x8d), + .name =3D "sst25vf040b", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x8e), + .name =3D "sst25vf080b", + .size =3D SZ_1M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x41), + .name =3D "sst25vf016b", + .size =3D SZ_2M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x4a), + .name =3D "sst25vf032b", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x4b), + .name =3D "sst25vf064c", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x01), + .name =3D "sst25wf512", + .size =3D SZ_64K, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x02), + .name =3D "sst25wf010", + .size =3D SZ_128K, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x03), + .name =3D "sst25wf020", + .size =3D SZ_256K, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0x62, 0x16, 0x12), + .name =3D "sst25wf020a", + .size =3D SZ_256K, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x62, 0x16, 0x13), + .name =3D "sst25wf040b", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x04), + .name =3D "sst25wf040", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x05), + .name =3D "sst25wf080", + .size =3D SZ_1M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x26, 0x51), + .name =3D "sst26wf016b", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xbf, 0x26, 0x41), + .name =3D "sst26vf016b", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0xbf, 0x26, 0x42), + .name =3D "sst26vf032b", + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .fixups =3D &sst26vf_nor_fixups, + }, { + .id =3D SNOR_ID(0xbf, 0x26, 0x43), + .name =3D "sst26vf064b", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixups =3D &sst26vf_nor_fixups, + } }; =20 static int sst_nor_write(struct mtd_info *mtd, loff_t to, size_t len, --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 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RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0D2436287A for ; Tue, 22 Aug 2023 07:10:33 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D4F72C433C9; Tue, 22 Aug 2023 07:10:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688232; bh=7YrNyXC7V+pn6zBK9bb3rHawo2C44jutORAdPpM/Vm4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=CxY4GI2/E0NvbLPJQuvx8E1Q4pzjhHi6ilX262kHdmOzmG/HhsoroG5TJLhRhtoca 1/HQW+O/QXkdQoqspla/y+gltUbiz+icjRxnhOkps2pmKebR3XmrFWt7z9xkCjIW7/ G6OudYYtZTdsoxZgZNh+vXWsa78z/2H+RSCUIPLOv5cVBq+aBlu3gaimB3ZT4euC8y GtGL9pDAylyreT02roBKBHcR8QnzfD8TWH8AxxVHu0uQEjQu33hv/zLx8zs1JlWJR6 Y0tipUMmOxLC/MjbCneQUEUjXM9zNUXr5VhJvqZUwL4SFq+2Gy/2mEJzexsWYlADxk RmZaikcLCgXxg== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:44 +0200 Subject: [PATCH v2 28/41] mtd: spi-nor: winbond: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-28-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/winbond.c | 281 +++++++++++++++++++++++++++-----------= ---- 1 file changed, 185 insertions(+), 96 deletions(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 2d3ae972b419..1f95c4ccecd9 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -42,102 +42,191 @@ static const struct spi_nor_fixups w25q256_fixups =3D= { }; =20 static const struct flash_info winbond_nor_parts[] =3D { - { "w25x05", INFO(0xef3010, 0, 64 * 1024, 1) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25x10", INFO(0xef3011, 0, 64 * 1024, 2) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25x20", INFO(0xef3012, 0, 64 * 1024, 4) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25x40", INFO(0xef3013, 0, 64 * 1024, 8) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25x80", INFO(0xef3014, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25x16", INFO(0xef3015, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q16dw", INFO(0xef6015, 0, 64 * 1024, 32) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25x32", INFO(0xef3016, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q16jv-im/jm", INFO(0xef7015, 0, 64 * 1024, 32) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q20cl", INFO(0xef4012, 0, 64 * 1024, 4) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q20bw", INFO(0xef5012, 0, 64 * 1024, 4) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q20ew", INFO(0xef6012, 0, 64 * 1024, 4) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q32", INFO(0xef4016, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - OTP_INFO(256, 3, 0x1000, 0x1000) }, - { "w25q32jv", INFO(0xef7016, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q32jwm", INFO(0xef8016, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - OTP_INFO(256, 3, 0x1000, 0x1000) }, - { "w25q64jwm", INFO(0xef8017, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q128jwm", INFO(0xef8018, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q256jwm", INFO(0xef8019, 0, 64 * 1024, 512) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q64jvm", INFO(0xef7017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q128fw", INFO(0xef6018, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q128jv", INFO(0xef7018, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q128", INFO(0xef4018, 0, 0, 0) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, - { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - .fixups =3D &w25q256_fixups }, - { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 0) }, - { "w25q256jw", INFO(0xef6019, 0, 64 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ | - SPI_NOR_DUAL_READ) }, - { "w25q512nwq", INFO(0xef6020, 0, 0, 0) - OTP_INFO(256, 3, 0x1000, 0x1000) }, - { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 0) - OTP_INFO(256, 3, 0x1000, 0x1000) }, - { "w25q512jvq", INFO(0xef4020, 0, 64 * 1024, 1024) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, + { + .id =3D SNOR_ID(0xef, 0x30, 0x10), + .name =3D "w25x05", + .size =3D SZ_64K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x30, 0x11), + .name =3D "w25x10", + .size =3D SZ_128K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x30, 0x12), + .name =3D "w25x20", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x30, 0x13), + .name =3D "w25x40", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x30, 0x14), + .name =3D "w25x80", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x30, 0x15), + .name =3D "w25x16", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x15), + .name =3D "w25q16dw", + .size =3D SZ_2M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x30, 0x16), + .name =3D "w25x32", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x70, 0x15), + .name =3D "w25q16jv-im/jm", + .size =3D SZ_2M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x12), + .name =3D "w25q20cl", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x50, 0x12), + .name =3D "w25q20bw", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x12), + .name =3D "w25q20ew", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x16), + .name =3D "w25q32", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x16), + .name =3D "w25q32dw", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), + }, { + .id =3D SNOR_ID(0xef, 0x70, 0x16), + .name =3D "w25q32jv", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x16), + .name =3D "w25q32jwm", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x17), + .name =3D "w25q64jwm", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x18), + .name =3D "w25q128jwm", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x19), + .name =3D "w25q256jwm", + .size =3D SZ_32M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x30, 0x17), + .name =3D "w25x64", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x17), + .name =3D "w25q64", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x17), + .name =3D "w25q64dw", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x70, 0x17), + .name =3D "w25q64jvm", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x18), + .name =3D "w25q128fw", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x70, 0x18), + .name =3D "w25q128jv", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x50, 0x14), + .name =3D "w25q80", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x14), + .name =3D "w25q80bl", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x18), + .name =3D "w25q128", + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x19), + .name =3D "w25q256", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixups =3D &w25q256_fixups, + }, { + .id =3D SNOR_ID(0xef, 0x70, 0x19), + .name =3D "w25q256jvm", + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x19), + .name =3D "w25q256jw", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x71, 0x19), + .name =3D "w25m512jv", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x20), + .name =3D "w25q512nwq", + .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x20), + .name =3D "w25q512nwm", + .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x20), + .name =3D "w25q512jvq", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, }; =20 /** --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD7BFEE49A5 for ; Tue, 22 Aug 2023 07:13:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233216AbjHVHNV (ORCPT ); Tue, 22 Aug 2023 03:13:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53122 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233435AbjHVHMS (ORCPT ); Tue, 22 Aug 2023 03:12:18 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ECB1110E9 for ; Tue, 22 Aug 2023 00:11:52 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 106FA63114 for ; Tue, 22 Aug 2023 07:10:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C6466C433CB; Tue, 22 Aug 2023 07:10:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688234; bh=EyuDNaE5JOFL0ZQ/K44CuNRKS87m9hVeJq1QWqZcq6Y=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=sp7b3u+PWApSoU/k5kQtDAbpB3iK5by3FUYfWHuflSPkPDiJHvzuE8107LItsmPX9 os1bPIEs6+lQguKVm+Dvf/Na9v7xZsUAJumSxTfjYvOIayeLejIFXWzeiLcIBxPcJG YIafoDOTy/PV8SuNu9H8WHJtdwwpGt6Xo0ppp5yme0Chpcu2JENtM0Zp0dO5ooqtfU uyVQbThIvukFSCfosNt4UgBy+5myyWJus8LRMwyfLHMIBdoTLpnoiyUp4HJijLpLrz 6yPJz0hF2zTKnmHJfW3K7dZQ80xg9+Bd6YYAKauwwb8045/v3JUrRKsJGpH7WVZAXG XZitwFwwH2CsA== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:45 +0200 Subject: [PATCH v2 29/41] mtd: spi-nor: xilinx: use new macros in S3AN_INFO() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-29-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There won't be any new entries, nor are the entries that much different and the very odd page and sector sizes make the new format hard to read. Therefore, convert the old S3AN_INFO() macro. Signed-off-by: Michael Walle --- This collides with the atmel flashes and there seems to be a typo in the IDs. All this makes me wonder wether we shouldn't deprecate the support for this (FPGA configuration) flash. --- drivers/mtd/spi-nor/xilinx.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 8d4539e32dfe..f99118c691b0 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -21,21 +21,22 @@ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_DATA_IN(1, buf, 0)) =20 -#define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \ - SPI_NOR_ID(_jedec_id, 0), \ - .size =3D 8 * (_page_size) * (_n_sectors), \ - .sector_size =3D (8 * (_page_size)), \ - .page_size =3D (_page_size), \ - .flags =3D SPI_NOR_NO_FR +#define S3AN_FLASH(_id, _name, _n_sectors, _page_size) \ + .id =3D _id, \ + .name =3D _name, \ + .size =3D 8 * (_page_size) * (_n_sectors), \ + .sector_size =3D (8 * (_page_size)), \ + .page_size =3D (_page_size), \ + .flags =3D SPI_NOR_NO_FR =20 /* Xilinx S3AN share MFR with Atmel SPI NOR */ static const struct flash_info xilinx_nor_parts[] =3D { /* Xilinx S3AN Internal Flash */ - { "3S50AN", S3AN_INFO(0x1f2200, 64, 264) }, - { "3S200AN", S3AN_INFO(0x1f2400, 256, 264) }, - { "3S400AN", S3AN_INFO(0x1f2400, 256, 264) }, - { "3S700AN", S3AN_INFO(0x1f2500, 512, 264) }, - { "3S1400AN", S3AN_INFO(0x1f2600, 512, 528) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x22, 0x00), "3S50AN", 64, 264) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x24, 0x00), "3S200AN", 256, 264) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x24, 0x00), "3S400AN", 256, 264) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x25, 0x00), "3S700AN", 512, 264) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x26, 0x00), "3S1400AN", 512, 528) }, }; =20 /* --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1A09EE49A8 for ; Tue, 22 Aug 2023 07:11:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233412AbjHVHLs (ORCPT ); Tue, 22 Aug 2023 03:11:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57250 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233375AbjHVHL2 (ORCPT ); Tue, 22 Aug 2023 03:11:28 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1E46E1B0 for ; Tue, 22 Aug 2023 00:11:03 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id E5A8264861 for ; Tue, 22 Aug 2023 07:10:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B8336C433C7; Tue, 22 Aug 2023 07:10:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688236; bh=qrtlb3Inp+0PAFufVQ6/JFPnxSSyzXyjdaLgPSqbaiA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=nOGo3pil1/gkWPoExVzoflFCYD8btxkzwg/oQ6hr6HF8V5/ZWffWM9tKR8/oTQl28 gDrwIfDZoIlTeVhOvaisvBS0f3QSbxNQ1GviHgyfrSRepxP9nIzhCzFNxMHeGvp9db RG8F0Zpn/Zv4/GSPp/vwryzpsLbhCfDqn3dPQMHfmirXQjXz8C2YwWSesG5mCiDqSY rU1FhfhzBWT2sUBNWDryLg1V03VuIShWsc5GNrQ650Doc0oD6EBIhLFOS21KZP6rC8 5sVJKLnWsMWPxVq5uwb3M3BF3caVb7tV5wqi+UH2nW6wl2b9R/HFjA1HOWKV3kQqPb aZDZBtLfqKxHg== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:46 +0200 Subject: [PATCH v2 30/41] mtd: spi-nor: xmc: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-30-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/xmc.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/spi-nor/xmc.c b/drivers/mtd/spi-nor/xmc.c index 48062ccb22fa..d5a06054b0dd 100644 --- a/drivers/mtd/spi-nor/xmc.c +++ b/drivers/mtd/spi-nor/xmc.c @@ -9,12 +9,17 @@ #include "core.h" =20 static const struct flash_info xmc_nor_parts[] =3D { - { "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "XM25QH128A", INFO(0x207018, 0, 64 * 1024, 256) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, + { + .id =3D SNOR_ID(0x20, 0x70, 0x17), + .name =3D "XM25QH64A", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0x70, 0x18), + .name =3D "XM25QH128A", + .size =3D SZ_16M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, }; =20 /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10C46EE49A5 for ; Tue, 22 Aug 2023 07:13:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233583AbjHVHNY (ORCPT ); Tue, 22 Aug 2023 03:13:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53158 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233436AbjHVHMU (ORCPT ); Tue, 22 Aug 2023 03:12:20 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66E4710EB for ; Tue, 22 Aug 2023 00:11:53 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 081F3648F5 for ; Tue, 22 Aug 2023 07:10:39 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A92A7C433CB; Tue, 22 Aug 2023 07:10:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688238; bh=cvOmQ4r9lT/hD8cobtpM84I53hfGaM55Wi2KKw6QCYM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=MzdW72jIFXTv2uOfCLOVwgznPeKdO3r7cElkUdw7PcryfmMxKtssCWISkSt48CGeO UE6wOgGDGD9qoUkDoO/a9DerI3iWxcDXRL1Q494uh59uDcbPV++eUEai1cfuUdEXHt CqqGWKYd2KKNpcrw4cflq0nXtHcviCbJpZGPuSbH8TmUi1xxgFAxTG7sge50qpp1KB V60uDXnRAMcc2G4kKNG+GgrPY2myFje2Yn88vse0EvRJAqOXhBknX588WnHiQ69cPc dVtrD9dqQeH28f3Yg7aEszQls8l3S+8kol5jsFEhP+vzGaeml/i325lvHfyVzP0KiQ w/7PRJKmNibSg== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:47 +0200 Subject: [PATCH v2 31/41] mtd: spi-nor: atmel: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-31-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/atmel.c | 82 ++++++++++++++++++++++-------------------= ---- 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c index ccc985c48ae3..18e904962d0e 100644 --- a/drivers/mtd/spi-nor/atmel.c +++ b/drivers/mtd/spi-nor/atmel.c @@ -164,20 +164,20 @@ static const struct spi_nor_fixups atmel_nor_global_p= rotection_fixups =3D { =20 static const struct flash_info atmel_nor_parts[] =3D { { - .id =3D SNOR_ID(0x1f, 0x66, 0x01), - .name =3D "at25fs010", - .sector_size =3D SZ_32K, - .size =3D SZ_128K, - .flags =3D SPI_NOR_HAS_LOCK, + .id =3D SNOR_ID(0x1f, 0x04, 0x00), + .name =3D "at26f004", + .size =3D SZ_512K, .no_sfdp_flags =3D SECT_4K, - .fixups =3D &at25fs_nor_fixups }, { - .id =3D SNOR_ID(0x1f, 0x66, 0x04), - .name =3D "at25fs040", - .size =3D SZ_512K, - .flags =3D SPI_NOR_HAS_LOCK, + .id =3D SNOR_ID(0x1f, 0x25, 0x00), + .name =3D "at45db081d", + .size =3D SZ_1M, .no_sfdp_flags =3D SECT_4K, - .fixups =3D &at25fs_nor_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x42, 0x16), + .name =3D "at25sl321", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0x1f, 0x44, 0x01), .name =3D "at25df041a", @@ -186,62 +186,62 @@ static const struct flash_info atmel_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups, }, { - .id =3D SNOR_ID(0x1f, 0x47, 0x00), - .name =3D "at25df321", - .size =3D SZ_4M, + .id =3D SNOR_ID(0x1f, 0x45, 0x01), + .name =3D "at26df081a", + .size =3D SZ_1M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups }, { - .id =3D SNOR_ID(0x1f, 0x47, 0x01), - .name =3D "at25df321a", - .size =3D SZ_4M, + .id =3D SNOR_ID(0x1f, 0x46, 0x01), + .name =3D "at26df161a", + .size =3D SZ_2M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups }, { - .id =3D SNOR_ID(0x1f, 0x48, 0x00), - .name =3D "at25df641", - .size =3D SZ_8M, + .id =3D SNOR_ID(0x1f, 0x47, 0x00), + .name =3D "at25df321", + .size =3D SZ_4M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups }, { - .id =3D SNOR_ID(0x1f, 0x42, 0x16), - .name =3D "at25sl321", + .id =3D SNOR_ID(0x1f, 0x47, 0x00), + .name =3D "at26df321", .size =3D SZ_4M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0x1f, 0x04, 0x00), - .name =3D "at26f004", - .size =3D SZ_512K, - .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0x1f, 0x45, 0x01), - .name =3D "at26df081a", - .size =3D SZ_1M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups }, { - .id =3D SNOR_ID(0x1f, 0x46, 0x01), - .name =3D "at26df161a", - .size =3D SZ_2M, + .id =3D SNOR_ID(0x1f, 0x47, 0x01), + .name =3D "at25df321a", + .size =3D SZ_4M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups }, { - .id =3D SNOR_ID(0x1f, 0x47, 0x00), - .name =3D "at26df321", - .size =3D SZ_4M, + .id =3D SNOR_ID(0x1f, 0x48, 0x00), + .name =3D "at25df641", + .size =3D SZ_8M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups }, { - .id =3D SNOR_ID(0x1f, 0x25, 0x00), - .name =3D "at45db081d", - .size =3D SZ_1M, + .id =3D SNOR_ID(0x1f, 0x66, 0x01), + .name =3D "at25fs010", + .sector_size =3D SZ_32K, + .size =3D SZ_128K, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &at25fs_nor_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x66, 0x04), + .name =3D "at25fs040", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK, .no_sfdp_flags =3D SECT_4K, + .fixups =3D &at25fs_nor_fixups }, }; =20 --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7F4AEE49A8 for ; Tue, 22 Aug 2023 07:11:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233398AbjHVHLo (ORCPT ); Tue, 22 Aug 2023 03:11:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57238 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233374AbjHVHL2 (ORCPT ); Tue, 22 Aug 2023 03:11:28 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42C3E1B7 for ; Tue, 22 Aug 2023 00:11:03 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id E0161637BC for ; Tue, 22 Aug 2023 07:10:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9BDAAC433C7; Tue, 22 Aug 2023 07:10:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688240; bh=yf+i4Rv/o/8TXBlVhYljTJbV/eUqv5ZZTBjDmCQ4PA0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=qKh+Z+JW9aXiTrSnLy2qAMQrDPCSHzFhlHX1NUPDko1ydcEAPeUS/yZX/EhpSrYXH bETWdtNFj2yPM6MJcT2D0/+PL2wbmq91go6N/dNgrHU77JLCGYbX46aiLust2nG48c x3E5v7jAVyz5p6MAQE9vgPhVnHKnTV1WRkH9MkPIBsSjxSOYCa0gZuPa/7QxAcctTA YKej/C6tEeo0V5dqnALnFlYCvSCbE8nc7d9zyOKTPgwb/GsH/Q4rHw6LrBelr7lq18 aLFwRvtrcShCpLiTJuwMkaVU8t7vKoeaiWsXdlM795xwS2hnjthQVkrJHdFV9JxO1P w28370b99WuNA== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:48 +0200 Subject: [PATCH v2 32/41] mtd: spi-nor: eon: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-32-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/eon.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/mtd/spi-nor/eon.c b/drivers/mtd/spi-nor/eon.c index ba09cb6c2abd..c1ddf662f782 100644 --- a/drivers/mtd/spi-nor/eon.c +++ b/drivers/mtd/spi-nor/eon.c @@ -10,32 +10,37 @@ =20 static const struct flash_info eon_nor_parts[] =3D { { - .id =3D SNOR_ID(0x1c, 0x31, 0x16), - .name =3D "en25f32", - .size =3D SZ_4M, - .no_sfdp_flags =3D SECT_4K, - }, { .id =3D SNOR_ID(0x1c, 0x20, 0x16), .name =3D "en25p32", .size =3D SZ_4M, - }, { - .id =3D SNOR_ID(0x1c, 0x30, 0x16), - .name =3D "en25q32b", - .size =3D SZ_4M, }, { .id =3D SNOR_ID(0x1c, 0x20, 0x17), .name =3D "en25p64", .size =3D SZ_8M, + }, { + .id =3D SNOR_ID(0x1c, 0x30, 0x14), + .name =3D "en25q80a", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x1c, 0x30, 0x16), + .name =3D "en25q32b", + .size =3D SZ_4M, }, { .id =3D SNOR_ID(0x1c, 0x30, 0x17), .name =3D "en25q64", .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K, }, { - .id =3D SNOR_ID(0x1c, 0x30, 0x14), - .name =3D "en25q80a", - .size =3D SZ_1M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + .id =3D SNOR_ID(0x1c, 0x31, 0x16), + .name =3D "en25f32", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .name =3D "en25s64", + .id =3D SNOR_ID(0x1c, 0x38, 0x17), + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0x1c, 0x70, 0x15), .name =3D "en25qh16", @@ -57,11 +62,6 @@ static const struct flash_info eon_nor_parts[] =3D { }, { .id =3D SNOR_ID(0x1c, 0x70, 0x19), .name =3D "en25qh256", - }, { - .name =3D "en25s64", - .id =3D SNOR_ID(0x1c, 0x38, 0x17), - .size =3D SZ_8M, - .no_sfdp_flags =3D SECT_4K, }, }; =20 --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C4F4EE49A8 for ; Tue, 22 Aug 2023 07:11:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233426AbjHVHLw (ORCPT ); Tue, 22 Aug 2023 03:11:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233282AbjHVHLb (ORCPT ); Tue, 22 Aug 2023 03:11:31 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0F6E01BD for ; Tue, 22 Aug 2023 00:11:04 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C2B206406C for ; Tue, 22 Aug 2023 07:10:42 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 93B30C433C9; Tue, 22 Aug 2023 07:10:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688242; bh=yWhME5tjoVL5WamO6J63OUfuy5+Vof54SIVht26T9gk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=jcuET5YGZlkrCXp9SkG33dnx9EHIxIiv1AF1A/H1VODEY9xWwCwXr2SK5ChhS6Vbp /ohtIwOMarUjBINU+1vw6vgAslhdsdPuTUrlAuNxdf7ad9k9Uf2npFt+MzzFMpsyh+ SbjxnzKWuM84FM3ubMwkhfIA7vqXj2CCeVyFDfPKD6XHIXO2ZkAR2go2LkZqqTnoUx adoUVM5rAMR1Hso3cuFIzBHuTDQyuI6GoWoeuOSIWhu8wjFmzYLRaTg4CpwkM8Wt5h yL+RqdY1aRRLqtLZDkOADM0RTj54mpEAWjoroYFacUqmoDao1cGHNcUh6ccApD9J+O PCuraR2Zyoa6w== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:49 +0200 Subject: [PATCH v2 33/41] mtd: spi-nor: gigadevice: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-33-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/gigadevice.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadev= ice.c index 0d22cd99715b..ef1edd0add70 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -46,30 +46,12 @@ static const struct flash_info gigadevice_nor_parts[] = =3D { .size =3D SZ_4M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xc8, 0x60, 0x16), - .name =3D "gd25lq32", - .size =3D SZ_4M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xc8, 0x40, 0x17), .name =3D "gd25q64", .size =3D SZ_8M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xc8, 0x60, 0x17), - .name =3D "gd25lq64c", - .size =3D SZ_8M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xc8, 0x60, 0x18), - .name =3D "gd25lq128d", - .size =3D SZ_16M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xc8, 0x40, 0x18), .name =3D "gd25q128", @@ -82,6 +64,24 @@ static const struct flash_info gigadevice_nor_parts[] = =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6, .fixups =3D &gd25q256_fixups, .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0xc8, 0x60, 0x16), + .name =3D "gd25lq32", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x60, 0x17), + .name =3D "gd25lq64c", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x60, 0x18), + .name =3D "gd25lq128d", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, }; =20 --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83351EE49A5 for ; Tue, 22 Aug 2023 07:12:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233498AbjHVHMS (ORCPT ); Tue, 22 Aug 2023 03:12:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233383AbjHVHLm (ORCPT ); Tue, 22 Aug 2023 03:11:42 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A5024E74 for ; Tue, 22 Aug 2023 00:11:12 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D7E2764D5F for ; Tue, 22 Aug 2023 07:10:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 868DCC433C7; Tue, 22 Aug 2023 07:10:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688244; bh=v3ofMUp8UBxPgYd5XD7XRHJNeXUWfMpXY/dIXqoAhK8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=SaBpjt6h6+n3fiJPsFNOmARNmuwiDNGGpy+cJJvo7J+13rOYYAm+eJOrmtHlHuKM2 HfGxZX7lPtX3ihxgp6aIjTsfJY2IQ83/g19mHBZ+wCSAwKVf8OxdW/ORMDeDllaS5g 3AVhGkwKiMN/ok0pXBDBqWOylpVfb0/jZNZMOVFOTlv929UWO8/3EPznG76rdLLvhh ieqqTye7pAQnkRawCbbYt2GCiDE09mzJiZbwl0k4IPJW5ZhkIw648WsYWkZ+p61re/ qhW+15lCqr1FBZiO29Md1Nqb5ie7yjA+ZSGdzhO882QKqtzQmLJ+8E8huscNv7bex6 t1vwmfVu5l3EQ== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:50 +0200 Subject: [PATCH v2 34/41] mtd: spi-nor: issi: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-34-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/issi.c | 44 ++++++++++++++++++++++--------------------= -- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index 9478f1e61626..18d9a00aa22e 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -48,26 +48,43 @@ static const struct spi_nor_fixups pm25lv_nor_fixups = =3D { =20 static const struct flash_info issi_nor_parts[] =3D { { + .name =3D "pm25lv512", + .sector_size =3D SZ_32K, + .size =3D SZ_64K, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &pm25lv_nor_fixups + }, { + .name =3D "pm25lv010", + .sector_size =3D SZ_32K, + .size =3D SZ_128K, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &pm25lv_nor_fixups + }, { .id =3D SNOR_ID(0x7f, 0x9d, 0x20), .name =3D "is25cd512", .sector_size =3D SZ_32K, .size =3D SZ_64K, .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x7f, 0x9d, 0x46), + .name =3D "pm25lq032", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0x9d, 0x40, 0x13), .name =3D "is25lq040b", .size =3D SZ_512K, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0x9d, 0x60, 0x15), - .name =3D "is25lp016d", - .size =3D SZ_2M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0x9d, 0x60, 0x14), .name =3D "is25lp080d", .size =3D SZ_1M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x60, 0x15), + .name =3D "is25lp016d", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0x9d, 0x60, 0x16), .name =3D "is25lp032", @@ -109,23 +126,6 @@ static const struct flash_info issi_nor_parts[] =3D { .flags =3D SPI_NOR_QUAD_PP, .fixups =3D &is25lp256_fixups, .fixup_flags =3D SPI_NOR_4B_OPCODES, - }, { - .name =3D "pm25lv512", - .sector_size =3D SZ_32K, - .size =3D SZ_64K, - .no_sfdp_flags =3D SECT_4K, - .fixups =3D &pm25lv_nor_fixups - }, { - .name =3D "pm25lv010", - .sector_size =3D SZ_32K, - .size =3D SZ_128K, - .no_sfdp_flags =3D SECT_4K, - .fixups =3D &pm25lv_nor_fixups - }, { - .id =3D SNOR_ID(0x7f, 0x9d, 0x46), - .name =3D "pm25lq032", - .size =3D SZ_4M, - .no_sfdp_flags =3D SECT_4K, } }; =20 --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8AFBEE49A3 for ; Tue, 22 Aug 2023 07:12:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233338AbjHVHMF (ORCPT ); Tue, 22 Aug 2023 03:12:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36812 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233389AbjHVHLm (ORCPT ); Tue, 22 Aug 2023 03:11:42 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E3303E79 for ; Tue, 22 Aug 2023 00:11:13 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A586E63441 for ; Tue, 22 Aug 2023 07:10:46 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7748DC433CA; Tue, 22 Aug 2023 07:10:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688246; bh=S2VGpvolKhnaojGSg3lKj4d7SDdm9iFqv4jQmZl9diQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=r3H31Kgixm/tob7MNx9kQ3x/nGVzVA2gLIIzIz8HURmeaoLo1eHjKF9Hmaq0tXhya FwSX6ve6usH4LH1GOSOd9ATD9XfetrUa3SlHUIJaw2TwPe81yeSgunrgHkraIjNNr1 0zbnP8F5eM+nLIePk/DZ4J49twZ40T9/d6LmxpLYPrH3zUaqRFIP+poZHLaQuIw32s hhyruXGNIhfRLN6NtTge4LRRM7O+Ptj0Sc5vtDAO2j8QpouAZbO9tD3dlJGMKWcTuE gn+Ft+EHiboL6xYdCc0rmGy4L8NdcYie7oQdxNf4dhLVuJe5HKJg1sERx+1N3jvPxu 5DN5S3wBJXltg== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:51 +0200 Subject: [PATCH v2 35/41] mtd: spi-nor: macronix: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-35-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/macronix.c | 130 ++++++++++++++++++++-----------------= ---- 1 file changed, 65 insertions(+), 65 deletions(-) diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index 0508a207e9df..ea6be95e75a5 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -62,26 +62,44 @@ static const struct flash_info macronix_nor_parts[] =3D= { .name =3D "mx25l3205d", .size =3D SZ_4M, .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xc2, 0x9e, 0x16), - .name =3D "mx25l3255e", - .size =3D SZ_4M, - .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0xc2, 0x20, 0x17), .name =3D "mx25l6405d", .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x18), + .name =3D "mx25l12805d", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x19), + .name =3D "mx25l25635e", + .size =3D SZ_32M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixups =3D &mx25l25635_fixups + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x1a), + .name =3D "mx66l51235f", + .size =3D SZ_64M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x1b), + .name =3D "mx66l1g45g", + .size =3D SZ_128M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x23, 0x14), + .name =3D "mx25v8035f", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xc2, 0x25, 0x32), .name =3D "mx25u2033e", .size =3D SZ_256K, .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xc2, 0x25, 0x36), - .name =3D "mx25u3235f", - .size =3D SZ_4M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xc2, 0x25, 0x33), .name =3D "mx25u4035", @@ -92,74 +110,33 @@ static const struct flash_info macronix_nor_parts[] = =3D { .name =3D "mx25u8035", .size =3D SZ_1M, .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x36), + .name =3D "mx25u3235f", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xc2, 0x25, 0x37), .name =3D "mx25u6435f", .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xc2, 0x20, 0x18), - .name =3D "mx25l12805d", - .size =3D SZ_16M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP, - .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xc2, 0x26, 0x18), - .name =3D "mx25l12855e", - .size =3D SZ_16M, - }, { - .id =3D SNOR_ID(0xc2, 0x28, 0x15), - .name =3D "mx25r1635f", - .size =3D SZ_2M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xc2, 0x28, 0x16), - .name =3D "mx25r3235f", - .size =3D SZ_4M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xc2, 0x25, 0x38), .name =3D "mx25u12835f", .size =3D SZ_16M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xc2, 0x20, 0x19), - .name =3D "mx25l25635e", - .size =3D SZ_32M, - .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixups =3D &mx25l25635_fixups }, { .id =3D SNOR_ID(0xc2, 0x25, 0x39), .name =3D "mx25u25635f", .size =3D SZ_32M, .no_sfdp_flags =3D SECT_4K, - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) + .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { .id =3D SNOR_ID(0xc2, 0x25, 0x3a), .name =3D "mx25u51245g", .size =3D SZ_64M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .fixup_flags =3D SPI_NOR_4B_OPCODES, - }, { - .id =3D SNOR_ID(0xc2, 0x81, 0x3a), - .name =3D "mx25uw51245g", - .n_banks =3D 4, - .flags =3D SPI_NOR_RWW, - }, { - .id =3D SNOR_ID(0xc2, 0x23, 0x14), - .name =3D "mx25v8035f", - .size =3D SZ_1M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xc2, 0x26, 0x19), - .name =3D "mx25l25655e", - .size =3D SZ_32M, - }, { - .id =3D SNOR_ID(0xc2, 0x20, 0x1a), - .name =3D "mx66l51235f", - .size =3D SZ_64M, - .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { .id =3D SNOR_ID(0xc2, 0x25, 0x3a), .name =3D "mx66u51235f", @@ -167,22 +144,45 @@ static const struct flash_info macronix_nor_parts[] = =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { - .id =3D SNOR_ID(0xc2, 0x20, 0x1b), - .name =3D "mx66l1g45g", - .size =3D SZ_128M, + .id =3D SNOR_ID(0xc2, 0x25, 0x3c), + .name =3D "mx66u2g45g", + .size =3D SZ_256M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0xc2, 0x26, 0x18), + .name =3D "mx25l12855e", + .size =3D SZ_16M, + }, { + .id =3D SNOR_ID(0xc2, 0x26, 0x19), + .name =3D "mx25l25655e", + .size =3D SZ_32M, }, { .id =3D SNOR_ID(0xc2, 0x26, 0x1b), .name =3D "mx66l1g55g", .size =3D SZ_128M, .no_sfdp_flags =3D SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0xc2, 0x25, 0x3c), - .name =3D "mx66u2g45g", - .size =3D SZ_256M, + .id =3D SNOR_ID(0xc2, 0x28, 0x15), + .name =3D "mx25r1635f", + .size =3D SZ_2M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, - }, + }, { + .id =3D SNOR_ID(0xc2, 0x28, 0x16), + .name =3D "mx25r3235f", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x81, 0x3a), + .name =3D "mx25uw51245g", + .n_banks =3D 4, + .flags =3D SPI_NOR_RWW, + }, { + .id =3D SNOR_ID(0xc2, 0x9e, 0x16), + .name =3D "mx25l3255e", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + } }; =20 static void macronix_nor_default_init(struct spi_nor *nor) --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8B89EE49A3 for ; Tue, 22 Aug 2023 07:12:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233459AbjHVHMK (ORCPT ); Tue, 22 Aug 2023 03:12:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233417AbjHVHLt (ORCPT ); Tue, 22 Aug 2023 03:11:49 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1091CCF for ; Tue, 22 Aug 2023 00:11:18 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 9BC8964D68 for ; Tue, 22 Aug 2023 07:10:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 68FBFC433CB; Tue, 22 Aug 2023 07:10:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688247; bh=uBLUgzG+Qr84SJ0zH/c3GfOsYhPI41nZW9Idjp3TdLA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=XB2HxEK38oAsXHPG9LcXEus2ooxje6lgfIGI7RnHJLyXPEVTak4NxHNayJcnFLDBg eGUhXn/bb9FcFS2evYckhhllSF26aBK+C7KFLi1NGJdI2vFFp5MWXr1oRTuYPiTjXP rGkPB9K7MbVLwCAyCnXa42k5QpGQZN/hg3GRLX0KoPTrmdmY+99OiisOCaV/E5M5KF zFGXQEqkcYCsgVU1TQ6ODkd4DFSupu9lyhyWoX3KjnPOgfgoVIu1Pa5DyDRU65bHev +cOv0HwAeDc8T9H2xcDdzR5cgncxTxb2Un+8CD3Pbj575rs0UOeTuIpwBRalYGTYfr n33YpU6X/dm8g== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:52 +0200 Subject: [PATCH v2 36/41] mtd: spi-nor: micron-st: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-36-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/micron-st.c | 336 ++++++++++++++++++++----------------= ---- 1 file changed, 168 insertions(+), 168 deletions(-) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 720fd2fbd0ad..4afcfc57c896 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -182,133 +182,35 @@ static const struct flash_info micron_nor_parts[] = =3D { =20 static const struct flash_info st_nor_parts[] =3D { { - .id =3D SNOR_ID(0x20, 0xbb, 0x15), - .name =3D "n25q016a", - .size =3D SZ_2M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0x20, 0xba, 0x16), - .name =3D "n25q032", - .size =3D SZ_4M, - .no_sfdp_flags =3D SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x16), - .name =3D "n25q032a", - .size =3D SZ_4M, - .no_sfdp_flags =3D SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0x20, 0xba, 0x17), - .name =3D "n25q064", - .size =3D SZ_8M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x17), - .name =3D "n25q064a", - .size =3D SZ_8M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x18), - .name =3D "n25q128a11", - .size =3D SZ_16M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, - }, { - .id =3D SNOR_ID(0x20, 0xba, 0x18), - .name =3D "n25q128a13", - .size =3D SZ_16M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, - }, { - .id =3D SNOR_ID(0x20, 0xba, 0x19, 0x10, 0x44, 0x00), - .name =3D "mt25ql256a", - .size =3D SZ_32M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, - .mfr_flags =3D USE_FSR, - }, { - .id =3D SNOR_ID(0x20, 0xba, 0x19), - .name =3D "n25q256a", - .size =3D SZ_32M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, - }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x19, 0x10, 0x44, 0x00), - .name =3D "mt25qu256a", - .size =3D SZ_32M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, - .mfr_flags =3D USE_FSR, - }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x19), - .name =3D "n25q256ax1", - .size =3D SZ_32M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, + .name =3D "m25p05-nonjedec", + .sector_size =3D SZ_32K, + .size =3D SZ_64K, }, { - .id =3D SNOR_ID(0x20, 0xba, 0x20, 0x10, 0x44, 0x00), - .name =3D "mt25ql512a", - .size =3D SZ_64M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, - .mfr_flags =3D USE_FSR, + .name =3D "m25p10-nonjedec", + .sector_size =3D SZ_32K, + .size =3D SZ_128K, }, { - .id =3D SNOR_ID(0x20, 0xba, 0x20), - .name =3D "n25q512ax3", - .size =3D SZ_64M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, + .name =3D "m25p20-nonjedec", + .size =3D SZ_256K, }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x20, 0x10, 0x44, 0x00), - .name =3D "mt25qu512a", - .size =3D SZ_64M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, - .mfr_flags =3D USE_FSR, + .name =3D "m25p40-nonjedec", + .size =3D SZ_512K, }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x20), - .name =3D "n25q512a", - .size =3D SZ_64M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, + .name =3D "m25p80-nonjedec", + .size =3D SZ_1M, }, { - .id =3D SNOR_ID(0x20, 0xba, 0x21), - .name =3D "n25q00", - .size =3D SZ_128M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, + .name =3D "m25p16-nonjedec", + .size =3D SZ_2M, }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x21), - .name =3D "n25q00a", - .size =3D SZ_128M, - .flags =3D NO_CHIP_ERASE, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, + .name =3D "m25p32-nonjedec", + .size =3D SZ_4M, }, { - .id =3D SNOR_ID(0x20, 0xba, 0x22), - .name =3D "mt25ql02g", - .size =3D SZ_256M, - .flags =3D NO_CHIP_ERASE, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, + .name =3D "m25p64-nonjedec", + .size =3D SZ_8M, }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x22), - .name =3D "mt25qu02g", - .size =3D SZ_256M, - .flags =3D NO_CHIP_ERASE, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, + .name =3D "m25p128-nonjedec", + .sector_size =3D SZ_256K, + .size =3D SZ_16M, }, { .id =3D SNOR_ID(0x20, 0x20, 0x10), .name =3D "m25p05", @@ -348,36 +250,6 @@ static const struct flash_info st_nor_parts[] =3D { .name =3D "m25p128", .sector_size =3D SZ_256K, .size =3D SZ_16M, - }, { - .name =3D "m25p05-nonjedec", - .sector_size =3D SZ_32K, - .size =3D SZ_64K, - }, { - .name =3D "m25p10-nonjedec", - .sector_size =3D SZ_32K, - .size =3D SZ_128K, - }, { - .name =3D "m25p20-nonjedec", - .size =3D SZ_256K, - }, { - .name =3D "m25p40-nonjedec", - .size =3D SZ_512K, - }, { - .name =3D "m25p80-nonjedec", - .size =3D SZ_1M, - }, { - .name =3D "m25p16-nonjedec", - .size =3D SZ_2M, - }, { - .name =3D "m25p32-nonjedec", - .size =3D SZ_4M, - }, { - .name =3D "m25p64-nonjedec", - .size =3D SZ_8M, - }, { - .name =3D "m25p128-nonjedec", - .sector_size =3D SZ_256K, - .size =3D SZ_16M, }, { .id =3D SNOR_ID(0x20, 0x40, 0x11), .name =3D "m45pe10", @@ -391,18 +263,14 @@ static const struct flash_info st_nor_parts[] =3D { .name =3D "m45pe16", .size =3D SZ_2M, }, { - .id =3D SNOR_ID(0x20, 0x80, 0x12), - .name =3D "m25pe20", - .size =3D SZ_256K, + .id =3D SNOR_ID(0x20, 0x63, 0x16), + .name =3D "m25px32-s1", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, }, { - .id =3D SNOR_ID(0x20, 0x80, 0x14), - .name =3D "m25pe80", + .id =3D SNOR_ID(0x20, 0x71, 0x14), + .name =3D "m25px80", .size =3D SZ_1M, - }, { - .id =3D SNOR_ID(0x20, 0x80, 0x15), - .name =3D "m25pe16", - .size =3D SZ_2M, - .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0x20, 0x71, 0x15), .name =3D "m25px16", @@ -413,25 +281,157 @@ static const struct flash_info st_nor_parts[] =3D { .name =3D "m25px32", .size =3D SZ_4M, .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x20, 0x71, 0x17), + .name =3D "m25px64", + .size =3D SZ_8M, }, { .id =3D SNOR_ID(0x20, 0x73, 0x16), .name =3D "m25px32-s0", .size =3D SZ_4M, .no_sfdp_flags =3D SECT_4K, }, { - .id =3D SNOR_ID(0x20, 0x63, 0x16), - .name =3D "m25px32-s1", - .size =3D SZ_4M, + .id =3D SNOR_ID(0x20, 0x80, 0x12), + .name =3D "m25pe20", + .size =3D SZ_256K, + }, { + .id =3D SNOR_ID(0x20, 0x80, 0x14), + .name =3D "m25pe80", + .size =3D SZ_1M, + }, { + .id =3D SNOR_ID(0x20, 0x80, 0x15), + .name =3D "m25pe16", + .size =3D SZ_2M, .no_sfdp_flags =3D SECT_4K, }, { - .id =3D SNOR_ID(0x20, 0x71, 0x17), - .name =3D "m25px64", + .id =3D SNOR_ID(0x20, 0xba, 0x16), + .name =3D "n25q032", + .size =3D SZ_4M, + .no_sfdp_flags =3D SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x17), + .name =3D "n25q064", .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0x20, 0x71, 0x14), - .name =3D "m25px80", - .size =3D SZ_1M, - }, + .id =3D SNOR_ID(0x20, 0xba, 0x18), + .name =3D "n25q128a13", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x19, 0x10, 0x44, 0x00), + .name =3D "mt25ql256a", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x19), + .name =3D "n25q256a", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x20, 0x10, 0x44, 0x00), + .name =3D "mt25ql512a", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x20), + .name =3D "n25q512ax3", + .size =3D SZ_64M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x21), + .name =3D "n25q00", + .size =3D SZ_128M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x22), + .name =3D "mt25ql02g", + .size =3D SZ_256M, + .flags =3D NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x15), + .name =3D "n25q016a", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x16), + .name =3D "n25q032a", + .size =3D SZ_4M, + .no_sfdp_flags =3D SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x17), + .name =3D "n25q064a", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x18), + .name =3D "n25q128a11", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x19, 0x10, 0x44, 0x00), + .name =3D "mt25qu256a", + .size =3D SZ_32M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x19), + .name =3D "n25q256ax1", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x20, 0x10, 0x44, 0x00), + .name =3D "mt25qu512a", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x20), + .name =3D "n25q512a", + .size =3D SZ_64M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x21), + .name =3D "n25q00a", + .size =3D SZ_128M, + .flags =3D NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x22), + .name =3D "mt25qu02g", + .size =3D SZ_256M, + .flags =3D NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + } }; =20 /** --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CADB9EE49A3 for ; Tue, 22 Aug 2023 07:12:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233471AbjHVHMN (ORCPT ); Tue, 22 Aug 2023 03:12:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233419AbjHVHLu (ORCPT ); Tue, 22 Aug 2023 03:11:50 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86C96E65 for ; Tue, 22 Aug 2023 00:11:20 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 9B17661500 for ; Tue, 22 Aug 2023 07:10:50 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5CBBFC433C7; Tue, 22 Aug 2023 07:10:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688249; bh=8w3XDg6OtHsIPMEmA3w/5H7T3yQdVD+fVZ/p/srxbKw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=RdDnz6oEsGZBmCYG9ChhLr/8h7zSDm2+sCtAmhhRCehP5jUhVVQLLhYWzVXRjW7Yg xu+hAySF4pXszQNQFzuplSm0Z7l1zXEC/k97NDSMSmgtfOYKutdpn85JjuHiO9Kgop ov4ady6NYHhYJiZdkXK5p8arUhxcByU/XUWdGf7YLeMynw8ewMYlW7IPPsVKvl6UKF 8M6MqnOKori2t7vvKaxRhPNsm8WIb0LSFXJWIr2eDnrzF5mtpNF1T+H0TGZl55xG+i mhtFmjJyzWpOV3kRAM8QGJLu5x1ZQN+Is9bowlKPr0ExSqe3wITiTbTTDtk7b3Hnec ZszD+4ORGjMNw== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:53 +0200 Subject: [PATCH v2 37/41] mtd: spi-nor: spansion: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-37-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/spansion.c | 174 ++++++++++++++++++++-----------------= ---- 1 file changed, 87 insertions(+), 87 deletions(-) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 5953df6aff93..fd2652aa6c1e 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -757,28 +757,35 @@ static const struct spi_nor_fixups s25fs_s_nor_fixups= =3D { =20 static const struct flash_info spansion_nor_parts[] =3D { { + .id =3D SNOR_ID(0x01, 0x02, 0x12), + .name =3D "s25sl004a", + .size =3D SZ_512K, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x13), + .name =3D "s25sl008a", + .size =3D SZ_1M, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x14), + .name =3D "s25sl016a", + .size =3D SZ_2M, + }, { .id =3D SNOR_ID(0x01, 0x02, 0x15, 0x4d, 0x00), .name =3D "s25sl032p", .size =3D SZ_4M, .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x15), + .name =3D "s25sl032a", + .size =3D SZ_4M, }, { .id =3D SNOR_ID(0x01, 0x02, 0x16, 0x4d, 0x00), .name =3D "s25sl064p", .size =3D SZ_8M, .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00, 0x80), - .name =3D "s25fl128s0", - .size =3D SZ_16M, - .sector_size =3D SZ_256K, - .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_CLSR, - }, { - .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x80), - .name =3D "s25fl128s1", - .size =3D SZ_16M, - .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_CLSR, + .id =3D SNOR_ID(0x01, 0x02, 0x16), + .name =3D "s25sl064a", + .size =3D SZ_8M, }, { .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x80), .name =3D "s25fl256s0", @@ -787,31 +794,16 @@ static const struct flash_info spansion_nor_parts[] = =3D { .no_sfdp_flags =3D SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_= READ, .mfr_flags =3D USE_CLSR, }, { - .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x01, 0x80), - .name =3D "s25fl256s1", + .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x81), + .name =3D "s25fs256s0", .size =3D SZ_32M, - .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_CLSR, - }, { - .id =3D SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x80), - .name =3D "s25fl512s", - .size =3D SZ_64M, .sector_size =3D SZ_256K, - .flags =3D SPI_NOR_HAS_LOCK, .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_CLSR, }, { - .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x81), - .name =3D "s25fs128s1", - .size =3D SZ_16M, - .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_CLSR, - .fixups =3D &s25fs_s_nor_fixups, - }, { - .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x81), - .name =3D "s25fs256s0", + .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x01, 0x80), + .name =3D "s25fl256s1", .size =3D SZ_32M, - .sector_size =3D SZ_256K, .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_CLSR, }, { @@ -820,6 +812,14 @@ static const struct flash_info spansion_nor_parts[] = =3D { .size =3D SZ_32M, .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x80), + .name =3D "s25fl512s", + .size =3D SZ_64M, + .sector_size =3D SZ_256K, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, }, { .id =3D SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x81), .name =3D "s25fs512s", @@ -837,6 +837,13 @@ static const struct flash_info spansion_nor_parts[] = =3D { .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x03, 0x01), .name =3D "s25sl12801", .size =3D SZ_16M, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00, 0x80), + .name =3D "s25fl128s0", + .size =3D SZ_16M, + .sector_size =3D SZ_256K, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, }, { .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00), .name =3D "s25fl129p0", @@ -845,51 +852,34 @@ static const struct flash_info spansion_nor_parts[] = =3D { .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_CLSR, }, { - .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01), - .name =3D "s25fl129p1", + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x80), + .name =3D "s25fl128s1", .size =3D SZ_16M, .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_CLSR, }, { - .id =3D SNOR_ID(0x01, 0x02, 0x12), - .name =3D "s25sl004a", - .size =3D SZ_512K, - }, { - .id =3D SNOR_ID(0x01, 0x02, 0x13), - .name =3D "s25sl008a", - .size =3D SZ_1M, - }, { - .id =3D SNOR_ID(0x01, 0x02, 0x14), - .name =3D "s25sl016a", - .size =3D SZ_2M, - }, { - .id =3D SNOR_ID(0x01, 0x02, 0x15), - .name =3D "s25sl032a", - .size =3D SZ_4M, + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x81), + .name =3D "s25fs128s1", + .size =3D SZ_16M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + .fixups =3D &s25fs_s_nor_fixups, }, { - .id =3D SNOR_ID(0x01, 0x02, 0x16), - .name =3D "s25sl064a", - .size =3D SZ_8M, + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01), + .name =3D "s25fl129p1", + .size =3D SZ_16M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, }, { - .id =3D SNOR_ID(0xef, 0x40, 0x13), - .name =3D "s25fl004k", + .id =3D SNOR_ID(0x01, 0x40, 0x13), + .name =3D "s25fl204k", .size =3D SZ_512K, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, }, { - .id =3D SNOR_ID(0xef, 0x40, 0x14), - .name =3D "s25fl008k", + .id =3D SNOR_ID(0x01, 0x40, 0x14), + .name =3D "s25fl208k", .size =3D SZ_1M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xef, 0x40, 0x15), - .name =3D "s25fl016k", - .size =3D SZ_2M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xef, 0x40, 0x17), - .name =3D "s25fl064k", - .size =3D SZ_8M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, }, { .id =3D SNOR_ID(0x01, 0x40, 0x15), .name =3D "s25fl116k", @@ -905,16 +895,6 @@ static const struct flash_info spansion_nor_parts[] = =3D { .name =3D "s25fl164k", .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0x01, 0x40, 0x13), - .name =3D "s25fl204k", - .size =3D SZ_512K, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, - }, { - .id =3D SNOR_ID(0x01, 0x40, 0x14), - .name =3D "s25fl208k", - .size =3D SZ_1M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, }, { .id =3D SNOR_ID(0x01, 0x60, 0x17), .name =3D "s25fl064l", @@ -934,10 +914,11 @@ static const struct flash_info spansion_nor_parts[] = =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { - .id =3D SNOR_ID(0x34, 0x2b, 0x19, 0x0f, 0x08, 0x90), - .name =3D "s25fs256t", - .mfr_flags =3D USE_CLPEF, - .fixups =3D &s25fs256t_fixups + .id =3D SNOR_ID(0x04, 0x2c, 0xc2, 0x7f, 0x7f, 0x7f), + .name =3D "cy15x104q", + .size =3D SZ_512K, + .sector_size =3D SZ_512K, + .flags =3D SPI_NOR_NO_ERASE, }, { .id =3D SNOR_ID(0x34, 0x2a, 0x1a, 0x0f, 0x03, 0x90), .name =3D "s25hl512t", @@ -954,6 +935,11 @@ static const struct flash_info spansion_nor_parts[] = =3D { .mfr_flags =3D USE_CLPEF, .flags =3D NO_CHIP_ERASE, .fixups =3D &s25hx_t_fixups + }, { + .id =3D SNOR_ID(0x34, 0x2b, 0x19, 0x0f, 0x08, 0x90), + .name =3D "s25fs256t", + .mfr_flags =3D USE_CLPEF, + .fixups =3D &s25fs256t_fixups }, { .id =3D SNOR_ID(0x34, 0x2b, 0x1a, 0x0f, 0x03, 0x90), .name =3D "s25hs512t", @@ -970,12 +956,6 @@ static const struct flash_info spansion_nor_parts[] = =3D { .mfr_flags =3D USE_CLPEF, .flags =3D NO_CHIP_ERASE, .fixups =3D &s25hx_t_fixups - }, { - .id =3D SNOR_ID(0x04, 0x2c, 0xc2, 0x7f, 0x7f, 0x7f), - .name =3D "cy15x104q", - .size =3D SZ_512K, - .sector_size =3D SZ_512K, - .flags =3D SPI_NOR_NO_ERASE, }, { .id =3D SNOR_ID(0x34, 0x5a, 0x1a), .name =3D "s28hl512t", @@ -1001,6 +981,26 @@ static const struct flash_info spansion_nor_parts[] = =3D { .name =3D "s28hs02gt", .mfr_flags =3D USE_CLPEF, .fixups =3D &s28hx_t_fixups, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x13), + .name =3D "s25fl004k", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x14), + .name =3D "s25fl008k", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x15), + .name =3D "s25fl016k", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x17), + .name =3D "s25fl064k", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, } }; =20 --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13504EE49A3 for ; Tue, 22 Aug 2023 07:12:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233511AbjHVHMW (ORCPT ); Tue, 22 Aug 2023 03:12:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52378 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233282AbjHVHLw (ORCPT ); Tue, 22 Aug 2023 03:11:52 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0356A10D5 for ; Tue, 22 Aug 2023 00:11:24 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 807BE62672 for ; Tue, 22 Aug 2023 07:10:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4DA06C433C9; Tue, 22 Aug 2023 07:10:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688251; bh=okMtOA67tLTz4yJHrFPDvuTyPVGqwS1/Z6lXCh+PJbY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=VKoLIhnJPhlGeq7O5f8UPN8I0wAFfIpdQPLkSDMXYuLnihDDpfmzZRbpnWBog24z3 KQXav1i/FKv44yFJLWF8T7RLhuvuUK0vDJs7MzT/EkcCVfpqI473+Paw/6cHE4boyx KOHhguVfHpXG9cLQIaSIgG94bVsZ8ldP4zYVIEKt0CITkL0I0SVGsUOAcbAM8toYhr DAz2ug+dcaCU6v2VHWITwtXlgCgEyUWipBQ2XrlFQPzXWikl5qX7gELhbLP1HKIKKl OGSL/l+kRSmG83Cm1FuGm5NEVr2OMyYdNtnrkIz4SuAAyvhVJWIR7BJG19GntIElHA JX91GsFL058bw== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:54 +0200 Subject: [PATCH v2 38/41] mtd: spi-nor: sst: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-38-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/sst.c | 90 +++++++++++++++++++++++--------------------= ---- 1 file changed, 45 insertions(+), 45 deletions(-) diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index 77b271abd342..44d2a546bf17 100644 --- a/drivers/mtd/spi-nor/sst.c +++ b/drivers/mtd/spi-nor/sst.c @@ -62,38 +62,16 @@ static const struct spi_nor_fixups sst26vf_nor_fixups = =3D { =20 static const struct flash_info sst_nor_parts[] =3D { { - .id =3D SNOR_ID(0xbf, 0x25, 0x8d), - .name =3D "sst25vf040b", - .size =3D SZ_512K, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, - .no_sfdp_flags =3D SECT_4K, - .mfr_flags =3D SST_WRITE, - }, { - .id =3D SNOR_ID(0xbf, 0x25, 0x8e), - .name =3D "sst25vf080b", - .size =3D SZ_1M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, - .no_sfdp_flags =3D SECT_4K, - .mfr_flags =3D SST_WRITE, - }, { - .id =3D SNOR_ID(0xbf, 0x25, 0x41), - .name =3D "sst25vf016b", - .size =3D SZ_2M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, - .no_sfdp_flags =3D SECT_4K, - .mfr_flags =3D SST_WRITE, - }, { - .id =3D SNOR_ID(0xbf, 0x25, 0x4a), - .name =3D "sst25vf032b", - .size =3D SZ_4M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .id =3D SNOR_ID(0x62, 0x16, 0x12), + .name =3D "sst25wf020a", + .size =3D SZ_256K, + .flags =3D SPI_NOR_HAS_LOCK, .no_sfdp_flags =3D SECT_4K, - .mfr_flags =3D SST_WRITE, }, { - .id =3D SNOR_ID(0xbf, 0x25, 0x4b), - .name =3D "sst25vf064c", - .size =3D SZ_8M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP | SPI_NOR_SWP_IS_VOLATILE, + .id =3D SNOR_ID(0x62, 0x16, 0x13), + .name =3D "sst25wf040b", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK, .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0xbf, 0x25, 0x01), @@ -116,18 +94,6 @@ static const struct flash_info sst_nor_parts[] =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .mfr_flags =3D SST_WRITE, - }, { - .id =3D SNOR_ID(0x62, 0x16, 0x12), - .name =3D "sst25wf020a", - .size =3D SZ_256K, - .flags =3D SPI_NOR_HAS_LOCK, - .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0x62, 0x16, 0x13), - .name =3D "sst25wf040b", - .size =3D SZ_512K, - .flags =3D SPI_NOR_HAS_LOCK, - .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0xbf, 0x25, 0x04), .name =3D "sst25wf040", @@ -143,10 +109,39 @@ static const struct flash_info sst_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K, .mfr_flags =3D SST_WRITE, }, { - .id =3D SNOR_ID(0xbf, 0x26, 0x51), - .name =3D "sst26wf016b", + .id =3D SNOR_ID(0xbf, 0x25, 0x41), + .name =3D "sst25vf016b", .size =3D SZ_2M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x4a), + .name =3D "sst25vf032b", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x4b), + .name =3D "sst25vf064c", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x8d), + .name =3D "sst25vf040b", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x8e), + .name =3D "sst25vf080b", + .size =3D SZ_1M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, }, { .id =3D SNOR_ID(0xbf, 0x26, 0x41), .name =3D "sst26vf016b", @@ -164,6 +159,11 @@ static const struct flash_info sst_nor_parts[] =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .fixups =3D &sst26vf_nor_fixups, + }, { + .id =3D SNOR_ID(0xbf, 0x26, 0x51), + .name =3D "sst26wf016b", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, } }; =20 --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BEB46EE49A5 for ; Tue, 22 Aug 2023 07:12:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233350AbjHVHMX (ORCPT ); Tue, 22 Aug 2023 03:12:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34198 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233434AbjHVHLx (ORCPT ); Tue, 22 Aug 2023 03:11:53 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C476C10DA for ; Tue, 22 Aug 2023 00:11:24 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 755ED63094 for ; Tue, 22 Aug 2023 07:10:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4211CC433C7; Tue, 22 Aug 2023 07:10:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688253; bh=iBTPt8S5w7gWdJJi3s71qBJDZbCtHTAsa1phX7FXsLc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=metZQ3Dq7i2SI80aaYS3RkMmagjefXYjc3lGnc7kMmicj6whv+JvAUKinBPkVjSoX 01kkEVw/yAABU1tgG/dVMXjvJdsrUC3b2uQxGOSSvn/34xoU/viL9nYnhSUxRAOX8w MN6QAohnb0HXxqU2vrBEjWKSmZg1E46hUKOD5xEJRzaH2QsemNwE0VXrWoMgIvQJO+ KBGa9fua1FGs5dcmqQ51YoE0iXZWBVsEPeOWV1SemSrdgL1oE+6IwRYFoznSTIL58Q W3Dg5N2uM7GvaiUg4lTiPBvBeOTfZPwvWshAzI96hoWBlkfDkfKg4K0nxN4zXGtJtQ 2cErt13MdK0bw== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:55 +0200 Subject: [PATCH v2 39/41] mtd: spi-nor: winbond: sort flash_info entries MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-39-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/winbond.c | 166 +++++++++++++++++++++-----------------= ---- 1 file changed, 83 insertions(+), 83 deletions(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 1f95c4ccecd9..6ce50c3f3c27 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -72,37 +72,25 @@ static const struct flash_info winbond_nor_parts[] =3D { .name =3D "w25x16", .size =3D SZ_2M, .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xef, 0x60, 0x15), - .name =3D "w25q16dw", - .size =3D SZ_2M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xef, 0x30, 0x16), .name =3D "w25x32", .size =3D SZ_4M, .no_sfdp_flags =3D SECT_4K, }, { - .id =3D SNOR_ID(0xef, 0x70, 0x15), - .name =3D "w25q16jv-im/jm", - .size =3D SZ_2M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .id =3D SNOR_ID(0xef, 0x30, 0x17), + .name =3D "w25x64", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0xef, 0x40, 0x12), .name =3D "w25q20cl", .size =3D SZ_256K, .no_sfdp_flags =3D SECT_4K, }, { - .id =3D SNOR_ID(0xef, 0x50, 0x12), - .name =3D "w25q20bw", - .size =3D SZ_256K, - .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xef, 0x60, 0x12), - .name =3D "w25q20ew", - .size =3D SZ_256K, + .id =3D SNOR_ID(0xef, 0x40, 0x14), + .name =3D "w25q80bl", + .size =3D SZ_1M, .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0xef, 0x40, 0x16), @@ -110,57 +98,84 @@ static const struct flash_info winbond_nor_parts[] =3D= { .size =3D SZ_4M, .no_sfdp_flags =3D SECT_4K, }, { - .id =3D SNOR_ID(0xef, 0x60, 0x16), - .name =3D "w25q32dw", - .size =3D SZ_4M, + .id =3D SNOR_ID(0xef, 0x40, 0x17), + .name =3D "w25q64", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x18), + .name =3D "w25q128", .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x19), + .name =3D "w25q256", + .size =3D SZ_32M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), + .fixups =3D &w25q256_fixups, }, { - .id =3D SNOR_ID(0xef, 0x70, 0x16), - .name =3D "w25q32jv", - .size =3D SZ_4M, + .id =3D SNOR_ID(0xef, 0x40, 0x20), + .name =3D "w25q512jvq", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x50, 0x12), + .name =3D "w25q20bw", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x50, 0x14), + .name =3D "w25q80", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x12), + .name =3D "w25q20ew", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x15), + .name =3D "w25q16dw", + .size =3D SZ_2M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0xef, 0x80, 0x16), - .name =3D "w25q32jwm", + .id =3D SNOR_ID(0xef, 0x60, 0x16), + .name =3D "w25q32dw", .size =3D SZ_4M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), }, { - .id =3D SNOR_ID(0xef, 0x80, 0x17), - .name =3D "w25q64jwm", + .id =3D SNOR_ID(0xef, 0x60, 0x17), + .name =3D "w25q64dw", .size =3D SZ_8M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0xef, 0x80, 0x18), - .name =3D "w25q128jwm", + .id =3D SNOR_ID(0xef, 0x60, 0x18), + .name =3D "w25q128fw", .size =3D SZ_16M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0xef, 0x80, 0x19), - .name =3D "w25q256jwm", + .id =3D SNOR_ID(0xef, 0x60, 0x19), + .name =3D "w25q256jw", .size =3D SZ_32M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0xef, 0x30, 0x17), - .name =3D "w25x64", - .size =3D SZ_8M, - .no_sfdp_flags =3D SECT_4K, + .id =3D SNOR_ID(0xef, 0x60, 0x20), + .name =3D "w25q512nwq", + .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), }, { - .id =3D SNOR_ID(0xef, 0x40, 0x17), - .name =3D "w25q64", - .size =3D SZ_8M, + .id =3D SNOR_ID(0xef, 0x70, 0x15), + .name =3D "w25q16jv-im/jm", + .size =3D SZ_2M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0xef, 0x60, 0x17), - .name =3D "w25q64dw", - .size =3D SZ_8M, + .id =3D SNOR_ID(0xef, 0x70, 0x16), + .name =3D "w25q32jv", + .size =3D SZ_4M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { @@ -168,64 +183,49 @@ static const struct flash_info winbond_nor_parts[] = =3D { .name =3D "w25q64jvm", .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xef, 0x60, 0x18), - .name =3D "w25q128fw", - .size =3D SZ_16M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xef, 0x70, 0x18), .name =3D "w25q128jv", .size =3D SZ_16M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xef, 0x50, 0x14), - .name =3D "w25q80", - .size =3D SZ_1M, - .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xef, 0x40, 0x14), - .name =3D "w25q80bl", - .size =3D SZ_1M, - .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xef, 0x40, 0x18), - .name =3D "w25q128", - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, - }, { - .id =3D SNOR_ID(0xef, 0x40, 0x19), - .name =3D "w25q256", - .size =3D SZ_32M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixups =3D &w25q256_fixups, }, { .id =3D SNOR_ID(0xef, 0x70, 0x19), .name =3D "w25q256jvm", - }, { - .id =3D SNOR_ID(0xef, 0x60, 0x19), - .name =3D "w25q256jw", - .size =3D SZ_32M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xef, 0x71, 0x19), .name =3D "w25m512jv", .size =3D SZ_64M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0xef, 0x60, 0x20), - .name =3D "w25q512nwq", + .id =3D SNOR_ID(0xef, 0x80, 0x16), + .name =3D "w25q32jwm", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x17), + .name =3D "w25q64jwm", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x18), + .name =3D "w25q128jwm", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x19), + .name =3D "w25q256jwm", + .size =3D SZ_32M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xef, 0x80, 0x20), .name =3D "w25q512nwm", .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), - }, { - .id =3D SNOR_ID(0xef, 0x40, 0x20), - .name =3D "w25q512jvq", - .size =3D SZ_64M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, }; =20 --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F7B8EE49A3 for ; Tue, 22 Aug 2023 07:12:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233440AbjHVHM0 (ORCPT ); Tue, 22 Aug 2023 03:12:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233348AbjHVHL5 (ORCPT ); Tue, 22 Aug 2023 03:11:57 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AFFCDCD9 for ; Tue, 22 Aug 2023 00:11:26 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7795164D8D for ; Tue, 22 Aug 2023 07:10:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3631AC43395; Tue, 22 Aug 2023 07:10:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688255; bh=fjBFDwKo3KO8ngc80qTC0rIJuf+fwM3TGfE20y77Uv8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=YE1Mib6Ug8Ta3uwzoFl9oucsyTd3ubHd4ane/x3GVAUQFLgbwbfGI6TiqJQvKOZor t0NsdwnM/kuXLGwbyp8ZZaI1mW1Al6QVqhK5uuZ6YJ8cZFdC3J2PSHFSselo3xGzDf ocnDua792rRtXfkNuAlXZlPVWcWNl+rJJ1TgtDsJnPMsBKPL7fClWXhzHBZauQML6X BE8Zb0pCv+hNUrFIEaSCviO3hDkSTe6Q0ZXNMysQLroC2mx5b9RxtFgwpvHJhT1DvS fr6r32BnzLS5X2tJckXiokL45nDK/6PETGjJNftVvZM5x4slXAQwaf3aKSSUyrbV+Z M0/J62162vJmA== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:56 +0200 Subject: [PATCH v2 40/41] mtd: spi-nor: atmel: drop duplicate entry MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-40-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Atmel AT26DF321 and AT25DF321 have the same ID. Both were just discovered by reading their IDs, that is, there is no probing by name. Thus only the first one in the list was ever probed. The AT25DF is the newer series. Drop the older one. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/atmel.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c index 18e904962d0e..95f0e139284e 100644 --- a/drivers/mtd/spi-nor/atmel.c +++ b/drivers/mtd/spi-nor/atmel.c @@ -206,13 +206,6 @@ static const struct flash_info atmel_nor_parts[] =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups - }, { - .id =3D SNOR_ID(0x1f, 0x47, 0x00), - .name =3D "at26df321", - .size =3D SZ_4M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, - .no_sfdp_flags =3D SECT_4K, - .fixups =3D &atmel_nor_global_protection_fixups }, { .id =3D SNOR_ID(0x1f, 0x47, 0x01), .name =3D "at25df321a", --=20 2.39.2 From nobody Wed Dec 17 09:04:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40401EE49A3 for ; Tue, 22 Aug 2023 07:12:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233528AbjHVHM2 (ORCPT ); Tue, 22 Aug 2023 03:12:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34236 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233437AbjHVHL5 (ORCPT ); Tue, 22 Aug 2023 03:11:57 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAC6ACDB for ; Tue, 22 Aug 2023 00:11:26 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7384664D76 for ; Tue, 22 Aug 2023 07:10:58 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2BD0AC433C7; Tue, 22 Aug 2023 07:10:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688257; bh=EvjRtRToKltCM0ftw1A20Yl2JRY0BCZyEmk1F0c80Pg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Xx5aL6u9pJIOguYJ8YSi5Lt2xYJaDiKJ3V7rMtNtMo7/wqgN3F9U8HtwieeVmoz67 O3N+4wGX3gh7YtdYeya/CrVs5wr7302fgHGZykHIWXaL01G15VSQl1QN/t4PP2p1Pv BAd43SOB9ndpRrmzkg7oHPjsUla9bfhBfNJwilNLwuv+PZT4EDt5ZPbPA0Teq4EVf+ bLUI8PPMBSjqrhVcByg4gUjqyxBPWTfEi8YDq0wX3ORk5BYjQPMQYIfrJUdcgQ+pSX uNGI2PP1uyKtoSOJnd23eaXd6232DAKd3tu2I+bxdPNr/aS9GUCn5XYd8xIzWSYkzc OmEtFhSlwgH3w== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:57 +0200 Subject: [PATCH v2 41/41] mtd: spi-nor: core: get rid of the INFOx() macros MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v2-41-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that all flash_info tables are converted to the new format, remove the old INFOx() macros. Signed-off-by: Michael Walle Reviewed-by: Tudor Ambarus --- drivers/mtd/spi-nor/core.h | 65 ------------------------------------------= ---- 1 file changed, 65 deletions(-) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 420e5ca2cfe1..1febb4a3c59b 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -573,71 +573,6 @@ struct flash_info { .n_regions =3D (_n_regions), \ }) =20 -#define SPI_NOR_ID_2ITEMS(_id) ((_id) >> 8) & 0xff, (_id) & 0xff -#define SPI_NOR_ID_3ITEMS(_id) ((_id) >> 16) & 0xff, SPI_NOR_ID_2ITEMS(_id) - -#define SPI_NOR_ID(_jedec_id, _ext_id) \ - .id =3D &(const struct spi_nor_id){ \ - .bytes =3D (const u8[]){ SPI_NOR_ID_3ITEMS(_jedec_id), \ - SPI_NOR_ID_2ITEMS(_ext_id) }, \ - .len =3D !(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0)), \ - } - -#define SPI_NOR_ID6(_jedec_id, _ext_id) \ - .id =3D &(const struct spi_nor_id){ \ - .bytes =3D (const u8[]){ SPI_NOR_ID_3ITEMS(_jedec_id), \ - SPI_NOR_ID_3ITEMS(_ext_id) }, \ - .len =3D 6, \ - } - -#define SPI_NOR_GEOMETRY(_sector_size, _n_sectors, _n_banks) \ - .size =3D (_sector_size) * (_n_sectors), \ - .sector_size =3D (_sector_size =3D=3D SZ_64K) ? 0 : (_sector_size), \ - .n_banks =3D (_n_banks) - -/* Used when the "_ext_id" is two bytes at most */ -#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors) \ - SPI_NOR_ID((_jedec_id), (_ext_id)), \ - SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 0), - -#define INFO0(_sector_size, _n_sectors) \ - SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 0), - -#define INFOB(_jedec_id, _ext_id, _sector_size, _n_sectors, _n_banks) \ - SPI_NOR_ID((_jedec_id), (_ext_id)), \ - SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), (_n_banks)), - -#define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors) \ - SPI_NOR_ID6((_jedec_id), (_ext_id)), \ - SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 0), - -#define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_nbytes) \ - .size =3D (_sector_size) * (_n_sectors), \ - .sector_size =3D (_sector_size), \ - .page_size =3D (_page_size), \ - .addr_nbytes =3D (_addr_nbytes), \ - .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, \ - -#define OTP_INFO(_len, _n_regions, _base, _offset) \ - .otp =3D &(const struct spi_nor_otp_organization){ \ - .len =3D (_len), \ - .base =3D (_base), \ - .offset =3D (_offset), \ - .n_regions =3D (_n_regions), \ - }, - -#define FLAGS(_flags) \ - .flags =3D (_flags), \ - -#define NO_SFDP_FLAGS(_no_sfdp_flags) \ - .no_sfdp_flags =3D (_no_sfdp_flags), \ - -#define FIXUP_FLAGS(_fixup_flags) \ - .fixup_flags =3D (_fixup_flags), \ - -#define MFR_FLAGS(_mfr_flags) \ - .mfr_flags =3D (_mfr_flags), \ - /** * struct spi_nor_manufacturer - SPI NOR manufacturer object * @name: manufacturer name --=20 2.39.2