From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F626C001DB for ; Mon, 7 Aug 2023 13:22:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233911AbjHGNWB (ORCPT ); Mon, 7 Aug 2023 09:22:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35362 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232503AbjHGNV5 (ORCPT ); Mon, 7 Aug 2023 09:21:57 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6655B3 for ; Mon, 7 Aug 2023 06:21:55 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 659F961AA0 for ; Mon, 7 Aug 2023 13:21:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2537AC433C8; Mon, 7 Aug 2023 13:21:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414514; bh=cmN7UAt71pD0oHRQkFHh8Nu11a8Q9bJn8d0evMSd854=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=S2pVJfzgrAtteE4DQlj+Iz+ClPiAd9ZaQGs9pPkDJ8vlNL5prK6H0YteObW2SFaQr v+P42S1XmCuQpHdcnCLrep4eWBxzGwgFSRzzmdZ0U4GHCSm75YZ0izSxR9l9/JeZos NF5DhF6ZReaU8jNzjjC8m1f9l9+dT38FHLgDyQtsm9L7PEAFzE2HkTNzY1slqUjkCt PVMz3peXFgtnNbmw5GC9D+mpq8O8Rjh63lZUS0r0gq6IlAROkBst0IiPvQtTXjTabF Y5MjTz7YyMVbxh2Fl8bni+9kEcDJ39OcuqH+R04StAsStXEjf1gsun2R+f1ahYrFTk h+1o+Dw/07stg== From: Michael Walle Date: Mon, 07 Aug 2023 15:20:55 +0200 Subject: [PATCH 01/41] mtd: spi-nor: remove catalyst 'flashes' MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-1-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org CAT25xx are actually EEPROMs manufactured by Catalyst. The devices are ancient (DS are from 1998), there are not in-tree users, nor are there any device tree bindings. Remove it. The correct driver is the at25. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/catalyst.c | 24 ------------------------ drivers/mtd/spi-nor/core.c | 1 - drivers/mtd/spi-nor/core.h | 1 - 3 files changed, 26 deletions(-) diff --git a/drivers/mtd/spi-nor/catalyst.c b/drivers/mtd/spi-nor/catalyst.c deleted file mode 100644 index 6d310815fb12..000000000000 --- a/drivers/mtd/spi-nor/catalyst.c +++ /dev/null @@ -1,24 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (C) 2005, Intec Automation Inc. - * Copyright (C) 2014, Freescale Semiconductor, Inc. - */ - -#include - -#include "core.h" - -static const struct flash_info catalyst_nor_parts[] =3D { - /* Catalyst / On Semiconductor -- non-JEDEC */ - { "cat25c11", CAT25_INFO(16, 8, 16, 1) }, - { "cat25c03", CAT25_INFO(32, 8, 16, 2) }, - { "cat25c09", CAT25_INFO(128, 8, 32, 2) }, - { "cat25c17", CAT25_INFO(256, 8, 32, 2) }, - { "cat25128", CAT25_INFO(2048, 8, 64, 2) }, -}; - -const struct spi_nor_manufacturer spi_nor_catalyst =3D { - .name =3D "catalyst", - .parts =3D catalyst_nor_parts, - .nparts =3D ARRAY_SIZE(catalyst_nor_parts), -}; diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 614960c7d22c..8e43d171ffd0 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -1998,7 +1998,6 @@ int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor) =20 static const struct spi_nor_manufacturer *manufacturers[] =3D { &spi_nor_atmel, - &spi_nor_catalyst, &spi_nor_eon, &spi_nor_esmt, &spi_nor_everspin, diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 9217379b9cfe..6d31af6c39ed 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -631,7 +631,6 @@ struct sfdp { =20 /* Manufacturer drivers. */ extern const struct spi_nor_manufacturer spi_nor_atmel; -extern const struct spi_nor_manufacturer spi_nor_catalyst; extern const struct spi_nor_manufacturer spi_nor_eon; extern const struct spi_nor_manufacturer spi_nor_esmt; extern const struct spi_nor_manufacturer spi_nor_everspin; --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5EF52C41513 for ; Mon, 7 Aug 2023 13:22:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233925AbjHGNWG (ORCPT ); Mon, 7 Aug 2023 09:22:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233013AbjHGNV6 (ORCPT ); Mon, 7 Aug 2023 09:21:58 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E8B5ECF for ; Mon, 7 Aug 2023 06:21:57 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 86D6B61ADA for ; Mon, 7 Aug 2023 13:21:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 40CBAC433CB; Mon, 7 Aug 2023 13:21:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414516; bh=STumF2jMsmMQs/u4xKVFJG5rdn3FbACDuOxzTY6McdY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=A6jw1DWkL1XRwjkzsFQQed2z4amOdfyxiI6nE6Chb1jk8m9Wf0redWf6B8PRSwkH/ njtC+XxwJUWgUSTFlkEs+JqbWTnQVEs3itCYvKrCw7Ue/Mi2YC+dwPpqyjT2Lp8BxE twCciWXrZKkQJiqC9R4sef/PSTMuNjl1aIG8s1DdtYI9sKXw4JNKSE3/c8amY3Ssy8 meZeWmH6OY9yXU6wsQubc2svPlIo7VSK82h/3NffKrkUL4I2q3NQfVCwYh+5gcS4b4 JpVivunn1tLR9jM6Qf8+YDbiD6FvAz4JFLjV5iLT22zVDR3TxulxXF/lyRddL6HVrE Jjsyz4c68cG6Q== From: Michael Walle Date: Mon, 07 Aug 2023 15:20:56 +0200 Subject: [PATCH 02/41] mtd: spi-nor: remove Fujitsu MB85RS1MT support MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-2-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This part is not a flash but an EEPROM like FRAM. It is even has a DT binding for the (correct) driver (at25), see Documentation/devicetree/bindings/eeprom/at25.yaml. Just remove it. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.c | 1 - drivers/mtd/spi-nor/core.h | 1 - drivers/mtd/spi-nor/fujitsu.c | 21 --------------------- 3 files changed, 23 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 8e43d171ffd0..a9ad55aab821 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2001,7 +2001,6 @@ static const struct spi_nor_manufacturer *manufacture= rs[] =3D { &spi_nor_eon, &spi_nor_esmt, &spi_nor_everspin, - &spi_nor_fujitsu, &spi_nor_gigadevice, &spi_nor_intel, &spi_nor_issi, diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 6d31af6c39ed..dfc20a3296fb 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -634,7 +634,6 @@ extern const struct spi_nor_manufacturer spi_nor_atmel; extern const struct spi_nor_manufacturer spi_nor_eon; extern const struct spi_nor_manufacturer spi_nor_esmt; extern const struct spi_nor_manufacturer spi_nor_everspin; -extern const struct spi_nor_manufacturer spi_nor_fujitsu; extern const struct spi_nor_manufacturer spi_nor_gigadevice; extern const struct spi_nor_manufacturer spi_nor_intel; extern const struct spi_nor_manufacturer spi_nor_issi; diff --git a/drivers/mtd/spi-nor/fujitsu.c b/drivers/mtd/spi-nor/fujitsu.c deleted file mode 100644 index 69cffc5c73ef..000000000000 --- a/drivers/mtd/spi-nor/fujitsu.c +++ /dev/null @@ -1,21 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (C) 2005, Intec Automation Inc. - * Copyright (C) 2014, Freescale Semiconductor, Inc. - */ - -#include - -#include "core.h" - -static const struct flash_info fujitsu_nor_parts[] =3D { - /* Fujitsu */ - { "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1) - FLAGS(SPI_NOR_NO_ERASE) }, -}; - -const struct spi_nor_manufacturer spi_nor_fujitsu =3D { - .name =3D "fujitsu", - .parts =3D fujitsu_nor_parts, - .nparts =3D ARRAY_SIZE(fujitsu_nor_parts), -}; --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D4EBC001B0 for ; Mon, 7 Aug 2023 13:22:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231773AbjHGNWK (ORCPT ); Mon, 7 Aug 2023 09:22:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233907AbjHGNWA (ORCPT ); Mon, 7 Aug 2023 09:22:00 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0DE13E5D for ; Mon, 7 Aug 2023 06:22:00 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A077461AF3 for ; Mon, 7 Aug 2023 13:21:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5C247C433CA; Mon, 7 Aug 2023 13:21:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414519; bh=yto9V/zcEZBJmLMoKJpHfJ7xX1RdTjUYPmlgcSHSm3Y=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=kXuN0prHwGPVCahFWS//CQaPPVvH11sUVgV4r4qQLljoqKaX8pye+QPhqCE0dbVHG Gpk7wL2o1SMKCWKManNbhZlmJsrwPGlqWKu0fMAW0tqGsNkg9OaG6Khh3et9goP8DR aowt7gIUQephCNrarYevOQi8Tsfxp3uIpbg9EpoK+jx8KIaXJgCRLKCPxlsJo/3VeK 5ZrJMcybwOWPhkw/K35BtAJSmVa5SrqL/PRW+etTkRP6SqDo7vCxfmhhsGpFDGKhBb DoZqpUJmrbneZsUaDKUYu8KypW484yNIwRLzplQYaCreT5I3KmTC4TI4cINsTcdIQ2 QgfRFebXvXMWw== From: Michael Walle Date: Mon, 07 Aug 2023 15:20:57 +0200 Subject: [PATCH 03/41] mtd: spi-nor: xilinx: use SPI_NOR_ID() in S3AN_INFO() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-3-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In commit 59273180299a ("mtd: spi-nor: Create macros to define chip IDs and geometries") SPI_NOR_ID() were introduced, but it did only update the INFO() macro in core.h. Also use it in S3AN_INFO(). Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/xilinx.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 00d53eae5ee8..de5189c38432 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -22,12 +22,7 @@ SPI_MEM_OP_DATA_IN(1, buf, 0)) =20 #define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \ - .id =3D { \ - ((_jedec_id) >> 16) & 0xff, \ - ((_jedec_id) >> 8) & 0xff, \ - (_jedec_id) & 0xff \ - }, \ - .id_len =3D 3, \ + SPI_NOR_ID(_jedec_id, 0), \ .sector_size =3D (8 * (_page_size)), \ .n_sectors =3D (_n_sectors), \ .page_size =3D (_page_size), \ --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2B15C04E69 for ; Mon, 7 Aug 2023 13:22:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229834AbjHGNWO (ORCPT ); Mon, 7 Aug 2023 09:22:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35424 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233914AbjHGNWD (ORCPT ); Mon, 7 Aug 2023 09:22:03 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F6551711 for ; Mon, 7 Aug 2023 06:22:02 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B7F0F61AA0 for ; Mon, 7 Aug 2023 13:22:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 76A71C433CC; Mon, 7 Aug 2023 13:21:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414521; bh=i6brw9U/L+6pC4Q/XEJT9zKna/1DXXdaKKQQ6GTutFM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=WjCgyrlmel6WUBY2FHUMxCT30g3rE5bHGHYOZIhu9qfsOfDkqvhbgAqjzAMVc05Ly EC7Hk0Bkf8axBddEhvOVx1dTzOYXy6zEtOsCoDqsxk394afqPEL65qHlelTUIgEp07 xwcIWB5S3+PmM4Tn3ihwhIwwv6Rk50EA24SZprCrn0GPXb1AzIutoQvuiwTGB8JIpI oKampRSE5QxjNM+DrHyI9lllb5NmEZ65syLJ8jbnznTS/eT1bGisV3M9SVhVQfnpjC j7jlro32sGTVitcMdDFRGtqmpxf2ujEnEtsSBXK5VNDcwdfaXlRRK9CSUeKiUGEuL6 /nzJuoQzn3S+A== From: Michael Walle Date: Mon, 07 Aug 2023 15:20:58 +0200 Subject: [PATCH 04/41] mtd: spi-nor: xilinx: remove addr_nbytes from S3AN_INFO() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-4-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The default value of addr_nbytes is already 3. Drop it. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/xilinx.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index de5189c38432..34267591282c 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -27,7 +27,6 @@ .n_sectors =3D (_n_sectors), \ .page_size =3D (_page_size), \ .n_banks =3D 1, \ - .addr_nbytes =3D 3, \ .flags =3D SPI_NOR_NO_FR =20 /* Xilinx S3AN share MFR with Atmel SPI NOR */ --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28389C001DB for ; Mon, 7 Aug 2023 13:22:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231920AbjHGNWQ (ORCPT ); Mon, 7 Aug 2023 09:22:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233013AbjHGNWG (ORCPT ); Mon, 7 Aug 2023 09:22:06 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 56D571730 for ; Mon, 7 Aug 2023 06:22:04 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D6F196192E for ; Mon, 7 Aug 2023 13:22:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 92B6FC433CB; Mon, 7 Aug 2023 13:22:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414523; bh=JEhpVLwBFI4X/anYOYjWuLFc03K9cn8/ppYG3rnOFno=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=EG4yta3A732jhsXBaWR3zB9yF3RdrKD3bPUzoZJLc764LZiX2KCyrlUVRiT9rid1d 8xwrUQU/F3EsKgJ+5bZmyEwHNy9LVQYuNYpnimQC6jbg2mOXvXTEpGZq8z2yWy4geI +bpv3JI8g6V/KbEoSSmEnZcNA2joF0nbmuEa4u5VJbg2Q+DKlKhbjaOWb35t4myT4Z QBllHTws6fK8A2W9ET5qZ+1itpoA5H/5UflhyBqygQNB8LOfLkZpq8NOQScO1ygrL/ wWXElrRfXJmrtj/kzvkHD+3QmCZeJIHciz15bZb8Xzt83emzK9upFAV8v+V32LlSID +SGr1ih5q4EGA== From: Michael Walle Date: Mon, 07 Aug 2023 15:20:59 +0200 Subject: [PATCH 05/41] mtd: spi-nor: convert .n_sectors to .size MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-5-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org .n_sectors is rarely used. In fact it is only used in swp.c and to calculate the flash size in the core. The use in swp.c might be converted to use the (largest) flash erase size. For now, we just locally calculate the sector size. Simplify the flash_info database and set the size of the flash directly. This also let us use the SZ_x macros. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.c | 2 +- drivers/mtd/spi-nor/core.h | 8 ++++---- drivers/mtd/spi-nor/swp.c | 9 +++++---- drivers/mtd/spi-nor/xilinx.c | 4 ++-- 4 files changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index a9ad55aab821..c504a5af4032 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2998,7 +2998,7 @@ static void spi_nor_init_default_params(struct spi_no= r *nor) =20 /* Set SPI NOR sizes. */ params->writesize =3D 1; - params->size =3D (u64)info->sector_size * info->n_sectors; + params->size =3D info->size; params->bank_size =3D params->size; params->page_size =3D info->page_size; =20 diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index dfc20a3296fb..12c35409493b 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -443,9 +443,9 @@ struct spi_nor_fixups { * @id: the flash's ID bytes. The first three bytes are the * JEDIC ID. JEDEC ID zero means "no ID" (mostly older ch= ips). * @id_len: the number of bytes of ID. + * @size: the size of the flash in bytes. * @sector_size: the size listed here is what works with SPINOR_OP_SE, = which * isn't necessarily called a "sector" by the vendor. - * @n_sectors: the number of sectors. * @n_banks: the number of banks. * @page_size: the flash's page size. * @addr_nbytes: number of address bytes to send. @@ -505,8 +505,8 @@ struct flash_info { char *name; u8 id[SPI_NOR_MAX_ID_LEN]; u8 id_len; + size_t size; unsigned sector_size; - u16 n_sectors; u16 page_size; u8 n_banks; u8 addr_nbytes; @@ -556,8 +556,8 @@ struct flash_info { .id_len =3D 6 =20 #define SPI_NOR_GEOMETRY(_sector_size, _n_sectors, _n_banks) \ + .size =3D (_sector_size) * (_n_sectors), \ .sector_size =3D (_sector_size), \ - .n_sectors =3D (_n_sectors), \ .page_size =3D 256, \ .n_banks =3D (_n_banks) =20 @@ -575,8 +575,8 @@ struct flash_info { SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 1), =20 #define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_nbytes) \ + .size =3D (_sector_size) * (_n_sectors), \ .sector_size =3D (_sector_size), \ - .n_sectors =3D (_n_sectors), \ .page_size =3D (_page_size), \ .n_banks =3D 1, \ .addr_nbytes =3D (_addr_nbytes), \ diff --git a/drivers/mtd/spi-nor/swp.c b/drivers/mtd/spi-nor/swp.c index 5ab9d5324860..40bf52867095 100644 --- a/drivers/mtd/spi-nor/swp.c +++ b/drivers/mtd/spi-nor/swp.c @@ -34,17 +34,18 @@ static u8 spi_nor_get_sr_tb_mask(struct spi_nor *nor) static u64 spi_nor_get_min_prot_length_sr(struct spi_nor *nor) { unsigned int bp_slots, bp_slots_needed; + unsigned int sector_size =3D nor->info->sector_size; + u64 n_sectors =3D div_u64(nor->params->size, sector_size); u8 mask =3D spi_nor_get_sr_bp_mask(nor); =20 /* Reserved one for "protect none" and one for "protect all". */ bp_slots =3D (1 << hweight8(mask)) - 2; - bp_slots_needed =3D ilog2(nor->info->n_sectors); + bp_slots_needed =3D ilog2(n_sectors); =20 if (bp_slots_needed > bp_slots) - return nor->info->sector_size << - (bp_slots_needed - bp_slots); + return sector_size << (bp_slots_needed - bp_slots); else - return nor->info->sector_size; + return sector_size; } =20 static void spi_nor_get_locked_range_sr(struct spi_nor *nor, u8 sr, loff_t= *ofs, diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 34267591282c..284e2e4970ab 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -23,8 +23,8 @@ =20 #define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \ SPI_NOR_ID(_jedec_id, 0), \ + .size =3D 8 * (_page_size) * (_n_sectors), \ .sector_size =3D (8 * (_page_size)), \ - .n_sectors =3D (_n_sectors), \ .page_size =3D (_page_size), \ .n_banks =3D 1, \ .flags =3D SPI_NOR_NO_FR @@ -138,7 +138,7 @@ static int xilinx_nor_setup(struct spi_nor *nor, page_size =3D (nor->params->page_size =3D=3D 264) ? 256 : 512; nor->params->page_size =3D page_size; nor->mtd.writebufsize =3D page_size; - nor->params->size =3D 8 * page_size * nor->info->n_sectors; + nor->params->size =3D nor->info->size; nor->mtd.erasesize =3D 8 * page_size; } else { /* Flash in Default addressing mode */ --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C20AC001B0 for ; Mon, 7 Aug 2023 13:22:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233948AbjHGNW2 (ORCPT ); Mon, 7 Aug 2023 09:22:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233941AbjHGNWM (ORCPT ); Mon, 7 Aug 2023 09:22:12 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90ADC1992 for ; Mon, 7 Aug 2023 06:22:06 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 06AD261AD8 for ; Mon, 7 Aug 2023 13:22:06 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B3FDCC433A9; Mon, 7 Aug 2023 13:22:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414525; bh=Q4z4+GIyFZK8CSdRNcA78KcB6lv81rYFZShyRxMrYg8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Xy9tZZyDS9je5J/g5EPyXSF5L28YejMfzVdB3pstP80KdTfQAO9R5VCFIcYn4TrPh 1zJBWiJPCtn3ui2aBMISCrzXDs1typj833a+eUPw977ssxgTzHyBxS8ckonXO1JCGE JbR3AOhxrV2BufQ1iuDNmUzEXp7zkTzkoSeCsmU8OkQfaAkKhVVGX0kGtbJBLTJYaM i90jVNJLq48HQlpIOBAlsuxEi5/JxK8ou+X5wJaTdAmyjzs+Lk6nrRyD5/3z8u8qX5 u3L+0AW0NHznZO3CxU8wprOwygBx3eYtxoXQbgv/8N5upCWabLKeD4r5+9CUkJyVAW Jt40hC41GFArw== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:00 +0200 Subject: [PATCH 06/41] mtd: spi-nor: default page_size to 256 bytes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-6-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFO() macro always set the page_size to 256 bytes. Make that an optinal parameter. This default is a sane one for all older flashes, newer ones will set the page size by its SFDP tables anyway. Signed-off-by: Michael Walle Reviewed-by: Miquel Raynal --- drivers/mtd/spi-nor/core.c | 7 +------ drivers/mtd/spi-nor/core.h | 8 ++++++-- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index c504a5af4032..138bc1e0a67c 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2017,11 +2017,6 @@ static const struct spi_nor_manufacturer *manufactur= ers[] =3D { static const struct flash_info spi_nor_generic_flash =3D { .name =3D "spi-nor-generic", .n_banks =3D 1, - /* - * JESD216 rev A doesn't specify the page size, therefore we need a - * sane default. - */ - .page_size =3D 256, .parse_sfdp =3D true, }; =20 @@ -3000,7 +2995,7 @@ static void spi_nor_init_default_params(struct spi_no= r *nor) params->writesize =3D 1; params->size =3D info->size; params->bank_size =3D params->size; - params->page_size =3D info->page_size; + params->page_size =3D info->page_size ?: SPI_NOR_DEFAULT_PAGE_SIZE; =20 if (!(info->flags & SPI_NOR_NO_FR)) { /* Default to Fast Read for DT and non-DT platform devices. */ diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 12c35409493b..25bc18197614 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -10,6 +10,11 @@ #include "sfdp.h" =20 #define SPI_NOR_MAX_ID_LEN 6 +/* + * 256 bytes is a sane default for most older flashes. Newer flashes will + * have the page size defined within their SFDP tables. + */ +#define SPI_NOR_DEFAULT_PAGE_SIZE 256 =20 /* Standard SPI NOR flash operations. */ #define SPI_NOR_READID_OP(naddr, ndummy, buf, len) \ @@ -447,7 +452,7 @@ struct spi_nor_fixups { * @sector_size: the size listed here is what works with SPINOR_OP_SE, = which * isn't necessarily called a "sector" by the vendor. * @n_banks: the number of banks. - * @page_size: the flash's page size. + * @page_size: (optional) the flash's page size. Defaults to 256. * @addr_nbytes: number of address bytes to send. * * @parse_sfdp: true when flash supports SFDP tables. The false value = has no @@ -558,7 +563,6 @@ struct flash_info { #define SPI_NOR_GEOMETRY(_sector_size, _n_sectors, _n_banks) \ .size =3D (_sector_size) * (_n_sectors), \ .sector_size =3D (_sector_size), \ - .page_size =3D 256, \ .n_banks =3D (_n_banks) =20 /* Used when the "_ext_id" is two bytes at most */ --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6EEADC001B0 for ; Mon, 7 Aug 2023 13:22:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233994AbjHGNWc (ORCPT ); Mon, 7 Aug 2023 09:22:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233013AbjHGNWW (ORCPT ); Mon, 7 Aug 2023 09:22:22 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ABCE319A6 for ; Mon, 7 Aug 2023 06:22:08 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 1C0D361AB6 for ; Mon, 7 Aug 2023 13:22:08 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CEA7EC433CD; Mon, 7 Aug 2023 13:22:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414527; bh=XCnlYb+na/0VxaPkBA8d090WtxQfh60ZWSm4AhLeiK0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=lm+TRtxDDlqNgRjhBOrkxAYFV06TLlaaJeXExcYSfPKCr5BLujJM7KrBD2eI07de+ PdSKjvuauQDNfccs3LbxLvm2hrMILLYO4qZOK1Dw/ZUftYSniLKP5Oe/G58vgIarxM f74/vhIGqauPWq08IXp2vt01mOYUzQ9NKgH+dxfO44RU+2jQosvSoxI5nhN7aUwOTp mwI/xx4mjHf6hmkNN2DDjR4MRN2dDvL2tOnz7e/NYwvF8FV/4Rdvd3Sdr5nK2If9Kz 4tamEpUySMNIWAaLnYyOx0LW0YQCvLep2BJ/kHNboJgDrGXSRB9x/ZAnmDMh0bSD9q 7dcBYwYRa5b3w== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:01 +0200 Subject: [PATCH 07/41] mtd: spi-nor: store .n_banks in struct spi_nor_flash_parameter MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-7-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org First, fixups might want to replace the n_banks parameter, thus we need it in the (writable) parameter struct. Secondly, this way we can have a default in the core and just skip setting the n_banks in the flash_info database. Most of the flashes doesn't have more than one bank. Signed-off-by: Michael Walle Reviewed-by: Miquel Raynal --- drivers/mtd/spi-nor/core.c | 7 ++++--- drivers/mtd/spi-nor/core.h | 2 ++ 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 138bc1e0a67c..ea94fb0da1e5 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2861,7 +2861,7 @@ static void spi_nor_init_flags(struct spi_nor *nor) if (flags & NO_CHIP_ERASE) nor->flags |=3D SNOR_F_NO_OP_CHIP_ERASE; =20 - if (flags & SPI_NOR_RWW && nor->info->n_banks > 1 && + if (flags & SPI_NOR_RWW && nor->params->n_banks > 1 && !nor->controller_ops) nor->flags |=3D SNOR_F_RWW; } @@ -2925,8 +2925,8 @@ static int spi_nor_late_init_params(struct spi_nor *n= or) if (nor->flags & SNOR_F_HAS_LOCK && !nor->params->locking_ops) spi_nor_init_default_locking_ops(nor); =20 - if (nor->info->n_banks > 1) - params->bank_size =3D div64_u64(params->size, nor->info->n_banks); + if (params->n_banks > 1) + params->bank_size =3D div64_u64(params->size, params->n_banks); =20 return 0; } @@ -2996,6 +2996,7 @@ static void spi_nor_init_default_params(struct spi_no= r *nor) params->size =3D info->size; params->bank_size =3D params->size; params->page_size =3D info->page_size ?: SPI_NOR_DEFAULT_PAGE_SIZE; + params->n_banks =3D info->n_banks; =20 if (!(info->flags & SPI_NOR_NO_FR)) { /* Default to Fast Read for DT and non-DT platform devices. */ diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 25bc18197614..fe1ce232a6c8 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -358,6 +358,7 @@ struct spi_nor_otp { * in octal DTR mode. * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register * command in octal DTR mode. + * @n_banks: the number of banks. * @n_dice: number of dice in the flash memory. * @vreg_offset: volatile register offset for each die. * @hwcaps: describes the read and page program hardware @@ -394,6 +395,7 @@ struct spi_nor_flash_parameter { u8 addr_mode_nbytes; u8 rdsr_dummy; u8 rdsr_addr_nbytes; + u8 n_banks; u8 n_dice; u32 *vreg_offset; =20 --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D05D9C04A6A for ; Mon, 7 Aug 2023 13:22:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234020AbjHGNWh (ORCPT ); Mon, 7 Aug 2023 09:22:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35888 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233961AbjHGNWW (ORCPT ); Mon, 7 Aug 2023 09:22:22 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D47CB1BCA for ; Mon, 7 Aug 2023 06:22:10 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 358A061AAC for ; Mon, 7 Aug 2023 13:22:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EC75CC433BC; Mon, 7 Aug 2023 13:22:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414529; bh=x81z/w7MTIXGNt4ORqQ7OIkEQ9gCB22Av++T5rIayN4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=PpswHcdMJUXyczPi0T7jDCRwsch7FmOyhzHvs0POEo6JrQeXJrkM+L5BEp+4OBBfy I5+axJ1Bd8LOH5K6euVgc3IYqNhs9Owjkk6d7uJ+r0zgsx9VKqq2xBjGf3cDCFaMp5 9X+vfSZYqR3d4Z8rVoNxaJ9PcovdMynvN5sh1bTipg8rSX13gknni25B6rpw248I2W CHU4gNAG8Nv/h1f+u3fNBGSZWPzgJkOoqVDZUScYgZmMcYbCSA/wdmJ8FJhSoIKw15 6kcDIm9zVitjkn05TYEOIflkVwCyqxjOL2BjO1ktrF9eBuudkxA0btywbWKXozmy9m v3Gc3f53ycWJw== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:02 +0200 Subject: [PATCH 08/41] mtd: spi-nor: default .n_banks to 1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-8-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org If .n_banks is not set in the flash_info database, the default value should be 1. This way, we don't have to always set the .n_banks parameter in flash_info. Signed-off-by: Michael Walle Reviewed-by: Miquel Raynal --- drivers/mtd/spi-nor/core.c | 3 +-- drivers/mtd/spi-nor/core.h | 8 ++++---- drivers/mtd/spi-nor/xilinx.c | 1 - 3 files changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index ea94fb0da1e5..015152ba8973 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2016,7 +2016,6 @@ static const struct spi_nor_manufacturer *manufacture= rs[] =3D { =20 static const struct flash_info spi_nor_generic_flash =3D { .name =3D "spi-nor-generic", - .n_banks =3D 1, .parse_sfdp =3D true, }; =20 @@ -2996,7 +2995,7 @@ static void spi_nor_init_default_params(struct spi_no= r *nor) params->size =3D info->size; params->bank_size =3D params->size; params->page_size =3D info->page_size ?: SPI_NOR_DEFAULT_PAGE_SIZE; - params->n_banks =3D info->n_banks; + params->n_banks =3D info->n_banks ?: SPI_NOR_DEFAULT_N_BANKS; =20 if (!(info->flags & SPI_NOR_NO_FR)) { /* Default to Fast Read for DT and non-DT platform devices. */ diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index fe1ce232a6c8..c90445e186c0 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -15,6 +15,7 @@ * have the page size defined within their SFDP tables. */ #define SPI_NOR_DEFAULT_PAGE_SIZE 256 +#define SPI_NOR_DEFAULT_N_BANKS 1 =20 /* Standard SPI NOR flash operations. */ #define SPI_NOR_READID_OP(naddr, ndummy, buf, len) \ @@ -453,7 +454,7 @@ struct spi_nor_fixups { * @size: the size of the flash in bytes. * @sector_size: the size listed here is what works with SPINOR_OP_SE, = which * isn't necessarily called a "sector" by the vendor. - * @n_banks: the number of banks. + * @n_banks: (optional) the number of banks. Defaults to 1. * @page_size: (optional) the flash's page size. Defaults to 256. * @addr_nbytes: number of address bytes to send. * @@ -570,7 +571,7 @@ struct flash_info { /* Used when the "_ext_id" is two bytes at most */ #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors) \ SPI_NOR_ID((_jedec_id), (_ext_id)), \ - SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 1), + SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 0), =20 #define INFOB(_jedec_id, _ext_id, _sector_size, _n_sectors, _n_banks) \ SPI_NOR_ID((_jedec_id), (_ext_id)), \ @@ -578,13 +579,12 @@ struct flash_info { =20 #define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors) \ SPI_NOR_ID6((_jedec_id), (_ext_id)), \ - SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 1), + SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 0), =20 #define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_nbytes) \ .size =3D (_sector_size) * (_n_sectors), \ .sector_size =3D (_sector_size), \ .page_size =3D (_page_size), \ - .n_banks =3D 1, \ .addr_nbytes =3D (_addr_nbytes), \ .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, \ =20 diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 284e2e4970ab..8d4539e32dfe 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -26,7 +26,6 @@ .size =3D 8 * (_page_size) * (_n_sectors), \ .sector_size =3D (8 * (_page_size)), \ .page_size =3D (_page_size), \ - .n_banks =3D 1, \ .flags =3D SPI_NOR_NO_FR =20 /* Xilinx S3AN share MFR with Atmel SPI NOR */ --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25176C001B0 for ; Mon, 7 Aug 2023 13:22:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233983AbjHGNWs (ORCPT ); Mon, 7 Aug 2023 09:22:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233941AbjHGNW3 (ORCPT ); Mon, 7 Aug 2023 09:22:29 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 076441BF3 for ; Mon, 7 Aug 2023 06:22:13 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 57EA361AE9 for ; Mon, 7 Aug 2023 13:22:12 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 13989C433C8; Mon, 7 Aug 2023 13:22:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414531; bh=rvtOy7dnpdWfQpkGSkJU8iwlrHMZ9j+wqgG+HgoebEY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Pn8pAVmWqSGjSRrjhzKWyoTOnuvKN89+fNilZObQ9KkSuN1fnwilTyu7KoQ/Z+LW+ fqimggEdnQykaUEAtLogbPUeZnTGi2F0iVBgMYYHQ9Ik4pmvfBww36ura8MDgX+tDz na2UQrG73ylQ/UYIIFrL61ocNpKPHUf+nZwnFoJvrNVgSFhD953GyUNNpV03PlAlFO 5Y9GluGfnYgjEqE6wFi6Hjf9UvOp5t5dGhQ0+gfNjRbIY/yPiK5SldMHuK0V6xC0mA ApeXTuflBoVPYBGVZkoHr6H3NMZOVgR4pqyaIepxu0OvE/X6BsexlcwYq9hdMyo02X GpZKcbsrIwOuQ== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:03 +0200 Subject: [PATCH 09/41] mtd: spi-nor: push 4k SE handling into spi_nor_select_uniform_erase() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-9-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 4k sector erase sizes are only a thing with uniform erase types. Push the "we want 4k erase sizes" handling into spi_nor_select_uniform_erase(). One might wonder why the former sector_size isn't used anymore. It is because we either search for the largest erase size or if selected through kconfig, the 4k erase size. Now, why is that correct? For this, we have to differentiate between (1) flashes with SFDP and (2) without SFDP. For (1), we just set one (or two if SECT_4K is set) erase types and wanted_size is exactly one of these. For (2) things are a bit more complicated. For flashes which we don't have in our flash_info database, the generic driver is used and sector_size was already 0, which in turn selected the largest erase size. For flashes which had SFDP and an entry in flash_info, sector_size was always the largest sector and thus the largest erase type. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.c | 27 +++++++++------------------ 1 file changed, 9 insertions(+), 18 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 015152ba8973..5c6a0edafae2 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2511,13 +2511,6 @@ static int spi_nor_select_pp(struct spi_nor *nor, /** * spi_nor_select_uniform_erase() - select optimum uniform erase type * @map: the erase map of the SPI NOR - * @wanted_size: the erase type size to search for. Contains the value of - * info->sector_size, the "small sector" size in case - * CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is defined or 0 if - * there is no information about the sector size. The - * latter is the case if the flash parameters are parsed - * solely by SFDP, then the largest supported erase type - * is selected. * * Once the optimum uniform sector erase command is found, disable all the * other. @@ -2525,13 +2518,16 @@ static int spi_nor_select_pp(struct spi_nor *nor, * Return: pointer to erase type on success, NULL otherwise. */ static const struct spi_nor_erase_type * -spi_nor_select_uniform_erase(struct spi_nor_erase_map *map, - const u32 wanted_size) +spi_nor_select_uniform_erase(struct spi_nor_erase_map *map) { const struct spi_nor_erase_type *tested_erase, *erase =3D NULL; int i; u8 uniform_erase_type =3D map->uniform_erase_type; =20 + /* + * Search for the biggest erase size, except for when compiled + * to use 4k erases. + */ for (i =3D SNOR_ERASE_TYPE_MAX - 1; i >=3D 0; i--) { if (!(uniform_erase_type & BIT(i))) continue; @@ -2543,10 +2539,11 @@ spi_nor_select_uniform_erase(struct spi_nor_erase_m= ap *map, continue; =20 /* - * If the current erase size is the one, stop here: + * If the current erase size is the 4k one, stop here, * we have found the right uniform Sector Erase command. */ - if (tested_erase->size =3D=3D wanted_size) { + if (IS_ENABLED(CONFIG_MTD_SPI_NOR_USE_4K_SECTORS) && + tested_erase->size =3D=3D SZ_4K) { erase =3D tested_erase; break; } @@ -2574,7 +2571,6 @@ static int spi_nor_select_erase(struct spi_nor *nor) struct spi_nor_erase_map *map =3D &nor->params->erase_map; const struct spi_nor_erase_type *erase =3D NULL; struct mtd_info *mtd =3D &nor->mtd; - u32 wanted_size =3D nor->info->sector_size; int i; =20 /* @@ -2585,13 +2581,8 @@ static int spi_nor_select_erase(struct spi_nor *nor) * manage the SPI flash memory as uniform with a single erase sector * size, when possible. */ -#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS - /* prefer "small sector" erase if possible */ - wanted_size =3D 4096u; -#endif - if (spi_nor_has_uniform_erase(nor)) { - erase =3D spi_nor_select_uniform_erase(map, wanted_size); + erase =3D spi_nor_select_uniform_erase(map); if (!erase) return -EINVAL; nor->erase_opcode =3D erase->opcode; --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25786C001B0 for ; Mon, 7 Aug 2023 13:23:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233903AbjHGNWu (ORCPT ); Mon, 7 Aug 2023 09:22:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35732 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233982AbjHGNWa (ORCPT ); Mon, 7 Aug 2023 09:22:30 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AD2531FCC for ; Mon, 7 Aug 2023 06:22:15 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6F8FA61AD8 for ; Mon, 7 Aug 2023 13:22:14 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2F3A8C433C7; Mon, 7 Aug 2023 13:22:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414533; bh=E+JQZfu4pGNJ17JtSl9cUW7fdM1ZGLxtIJz2xDbEL5Q=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=HocVn6R8oh/wEBD6MuYjxhKp90BmGCd6Xstbp6QGG3g81zq7MrbOBlnw7m0Eb0tsx KV2Q7qmdG1ehiFrKyWA+lFG/jpwIL2h4/oLo6QjHlwHh0cNpQK0MQWlGFsobajHCXX 4ceG0P6O1ABPY0D4xFl89RkFQihhTg2AP2hbUBwX/WKfoIdxQOpQr+GEXg/mZfq7Bg uxNUuz464iz9o9P2BbK+K9a/+fI+XUKcHAzUjdc32FNVqiJSf2adezaTiA0Ox56Zo3 1LWEGbn0QeJ7X8i40re7lkncyHgM2/aC3W4DvKI3E8nbYgSCEtTVNqjPSbOrpTLZKp KpwytaPfneXmg== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:04 +0200 Subject: [PATCH 10/41] mtd: spi-nor: make sector_size optional MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-10-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Most of the (old, non-SFDP) flashes use a sector size of 64k. Make that a default value so it can be optional in the flash_info database. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.c | 6 ++++-- drivers/mtd/spi-nor/core.h | 8 +++++--- drivers/mtd/spi-nor/swp.c | 6 +++++- 3 files changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 5c6a0edafae2..cf0e25b4f9a9 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2755,7 +2755,8 @@ static void spi_nor_no_sfdp_init_params(struct spi_no= r *nor) { struct spi_nor_flash_parameter *params =3D nor->params; struct spi_nor_erase_map *map =3D ¶ms->erase_map; - const u8 no_sfdp_flags =3D nor->info->no_sfdp_flags; + const struct flash_info *info =3D nor->info; + const u8 no_sfdp_flags =3D info->no_sfdp_flags; u8 i, erase_mask; =20 if (no_sfdp_flags & SPI_NOR_DUAL_READ) { @@ -2809,7 +2810,8 @@ static void spi_nor_no_sfdp_init_params(struct spi_no= r *nor) i++; } erase_mask |=3D BIT(i); - spi_nor_set_erase_type(&map->erase_type[i], nor->info->sector_size, + spi_nor_set_erase_type(&map->erase_type[i], + info->sector_size ?: SPI_NOR_DEFAULT_SECTOR_SIZE, SPINOR_OP_SE); spi_nor_init_uniform_erase_map(map, erase_mask, params->size); } diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index c90445e186c0..734aedd4d62c 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -16,6 +16,7 @@ */ #define SPI_NOR_DEFAULT_PAGE_SIZE 256 #define SPI_NOR_DEFAULT_N_BANKS 1 +#define SPI_NOR_DEFAULT_SECTOR_SIZE SZ_64K =20 /* Standard SPI NOR flash operations. */ #define SPI_NOR_READID_OP(naddr, ndummy, buf, len) \ @@ -452,8 +453,9 @@ struct spi_nor_fixups { * JEDIC ID. JEDEC ID zero means "no ID" (mostly older ch= ips). * @id_len: the number of bytes of ID. * @size: the size of the flash in bytes. - * @sector_size: the size listed here is what works with SPINOR_OP_SE, = which - * isn't necessarily called a "sector" by the vendor. + * @sector_size: (optional) the size listed here is what works with + * SPINOR_OP_SE, which isn't necessarily called a "sector= " by + * the vendor. Defaults to 64k. * @n_banks: (optional) the number of banks. Defaults to 1. * @page_size: (optional) the flash's page size. Defaults to 256. * @addr_nbytes: number of address bytes to send. @@ -565,7 +567,7 @@ struct flash_info { =20 #define SPI_NOR_GEOMETRY(_sector_size, _n_sectors, _n_banks) \ .size =3D (_sector_size) * (_n_sectors), \ - .sector_size =3D (_sector_size), \ + .sector_size =3D (_sector_size =3D=3D SZ_64K) ? 0 : (_sector_size), \ .n_banks =3D (_n_banks) =20 /* Used when the "_ext_id" is two bytes at most */ diff --git a/drivers/mtd/spi-nor/swp.c b/drivers/mtd/spi-nor/swp.c index 40bf52867095..585813310ee1 100644 --- a/drivers/mtd/spi-nor/swp.c +++ b/drivers/mtd/spi-nor/swp.c @@ -34,7 +34,11 @@ static u8 spi_nor_get_sr_tb_mask(struct spi_nor *nor) static u64 spi_nor_get_min_prot_length_sr(struct spi_nor *nor) { unsigned int bp_slots, bp_slots_needed; - unsigned int sector_size =3D nor->info->sector_size; + /* + * sector_size will eventually be replaced with the max erase size of + * the flash. For now, we need to have that ugly default. + */ + unsigned int sector_size =3D nor->info->sector_size ?: SPI_NOR_DEFAULT_SE= CTOR_SIZE; u64 n_sectors =3D div_u64(nor->params->size, sector_size); u8 mask =3D spi_nor_get_sr_bp_mask(nor); =20 --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3B16C001B0 for ; Mon, 7 Aug 2023 13:23:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231964AbjHGNXL (ORCPT ); Mon, 7 Aug 2023 09:23:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234003AbjHGNWe (ORCPT ); Mon, 7 Aug 2023 09:22:34 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F29431FE8 for ; Mon, 7 Aug 2023 06:22:17 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 8AFAE61A91 for ; Mon, 7 Aug 2023 13:22:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4A259C433C8; Mon, 7 Aug 2023 13:22:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414536; bh=2LSNh1CL/QIV2fp5aEOR8agOGXE7ARnjMMxkvP9cqpM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=qwfiwWQOsJkCQceip/EnBC5AkHBz1s36170dEGCozboqKj7G0Y3j/RUjdLu192JjQ 80B8IZizUjdhclfEXtNN2fc02KUgUS9jVIJYgTK6qyzgTd1e3w9LdGFBPYgmrsE1ep q2C1ZbDfQWX6KKo7FVZv4IdY3qS7o0dtyZyTNXTAraZnmjb14QGUdaDdvbFVGpUlUQ L3PhRPPE/wWIYOcvXo6KhUApph3GV+afKQhk1bnNohZsMrnrwnkcYhp91iHg/j+EIE OWnLY/NsCjIIT7XM4ttFJphMWsZbwpKNoUabTOWNgBNn1yl66ilPV9KYSaLYGd81RM 9rW22MOM6tptg== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:05 +0200 Subject: [PATCH 11/41] mtd: spi-nor: drop .parse_sfdp MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-11-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Drop the size parameter to indicate we need to do SFDP, we can do that because it is guaranteed that the size will be set by SFDP and because PARSE_SFDP forced the SFDP parsing it must be overwritten. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.c | 3 +-- drivers/mtd/spi-nor/core.h | 23 ++++++++++++++++------- drivers/mtd/spi-nor/eon.c | 3 +-- drivers/mtd/spi-nor/gigadevice.c | 3 +-- drivers/mtd/spi-nor/issi.c | 4 +--- drivers/mtd/spi-nor/macronix.c | 1 - drivers/mtd/spi-nor/spansion.c | 12 ------------ drivers/mtd/spi-nor/winbond.c | 7 ++----- 8 files changed, 22 insertions(+), 34 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index cf0e25b4f9a9..41612b9f1098 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2016,7 +2016,6 @@ static const struct spi_nor_manufacturer *manufacture= rs[] =3D { =20 static const struct flash_info spi_nor_generic_flash =3D { .name =3D "spi-nor-generic", - .parse_sfdp =3D true, }; =20 static const struct flash_info *spi_nor_match_id(struct spi_nor *nor, @@ -3068,7 +3067,7 @@ static int spi_nor_init_params(struct spi_nor *nor) =20 spi_nor_init_default_params(nor); =20 - if (nor->info->parse_sfdp) { + if (spi_nor_needs_sfdp(nor)) { ret =3D spi_nor_parse_sfdp(nor); if (ret) { dev_err(nor->dev, "BFPT parsing failed. Please consider using SPI_NOR_S= KIP_SFDP when declaring the flash\n"); diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 734aedd4d62c..d9bf7a24ae1f 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -460,9 +460,6 @@ struct spi_nor_fixups { * @page_size: (optional) the flash's page size. Defaults to 256. * @addr_nbytes: number of address bytes to send. * - * @parse_sfdp: true when flash supports SFDP tables. The false value = has no - * meaning. If one wants to skip the SFDP tables, one sho= uld - * instead use the SPI_NOR_SKIP_SFDP sfdp_flag. * @flags: flags that indicate support that is not defined by the * JESD216 standard in its SFDP tables. Flag meanings: * SPI_NOR_HAS_LOCK: flash supports lock/unlock via SR @@ -521,7 +518,6 @@ struct flash_info { u8 n_banks; u8 addr_nbytes; =20 - bool parse_sfdp; u16 flags; #define SPI_NOR_HAS_LOCK BIT(0) #define SPI_NOR_HAS_TB BIT(1) @@ -598,9 +594,6 @@ struct flash_info { .n_regions =3D (_n_regions), \ }, =20 -#define PARSE_SFDP \ - .parse_sfdp =3D true, \ - #define FLAGS(_flags) \ .flags =3D (_flags), \ =20 @@ -740,6 +733,22 @@ static inline struct spi_nor *mtd_to_spi_nor(struct mt= d_info *mtd) return container_of(mtd, struct spi_nor, mtd); } =20 +/** + * spi_nor_needs_sfdp() - returns true if SFDP parsing is used for this fl= ash. + * + * Return: true if SFDP parsing is needed + */ +static inline bool spi_nor_needs_sfdp(const struct spi_nor *nor) +{ + /* + * The flash size is one property parsed by the SFDP. We use it as an + * indicator whether we need SFDP parsing for a particular flash. I.e. + * non-legacy flash entries in flash_info will have a size of zero iff + * SFDP should be used. + */ + return nor->info->size; +} + #ifdef CONFIG_DEBUG_FS void spi_nor_debugfs_register(struct spi_nor *nor); void spi_nor_debugfs_shutdown(void); diff --git a/drivers/mtd/spi-nor/eon.c b/drivers/mtd/spi-nor/eon.c index 50a11053711f..434aaf155856 100644 --- a/drivers/mtd/spi-nor/eon.c +++ b/drivers/mtd/spi-nor/eon.c @@ -25,8 +25,7 @@ static const struct flash_info eon_nor_parts[] =3D { { "en25qh64", INFO(0x1c7017, 0, 64 * 1024, 128) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, { "en25qh128", INFO(0x1c7018, 0, 64 * 1024, 256) }, - { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512) - PARSE_SFDP }, + { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 0) }, { "en25s64", INFO(0x1c3817, 0, 64 * 1024, 128) NO_SFDP_FLAGS(SECT_4K) }, }; diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadev= ice.c index d57ddaf1525b..7cf142c75529 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -62,8 +62,7 @@ static const struct flash_info gigadevice_nor_parts[] =3D= { FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "gd25q256", INFO(0xc84019, 0, 64 * 1024, 512) - PARSE_SFDP + { "gd25q256", INFO(0xc84019, 0, 64 * 1024, 0) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6) FIXUP_FLAGS(SPI_NOR_4B_OPCODES) .fixups =3D &gd25q256_fixups }, diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index accdf7aa2bfd..9d22b799ce94 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -62,8 +62,7 @@ static const struct flash_info issi_nor_parts[] =3D { NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, { "is25lp128", INFO(0x9d6018, 0, 64 * 1024, 256) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "is25lp256", INFO(0x9d6019, 0, 64 * 1024, 512) - PARSE_SFDP + { "is25lp256", INFO(0x9d6019, 0, 64 * 1024, 0) FIXUP_FLAGS(SPI_NOR_4B_OPCODES) .fixups =3D &is25lp256_fixups }, { "is25wp032", INFO(0x9d7016, 0, 64 * 1024, 64) @@ -73,7 +72,6 @@ static const struct flash_info issi_nor_parts[] =3D { { "is25wp128", INFO(0x9d7018, 0, 64 * 1024, 256) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "is25wp256", INFO(0x9d7019, 0, 0, 0) - PARSE_SFDP FIXUP_FLAGS(SPI_NOR_4B_OPCODES) FLAGS(SPI_NOR_QUAD_PP) .fixups =3D &is25lp256_fixups }, diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index eb149e517c1f..0f3bd3ed8eff 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -83,7 +83,6 @@ static const struct flash_info macronix_nor_parts[] =3D { NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, { "mx25uw51245g", INFOB(0xc2813a, 0, 0, 0, 4) - PARSE_SFDP FLAGS(SPI_NOR_RWW) }, { "mx25v8035f", INFO(0xc22314, 0, 64 * 1024, 16) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 709822fced86..e6468569f178 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -849,59 +849,47 @@ static const struct flash_info spansion_nor_parts[] = =3D { NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, { "s25fs256t", INFO6(0x342b19, 0x0f0890, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s25fs256t_fixups }, { "s25hl512t", INFO6(0x342a1a, 0x0f0390, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s25hx_t_fixups }, { "s25hl01gt", INFO6(0x342a1b, 0x0f0390, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s25hx_t_fixups }, { "s25hl02gt", INFO6(0x342a1c, 0x0f0090, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) FLAGS(NO_CHIP_ERASE) .fixups =3D &s25hx_t_fixups }, { "s25hs512t", INFO6(0x342b1a, 0x0f0390, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s25hx_t_fixups }, { "s25hs01gt", INFO6(0x342b1b, 0x0f0390, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s25hx_t_fixups }, { "s25hs02gt", INFO6(0x342b1c, 0x0f0090, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) FLAGS(NO_CHIP_ERASE) .fixups =3D &s25hx_t_fixups }, { "cy15x104q", INFO6(0x042cc2, 0x7f7f7f, 512 * 1024, 1) FLAGS(SPI_NOR_NO_ERASE) }, { "s28hl512t", INFO(0x345a1a, 0, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s28hx_t_fixups, }, { "s28hl01gt", INFO(0x345a1b, 0, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s28hx_t_fixups, }, { "s28hs512t", INFO(0x345b1a, 0, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s28hx_t_fixups, }, { "s28hs01gt", INFO(0x345b1b, 0, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s28hx_t_fixups, }, { "s28hs02gt", INFO(0x345b1c, 0, 0, 0) - PARSE_SFDP MFR_FLAGS(USE_CLPEF) .fixups =3D &s28hx_t_fixups, }, diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index cd99c9a1c568..c21fed842762 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -126,8 +126,7 @@ static const struct flash_info winbond_nor_parts[] =3D { { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) .fixups =3D &w25q256_fixups }, - { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512) - PARSE_SFDP }, + { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 0) }, { "w25q256jw", INFO(0xef6019, 0, 64 * 1024, 512) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, @@ -135,10 +134,8 @@ static const struct flash_info winbond_nor_parts[] =3D= { NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) }, { "w25q512nwq", INFO(0xef6020, 0, 0, 0) - PARSE_SFDP OTP_INFO(256, 3, 0x1000, 0x1000) }, - { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 1024) - PARSE_SFDP + { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 0) OTP_INFO(256, 3, 0x1000, 0x1000) }, { "w25q512jvq", INFO(0xef4020, 0, 64 * 1024, 1024) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B40FEC04A94 for ; Mon, 7 Aug 2023 13:23:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233949AbjHGNXR (ORCPT ); Mon, 7 Aug 2023 09:23:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233980AbjHGNWr (ORCPT ); Mon, 7 Aug 2023 09:22:47 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 349B2211F for ; Mon, 7 Aug 2023 06:22:19 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A7FD661AB6 for ; Mon, 7 Aug 2023 13:22:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 65B9EC433BC; Mon, 7 Aug 2023 13:22:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414538; bh=oe7aMV5rIYZGzkefnYjB3oJt+ZI8q8he9pIR1JwkW+w=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Zbd+HJ1L+eHI30TFQRB8B6NnhcBAKMJHoaYjc4FGlC9ozLo3u7ofyypq1IpUMdGXb dZmH35mgts3sOgWrJMcuTkbTG5ZIOkBDNfl3YcPMRRJhwmn5GLUL1TF+lRTPbWX7TS LG3bX/SXZQbAnCkNQDJO6ecJDaKQca1EjFVWnhCgTrjn3K0JUHGb54Nx4t5+GUoGzj HvpinalJ32epIs8E3qNGO4DbUYcbrcZoYvIjiVbck/gEmO5i6in8GJ0kXlriYd1K/J 2hf/Io2lVGbe47LzllkK3pZ4xY936Wgq7XUgCgaVu96t2okbRG3XqKEdYnjx8WzEF9 bFPO4EqmZDJ2A== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:06 +0200 Subject: [PATCH 12/41] mtd: spi-nor: introduce (temporary) INFO0() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-12-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The id will be converted to an own structure. To differentiate between flashes with and without IDs, introduce a temporary macro INFO0() and convert all flashes with no ID to use it. After the flash_info conversion, that macro will be removed along with all the other INFOx() macros. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.h | 3 +++ drivers/mtd/spi-nor/issi.c | 4 ++-- drivers/mtd/spi-nor/micron-st.c | 18 +++++++++--------- 3 files changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index d9bf7a24ae1f..eec14733c233 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -571,6 +571,9 @@ struct flash_info { SPI_NOR_ID((_jedec_id), (_ext_id)), \ SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 0), =20 +#define INFO0(_sector_size, _n_sectors) \ + SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 0), + #define INFOB(_jedec_id, _ext_id, _sector_size, _n_sectors, _n_banks) \ SPI_NOR_ID((_jedec_id), (_ext_id)), \ SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), (_n_banks)), diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index 9d22b799ce94..b936a28a85df 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -77,11 +77,11 @@ static const struct flash_info issi_nor_parts[] =3D { .fixups =3D &is25lp256_fixups }, =20 /* PMC */ - { "pm25lv512", INFO(0, 0, 32 * 1024, 2) + { "pm25lv512", INFO0(32 * 1024, 2) NO_SFDP_FLAGS(SECT_4K) .fixups =3D &pm25lv_nor_fixups }, - { "pm25lv010", INFO(0, 0, 32 * 1024, 4) + { "pm25lv010", INFO0(32 * 1024, 4) NO_SFDP_FLAGS(SECT_4K) .fixups =3D &pm25lv_nor_fixups }, diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 6ad080c52ab5..5406a3af2ce0 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -272,15 +272,15 @@ static const struct flash_info st_nor_parts[] =3D { { "m25p64", INFO(0x202017, 0, 64 * 1024, 128) }, { "m25p128", INFO(0x202018, 0, 256 * 1024, 64) }, =20 - { "m25p05-nonjedec", INFO(0, 0, 32 * 1024, 2) }, - { "m25p10-nonjedec", INFO(0, 0, 32 * 1024, 4) }, - { "m25p20-nonjedec", INFO(0, 0, 64 * 1024, 4) }, - { "m25p40-nonjedec", INFO(0, 0, 64 * 1024, 8) }, - { "m25p80-nonjedec", INFO(0, 0, 64 * 1024, 16) }, - { "m25p16-nonjedec", INFO(0, 0, 64 * 1024, 32) }, - { "m25p32-nonjedec", INFO(0, 0, 64 * 1024, 64) }, - { "m25p64-nonjedec", INFO(0, 0, 64 * 1024, 128) }, - { "m25p128-nonjedec", INFO(0, 0, 256 * 1024, 64) }, + { "m25p05-nonjedec", INFO0( 32 * 1024, 2) }, + { "m25p10-nonjedec", INFO0( 32 * 1024, 4) }, + { "m25p20-nonjedec", INFO0( 64 * 1024, 4) }, + { "m25p40-nonjedec", INFO0( 64 * 1024, 8) }, + { "m25p80-nonjedec", INFO0( 64 * 1024, 16) }, + { "m25p16-nonjedec", INFO0( 64 * 1024, 32) }, + { "m25p32-nonjedec", INFO0( 64 * 1024, 64) }, + { "m25p64-nonjedec", INFO0( 64 * 1024, 128) }, + { "m25p128-nonjedec", INFO0(256 * 1024, 64) }, =20 { "m45pe10", INFO(0x204011, 0, 64 * 1024, 2) }, { "m45pe80", INFO(0x204014, 0, 64 * 1024, 16) }, --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9185BC001DB for ; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414540; bh=OYqXpiJfD7CKOYsMEMU35VDN0K2sBcJl5m0KTqbgYPU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=LYk7Lff110rJSCILP0lNlbGpJrrElUprFw8OGJ11c2CQWSYeg38erO9cWZ9B8b0Yf Dsz40bx+wf9K511K/JRex461RO0F82ceeqRc/ju9kY14DfwzT60kd/XxJ1Jx8Xsb4f sI8lLnl1esYjpOBdVfTBL8EYV+ZkvHxuLKGXiHqhbyWucLHFKEgCmqCIo4EGriJqgU XpgSsv1uaQ5ERAYjsYnJyPcz39Y0O4tJgeEBEklqRlO700i10POAvkCX9+Ez+xNe/Y xH8SQnTMu7yUNFhUrYCJlrmQ41q1WC+1N9hl4dnQTSNhzBrvCQu5FRQPi6wYs9R9JJ ROYLfAcFFsqog== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:07 +0200 Subject: [PATCH 13/41] mtd: spi-nor: move the .id and .id_len into an own structure MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-13-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Create a new structure to hold a flash ID and its length. The goal is to have a new macro SNOR_ID() which can have a flexible id length. This way we can get rid of all the individual INFOx() macros. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.c | 6 +++--- drivers/mtd/spi-nor/core.h | 33 ++++++++++++++++++++++++--------- drivers/mtd/spi-nor/micron-st.c | 4 ++-- drivers/mtd/spi-nor/spansion.c | 4 ++-- drivers/mtd/spi-nor/sysfs.c | 6 +++--- drivers/mtd/spi-nor/winbond.c | 1 - 6 files changed, 34 insertions(+), 20 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 41612b9f1098..1319fcb97e16 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2027,8 +2027,8 @@ static const struct flash_info *spi_nor_match_id(stru= ct spi_nor *nor, for (i =3D 0; i < ARRAY_SIZE(manufacturers); i++) { for (j =3D 0; j < manufacturers[i]->nparts; j++) { part =3D &manufacturers[i]->parts[j]; - if (part->id_len && - !memcmp(part->id, id, part->id_len)) { + if (part->id && + !memcmp(part->id->bytes, id, part->id->len)) { nor->manufacturer =3D manufacturers[i]; return part; } @@ -3369,7 +3369,7 @@ static const struct flash_info *spi_nor_get_flash_inf= o(struct spi_nor *nor, * If caller has specified name of flash model that can normally be * detected using JEDEC, let's verify it. */ - if (name && info->id_len) { + if (name && info->id) { const struct flash_info *jinfo; =20 jinfo =3D spi_nor_detect(nor); diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index eec14733c233..57272bb51eff 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -446,12 +446,22 @@ struct spi_nor_fixups { int (*late_init)(struct spi_nor *nor); }; =20 +/** + * struct spi_nor_id - SPI NOR flash ID. + * + * @bytes: the flash's ID bytes. The first three bytes are the JEDIC ID. + * @len: the number of bytes of ID. + */ +struct spi_nor_id { + const u8 *bytes; + u8 len; +}; + /** * struct flash_info - SPI NOR flash_info entry. + * @id: pointer to struct spi_nor_id or NULL, which means "no ID" (mostly + * older chips). * @name: the name of the flash. - * @id: the flash's ID bytes. The first three bytes are the - * JEDIC ID. JEDEC ID zero means "no ID" (mostly older ch= ips). - * @id_len: the number of bytes of ID. * @size: the size of the flash in bytes. * @sector_size: (optional) the size listed here is what works with * SPINOR_OP_SE, which isn't necessarily called a "sector= " by @@ -510,8 +520,7 @@ struct spi_nor_fixups { */ struct flash_info { char *name; - u8 id[SPI_NOR_MAX_ID_LEN]; - u8 id_len; + const struct spi_nor_id *id; size_t size; unsigned sector_size; u16 page_size; @@ -554,12 +563,18 @@ struct flash_info { #define SPI_NOR_ID_3ITEMS(_id) ((_id) >> 16) & 0xff, SPI_NOR_ID_2ITEMS(_id) =20 #define SPI_NOR_ID(_jedec_id, _ext_id) \ - .id =3D { SPI_NOR_ID_3ITEMS(_jedec_id), SPI_NOR_ID_2ITEMS(_ext_id) }, \ - .id_len =3D !(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0)) + .id =3D &(const struct spi_nor_id){ \ + .bytes =3D (const u8[]){ SPI_NOR_ID_3ITEMS(_jedec_id), \ + SPI_NOR_ID_2ITEMS(_ext_id) }, \ + .len =3D !(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0)), \ + } =20 #define SPI_NOR_ID6(_jedec_id, _ext_id) \ - .id =3D { SPI_NOR_ID_3ITEMS(_jedec_id), SPI_NOR_ID_3ITEMS(_ext_id) }, \ - .id_len =3D 6 + .id =3D &(const struct spi_nor_id){ \ + .bytes =3D (const u8[]){ SPI_NOR_ID_3ITEMS(_jedec_id), \ + SPI_NOR_ID_3ITEMS(_ext_id) }, \ + .len =3D 6, \ + } =20 #define SPI_NOR_GEOMETRY(_sector_size, _n_sectors, _n_banks) \ .size =3D (_sector_size) * (_n_sectors), \ diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 5406a3af2ce0..229c951efcce 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -78,7 +78,7 @@ static int micron_st_nor_octal_dtr_en(struct spi_nor *nor) return ret; } =20 - if (memcmp(buf, nor->info->id, nor->info->id_len)) + if (memcmp(buf, nor->info->id->bytes, nor->info->id->len)) return -EINVAL; =20 return 0; @@ -114,7 +114,7 @@ static int micron_st_nor_octal_dtr_dis(struct spi_nor *= nor) return ret; } =20 - if (memcmp(buf, nor->info->id, nor->info->id_len)) + if (memcmp(buf, nor->info->id->bytes, nor->info->id->len)) return -EINVAL; =20 return 0; diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index e6468569f178..d7012ab3de2c 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -228,7 +228,7 @@ static int cypress_nor_octal_dtr_en(struct spi_nor *nor) return ret; } =20 - if (memcmp(buf, nor->info->id, nor->info->id_len)) + if (memcmp(buf, nor->info->id->bytes, nor->info->id->len)) return -EINVAL; =20 return 0; @@ -272,7 +272,7 @@ static int cypress_nor_octal_dtr_dis(struct spi_nor *no= r) return ret; } =20 - if (memcmp(buf, nor->info->id, nor->info->id_len)) + if (memcmp(buf, nor->info->id->bytes, nor->info->id->len)) return -EINVAL; =20 return 0; diff --git a/drivers/mtd/spi-nor/sysfs.c b/drivers/mtd/spi-nor/sysfs.c index c09bb832b3b9..2dfdc555a69f 100644 --- a/drivers/mtd/spi-nor/sysfs.c +++ b/drivers/mtd/spi-nor/sysfs.c @@ -35,8 +35,8 @@ static ssize_t jedec_id_show(struct device *dev, struct spi_device *spi =3D to_spi_device(dev); struct spi_mem *spimem =3D spi_get_drvdata(spi); struct spi_nor *nor =3D spi_mem_get_drvdata(spimem); - const u8 *id =3D nor->info->id_len ? nor->info->id : nor->id; - u8 id_len =3D nor->info->id_len ?: SPI_NOR_MAX_ID_LEN; + const u8 *id =3D nor->info->id ? nor->info->id->bytes : nor->id; + u8 id_len =3D nor->info->id ? nor->info->id->len : SPI_NOR_MAX_ID_LEN; =20 return sysfs_emit(buf, "%*phN\n", id_len, id); } @@ -78,7 +78,7 @@ static umode_t spi_nor_sysfs_is_visible(struct kobject *k= obj, =20 if (attr =3D=3D &dev_attr_manufacturer.attr && !nor->manufacturer) return 0; - if (attr =3D=3D &dev_attr_jedec_id.attr && !nor->info->id_len && !nor->id) + if (attr =3D=3D &dev_attr_jedec_id.attr && !nor->info->id && !nor->id) return 0; =20 return 0444; diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index c21fed842762..7873cc394f07 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -121,7 +121,6 @@ static const struct flash_info winbond_nor_parts[] =3D { { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16) NO_SFDP_FLAGS(SECT_4K) }, { "w25q128", INFO(0xef4018, 0, 0, 0) - PARSE_SFDP FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A065EC001DB for ; Mon, 7 Aug 2023 13:23:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233974AbjHGNXU (ORCPT ); Mon, 7 Aug 2023 09:23:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35878 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234036AbjHGNWv (ORCPT ); Mon, 7 Aug 2023 09:22:51 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 113CD26A6 for ; Mon, 7 Aug 2023 06:22:29 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id DE72261AAC for ; Mon, 7 Aug 2023 13:22:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9E754C433CB; Mon, 7 Aug 2023 13:22:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414542; bh=lVNHe40ZD+qOohBgV1PoniWN1QEJCYIZ2y5SGmIv6ik=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=BLzgVoV9Kw93tRTL4v19Z6zKs5jepRwI5NdutVFedJCOcVomkJkGqQcv5ZZuEGcpq tAZA5Hsj7rOvIs05mA6Mc8aJXbXQbcQn4iqen6YWw+0QHPj/MZ4Q7RC94kYfLmDjvr iuuHmh+nYiv+fjWriB+GBrumYyjczTn1tkXsWzleUHc9w4Gus0dloarTebDAQRkrwm iarBY1+C3moLn/4kKvx2ZenQdWAN3INCRmy3vzqo3hR8FGWyGv2/gqBt9hMgjjU4ds IqDMppSeQ2Pq9qrx1IiMg0M4LuhuvqdYkGtJJswCjcKnINEeThYCGbJc0lLuDaGx23 PfhPscFx9RMJA== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:08 +0200 Subject: [PATCH 14/41] mtd: spi-nor: rename .otp_org to .otp and make it a pointer MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-14-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Move the OTP ops out of the flash_info structure. Besides of saving some space, there will be a new macro SNOR_OTP() which can be used to set the ops: .otp =3D SNOR_OTP(...), Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.c | 2 +- drivers/mtd/spi-nor/core.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 1319fcb97e16..06b34d9ad8a1 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2977,7 +2977,7 @@ static void spi_nor_init_default_params(struct spi_no= r *nor) struct device_node *np =3D spi_nor_get_flash_node(nor); =20 params->quad_enable =3D spi_nor_sr2_bit1_quad_enable; - params->otp.org =3D &info->otp_org; + params->otp.org =3D info->otp; =20 /* Default to 16-bit Write Status (01h) Command */ nor->flags |=3D SNOR_F_HAS_16BIT_SR; diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 57272bb51eff..e26a17d11c14 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -555,7 +555,7 @@ struct flash_info { =20 u8 mfr_flags; =20 - const struct spi_nor_otp_organization otp_org; + const struct spi_nor_otp_organization *otp; const struct spi_nor_fixups *fixups; }; =20 @@ -605,7 +605,7 @@ struct flash_info { .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, \ =20 #define OTP_INFO(_len, _n_regions, _base, _offset) \ - .otp_org =3D { \ + .otp =3D &(const struct spi_nor_otp_organization){ \ .len =3D (_len), \ .base =3D (_base), \ .offset =3D (_offset), \ --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83CA2C04A6A for ; Mon, 7 Aug 2023 13:23:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233982AbjHGNXX (ORCPT ); Mon, 7 Aug 2023 09:23:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234055AbjHGNWx (ORCPT ); Mon, 7 Aug 2023 09:22:53 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D5962699 for ; Mon, 7 Aug 2023 06:22:28 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 05E506192E for ; Mon, 7 Aug 2023 13:22:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B96F2C433C9; Mon, 7 Aug 2023 13:22:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414544; bh=1kWfbb4GxKzXNt/tXBE/oL4mhC+QvFa1x0qd8EeG3pM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Blgwb6rR4No2dDMf2JYx8EX4KxN7c0zJtPp1vrhzZZGyFdPHzduM011m3r9uDXhZ7 18dYm9kfPPPz0QgNSyylgsCyu9o97pDRav+C6ZfNuZ4zng9Nf461UM3jMVFIK/wXHo DRAI9bWqkXLbYJHx4YVFr9lNC7vy3d4NDduUrvUZG6c/dO0rLc9pmE3s0EnzXutqeX z/XCaGnbJoN8FjM7ligughXuiik7AaOYGLeAKhMQvW0e1tKY8mbvQmnOiFrp3SY9Mr RQAdzP5CyPI1gJr5kIibx8oLI/BSWCyko2Cb8d1fEgcOo7aV+jvrn2qvm/+YU14mzk I+35D0/M3gLDA== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:09 +0200 Subject: [PATCH 15/41] mtd: spi-nor: add SNOR_ID() and SNOR_OTP() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-15-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org After all the preparation, it is now time to introduce the new macros to specify flashes in our database: SNOR_ID() and SNOR_OTP(). An flash_info entry might now look like: { .id =3D SNOR_ID(0xef, 0x60, 0x16), .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, } Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index e26a17d11c14..d0e83bfb847c 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -559,6 +559,20 @@ struct flash_info { const struct spi_nor_fixups *fixups; }; =20 +#define SNOR_ID(...) \ + (&(const struct spi_nor_id){ \ + .bytes =3D (const u8[]){ __VA_ARGS__ }, \ + .len =3D sizeof((u8[]){ __VA_ARGS__ }), \ + }) + +#define SNOR_OTP(_len, _n_regions, _base, _offset) \ + (&(const struct spi_nor_otp_organization){ \ + .len =3D (_len), \ + .base =3D (_base), \ + .offset =3D (_offset), \ + .n_regions =3D (_n_regions), \ + }) + #define SPI_NOR_ID_2ITEMS(_id) ((_id) >> 8) & 0xff, (_id) & 0xff #define SPI_NOR_ID_3ITEMS(_id) ((_id) >> 16) & 0xff, SPI_NOR_ID_2ITEMS(_id) =20 --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99ECFC001DB for ; Mon, 7 Aug 2023 13:23:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233993AbjHGNXZ (ORCPT ); Mon, 7 Aug 2023 09:23:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234069AbjHGNWz (ORCPT ); Mon, 7 Aug 2023 09:22:55 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D541F199C for ; Mon, 7 Aug 2023 06:22:29 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 24E2B61B06 for ; Mon, 7 Aug 2023 13:22:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D4AB1C433CB; Mon, 7 Aug 2023 13:22:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414546; bh=OYrcmJUT5h7Sipmj2wgw6FsV6N5hRYaYL7WAjV1fktM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=TE6qKtSBb8CZr9ZzECczAZPyKwvJOQeV6P0q5jjOxV8MASANrm5+Die0IZra0FysH nKNDip5MqHaLxquMFUc6iMZcMgLrYLd4wauaPNn4kjEF05xW04ihmD/qaEM7T7zKOe fR2agB7+LVLK1+aDYkINPK8LftGVRNPmEYGrwdPHMrsVrV31V2EVhEra0BHc0MJeDC BFwVZrrFHoDMHADCQ0Jdw7AoiRhTcmYU4+01gGLeRxMpug2eWcnr2rawPMwwiuMYXz D/JXD+ig4kto/ZjtVnLxRX2aIg1W5olKFX6PAj/H1KDL4CPXY+nvBb8dnVg4BM/26K Qqx17LY0cPWuQ== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:10 +0200 Subject: [PATCH 16/41] mtd: spi-nor: remove or move flash_info comments MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-16-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Most of the comments are a relict of the past when the flash_info was just one table. Most of them are useless. Remove them. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/atmel.c | 1 - drivers/mtd/spi-nor/eon.c | 1 - drivers/mtd/spi-nor/esmt.c | 1 - drivers/mtd/spi-nor/everspin.c | 1 - drivers/mtd/spi-nor/intel.c | 1 - drivers/mtd/spi-nor/issi.c | 2 -- drivers/mtd/spi-nor/macronix.c | 1 - drivers/mtd/spi-nor/spansion.c | 3 --- drivers/mtd/spi-nor/sst.c | 1 - drivers/mtd/spi-nor/winbond.c | 1 - drivers/mtd/spi-nor/xmc.c | 2 +- 11 files changed, 1 insertion(+), 14 deletions(-) diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c index 58968c1e7d2f..d2de2cb0c066 100644 --- a/drivers/mtd/spi-nor/atmel.c +++ b/drivers/mtd/spi-nor/atmel.c @@ -163,7 +163,6 @@ static const struct spi_nor_fixups atmel_nor_global_pro= tection_fixups =3D { }; =20 static const struct flash_info atmel_nor_parts[] =3D { - /* Atmel -- some are (confusingly) marketed as "DataFlash" */ { "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4) FLAGS(SPI_NOR_HAS_LOCK) NO_SFDP_FLAGS(SECT_4K) diff --git a/drivers/mtd/spi-nor/eon.c b/drivers/mtd/spi-nor/eon.c index 434aaf155856..4848ffe8b38f 100644 --- a/drivers/mtd/spi-nor/eon.c +++ b/drivers/mtd/spi-nor/eon.c @@ -9,7 +9,6 @@ #include "core.h" =20 static const struct flash_info eon_nor_parts[] =3D { - /* EON -- en25xxx */ { "en25f32", INFO(0x1c3116, 0, 64 * 1024, 64) NO_SFDP_FLAGS(SECT_4K) }, { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64) }, diff --git a/drivers/mtd/spi-nor/esmt.c b/drivers/mtd/spi-nor/esmt.c index fcc3b0e7cda9..12779bec5f99 100644 --- a/drivers/mtd/spi-nor/esmt.c +++ b/drivers/mtd/spi-nor/esmt.c @@ -9,7 +9,6 @@ #include "core.h" =20 static const struct flash_info esmt_nor_parts[] =3D { - /* ESMT */ { "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) }, diff --git a/drivers/mtd/spi-nor/everspin.c b/drivers/mtd/spi-nor/everspin.c index 84a07c2e0536..d02c32f2f7ad 100644 --- a/drivers/mtd/spi-nor/everspin.c +++ b/drivers/mtd/spi-nor/everspin.c @@ -9,7 +9,6 @@ #include "core.h" =20 static const struct flash_info everspin_nor_parts[] =3D { - /* Everspin */ { "mr25h128", CAT25_INFO(16 * 1024, 1, 256, 2) }, { "mr25h256", CAT25_INFO(32 * 1024, 1, 256, 2) }, { "mr25h10", CAT25_INFO(128 * 1024, 1, 256, 3) }, diff --git a/drivers/mtd/spi-nor/intel.c b/drivers/mtd/spi-nor/intel.c index 9179f2d09cba..aba62759a02e 100644 --- a/drivers/mtd/spi-nor/intel.c +++ b/drivers/mtd/spi-nor/intel.c @@ -9,7 +9,6 @@ #include "core.h" =20 static const struct flash_info intel_nor_parts[] =3D { - /* Intel/Numonyx -- xxxs33b */ { "160s33b", INFO(0x898911, 0, 64 * 1024, 32) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, { "320s33b", INFO(0x898912, 0, 64 * 1024, 64) diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index b936a28a85df..d31401bcab64 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -47,7 +47,6 @@ static const struct spi_nor_fixups pm25lv_nor_fixups =3D { }; =20 static const struct flash_info issi_nor_parts[] =3D { - /* ISSI */ { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2) NO_SFDP_FLAGS(SECT_4K) }, { "is25lq040b", INFO(0x9d4013, 0, 64 * 1024, 8) @@ -76,7 +75,6 @@ static const struct flash_info issi_nor_parts[] =3D { FLAGS(SPI_NOR_QUAD_PP) .fixups =3D &is25lp256_fixups }, =20 - /* PMC */ { "pm25lv512", INFO0(32 * 1024, 2) NO_SFDP_FLAGS(SECT_4K) .fixups =3D &pm25lv_nor_fixups diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index 0f3bd3ed8eff..b21e688fe056 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -33,7 +33,6 @@ static const struct spi_nor_fixups mx25l25635_fixups =3D { }; =20 static const struct flash_info macronix_nor_parts[] =3D { - /* Macronix */ { "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1) NO_SFDP_FLAGS(SECT_4K) }, { "mx25l2005a", INFO(0xc22012, 0, 64 * 1024, 4) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index d7012ab3de2c..1a1d2368c462 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -756,9 +756,6 @@ static const struct spi_nor_fixups s25fs_s_nor_fixups = =3D { }; =20 static const struct flash_info spansion_nor_parts[] =3D { - /* Spansion/Cypress -- single (large) sector size only, at least - * for the chips listed here (without boot sectors). - */ { "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64) NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128) diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index 09fdc7023e09..42e29441a7f7 100644 --- a/drivers/mtd/spi-nor/sst.c +++ b/drivers/mtd/spi-nor/sst.c @@ -61,7 +61,6 @@ static const struct spi_nor_fixups sst26vf_nor_fixups =3D= { }; =20 static const struct flash_info sst_nor_parts[] =3D { - /* SST -- large erase sizes are "overlays", "sectors" are 4K */ { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8) FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) NO_SFDP_FLAGS(SECT_4K) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 7873cc394f07..2d3ae972b419 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -42,7 +42,6 @@ static const struct spi_nor_fixups w25q256_fixups =3D { }; =20 static const struct flash_info winbond_nor_parts[] =3D { - /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ { "w25x05", INFO(0xef3010, 0, 64 * 1024, 1) NO_SFDP_FLAGS(SECT_4K) }, { "w25x10", INFO(0xef3011, 0, 64 * 1024, 2) diff --git a/drivers/mtd/spi-nor/xmc.c b/drivers/mtd/spi-nor/xmc.c index 051411e86339..48062ccb22fa 100644 --- a/drivers/mtd/spi-nor/xmc.c +++ b/drivers/mtd/spi-nor/xmc.c @@ -9,7 +9,6 @@ #include "core.h" =20 static const struct flash_info xmc_nor_parts[] =3D { - /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ { "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128) NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, @@ -18,6 +17,7 @@ static const struct flash_info xmc_nor_parts[] =3D { SPI_NOR_QUAD_READ) }, }; =20 +/* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ const struct spi_nor_manufacturer spi_nor_xmc =3D { .name =3D "xmc", .parts =3D xmc_nor_parts, --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11A58C41513 for ; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414548; bh=yRymFxs0ZgCRKKfeCO93P0NNgII3piuTmdoZV/3f5XU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=olllZq88iDLzskVOUa+X7jTz7y9olhhD4f5hPoUo024ZPQ+f8ncO0seR8aPleWC0K yir906/w5x0AMMX5Bgx6W556jMfHr3bfzwqZPEOM1aFjA9l0ipmr+/hYtbUj0/5TL5 0NS4UmYPv2qO11z5gWwNDDDg2PTe5OaxakeRB0V3jO5jqKz6OCwlQFezcs7tlf8+EB nMeR3u6zp64BZHXHwIfG4KB9s4nXOFPCQ5e8vtMfmXk+kR16l/TvbrJ8SxM4maQAp5 Qi29sox6N/lew8UrQI2+NqsSKgtXCwqytyOkIzITGIGwVJ34OMdkYZ7ubqSm9z/z5R yTFYSDd2uUJWg== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:11 +0200 Subject: [PATCH 17/41] mtd: spi-nor: atmel: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-17-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/atmel.c | 122 +++++++++++++++++++++++++++++-----------= ---- 1 file changed, 80 insertions(+), 42 deletions(-) diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c index d2de2cb0c066..ccc985c48ae3 100644 --- a/drivers/mtd/spi-nor/atmel.c +++ b/drivers/mtd/spi-nor/atmel.c @@ -163,48 +163,86 @@ static const struct spi_nor_fixups atmel_nor_global_p= rotection_fixups =3D { }; =20 static const struct flash_info atmel_nor_parts[] =3D { - { "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4) - FLAGS(SPI_NOR_HAS_LOCK) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &at25fs_nor_fixups }, - { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8) - FLAGS(SPI_NOR_HAS_LOCK) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &at25fs_nor_fixups }, - { "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_nor_global_protection_fixups }, - { "at25df321", INFO(0x1f4700, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_nor_global_protection_fixups }, - { "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_nor_global_protection_fixups }, - { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_nor_global_protection_fixups }, - { "at25sl321", INFO(0x1f4216, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8) - NO_SFDP_FLAGS(SECT_4K) }, - { "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_nor_global_protection_fixups }, - { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_nor_global_protection_fixups }, - { "at26df321", INFO(0x1f4700, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - .fixups =3D &atmel_nor_global_protection_fixups }, - { "at45db081d", INFO(0x1f2500, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K) }, + { + .id =3D SNOR_ID(0x1f, 0x66, 0x01), + .name =3D "at25fs010", + .sector_size =3D SZ_32K, + .size =3D SZ_128K, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &at25fs_nor_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x66, 0x04), + .name =3D "at25fs040", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &at25fs_nor_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x44, 0x01), + .name =3D "at25df041a", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &atmel_nor_global_protection_fixups, + }, { + .id =3D SNOR_ID(0x1f, 0x47, 0x00), + .name =3D "at25df321", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &atmel_nor_global_protection_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x47, 0x01), + .name =3D "at25df321a", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &atmel_nor_global_protection_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x48, 0x00), + .name =3D "at25df641", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &atmel_nor_global_protection_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x42, 0x16), + .name =3D "at25sl321", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x1f, 0x04, 0x00), + .name =3D "at26f004", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x1f, 0x45, 0x01), + .name =3D "at26df081a", + .size =3D SZ_1M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &atmel_nor_global_protection_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x46, 0x01), + .name =3D "at26df161a", + .size =3D SZ_2M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &atmel_nor_global_protection_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x47, 0x00), + .name =3D "at26df321", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &atmel_nor_global_protection_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x25, 0x00), + .name =3D "at45db081d", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K, + }, }; =20 const struct spi_nor_manufacturer spi_nor_atmel =3D { --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B61E4C001B0 for ; Mon, 7 Aug 2023 13:23:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234064AbjHGNXh (ORCPT ); Mon, 7 Aug 2023 09:23:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35410 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234107AbjHGNXA (ORCPT ); Mon, 7 Aug 2023 09:23:00 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8186719BD for ; Mon, 7 Aug 2023 06:22:35 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 56BD861ADA for ; Mon, 7 Aug 2023 13:22:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 18225C433CB; Mon, 7 Aug 2023 13:22:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414550; bh=FMrL+V9+pSz441pre2fqIuiBhaXySkpsxmO1V8C9qk8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=R+WwD1y2lEmfVbe0XZBGXdq72nqTe5wIV4LYk5gXBqXzPWTxzngn+XVYlKQEXvpzL vjcST3zvz6CHnnzU8mPB3/fPxPVGx3SJrrIHhOd8/uPk/y9bn/+pESxlbeW+5k02K7 1LVqHnScimFI2WOMI/VgsDDjg0srPx5/LhAHVMSsAeKFXVIV1DYfKshaXJJqEuy/XF c0mZZk78NqreNIdMTl08Sjey3dOMRvMtBvgIQChP45hFcwZkjRJNPaWUbveTA4MeKv 4XEuybJ8r6YdVkwF4hBo4LaHVq1Fv9aaIuEAcMBV9AiCxbsiNpW3pwuQR2t6u+H924 SvTg4Y60LQYww== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:12 +0200 Subject: [PATCH 18/41] mtd: spi-nor: eon: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-18-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/eon.c | 72 +++++++++++++++++++++++++++++++++++--------= ---- 1 file changed, 54 insertions(+), 18 deletions(-) diff --git a/drivers/mtd/spi-nor/eon.c b/drivers/mtd/spi-nor/eon.c index 4848ffe8b38f..ba09cb6c2abd 100644 --- a/drivers/mtd/spi-nor/eon.c +++ b/drivers/mtd/spi-nor/eon.c @@ -9,24 +9,60 @@ #include "core.h" =20 static const struct flash_info eon_nor_parts[] =3D { - { "en25f32", INFO(0x1c3116, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64) }, - { "en25q32b", INFO(0x1c3016, 0, 64 * 1024, 64) }, - { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128) }, - { "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K) }, - { "en25q80a", INFO(0x1c3014, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "en25qh16", INFO(0x1c7015, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "en25qh32", INFO(0x1c7016, 0, 64 * 1024, 64) }, - { "en25qh64", INFO(0x1c7017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "en25qh128", INFO(0x1c7018, 0, 64 * 1024, 256) }, - { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 0) }, - { "en25s64", INFO(0x1c3817, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K) }, + { + .id =3D SNOR_ID(0x1c, 0x31, 0x16), + .name =3D "en25f32", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x1c, 0x20, 0x16), + .name =3D "en25p32", + .size =3D SZ_4M, + }, { + .id =3D SNOR_ID(0x1c, 0x30, 0x16), + .name =3D "en25q32b", + .size =3D SZ_4M, + }, { + .id =3D SNOR_ID(0x1c, 0x20, 0x17), + .name =3D "en25p64", + .size =3D SZ_8M, + }, { + .id =3D SNOR_ID(0x1c, 0x30, 0x17), + .name =3D "en25q64", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x1c, 0x30, 0x14), + .name =3D "en25q80a", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x1c, 0x70, 0x15), + .name =3D "en25qh16", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x1c, 0x70, 0x16), + .name =3D "en25qh32", + .size =3D SZ_4M, + }, { + .id =3D SNOR_ID(0x1c, 0x70, 0x17), + .name =3D "en25qh64", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x1c, 0x70, 0x18), + .name =3D "en25qh128", + .size =3D SZ_16M, + }, { + .id =3D SNOR_ID(0x1c, 0x70, 0x19), + .name =3D "en25qh256", + }, { + .name =3D "en25s64", + .id =3D SNOR_ID(0x1c, 0x38, 0x17), + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, + }, }; =20 const struct spi_nor_manufacturer spi_nor_eon =3D { --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 00340C001B0 for ; Mon, 7 Aug 2023 13:23:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234076AbjHGNXk (ORCPT ); Mon, 7 Aug 2023 09:23:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36132 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234133AbjHGNXC (ORCPT ); Mon, 7 Aug 2023 09:23:02 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D138170B for ; Mon, 7 Aug 2023 06:22:39 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7604261ADE for ; Mon, 7 Aug 2023 13:22:33 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3417AC433C8; Mon, 7 Aug 2023 13:22:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414552; bh=Oyq3JU+jD6JnYKUuJ4JBwmfio4ODb3qr1zJ7EbxtHwc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=pyGC3wWwYpeTwX1wpG/fpIN6DMYOL6kpV3zHPUD+oOcs3G5vrT2f6nWcy94OghXLb a9fvVUgEniVCZZoOokoczqryBpzs04TQvEs/8cDbyVwvk9IigihigedwjjHCw8FLPd 8PkxljVEyEwFI6Ihcz4YmUVjFXSEZtlANPnZCSGQkzpU845LND6/k6Uucwn5hCxqdv OTHLvgzPli07wHWHHm3ZII1y/XYMXFg8Jq9NS3JDYGnm+GC0k9HciO9j7FFI+YOpJj Q2NFbCtHINEjEpEDxgG6F1+BJsGdhlTC2ACRv04x+LzyYNKA7gFnrlvxjVgaYAZWVK WemcKX7BcF6dQ== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:13 +0200 Subject: [PATCH 19/41] mtd: spi-nor: esmt: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-19-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/esmt.c | 28 +++++++++++++++++++--------- 1 file changed, 19 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/spi-nor/esmt.c b/drivers/mtd/spi-nor/esmt.c index 12779bec5f99..089fcd1aa794 100644 --- a/drivers/mtd/spi-nor/esmt.c +++ b/drivers/mtd/spi-nor/esmt.c @@ -9,15 +9,25 @@ #include "core.h" =20 static const struct flash_info esmt_nor_parts[] =3D { - { "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) }, - { "f25l32qa-2s", INFO(0x8c4116, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK) - NO_SFDP_FLAGS(SECT_4K) }, - { "f25l64qa", INFO(0x8c4117, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK) - NO_SFDP_FLAGS(SECT_4K) }, + { + .id =3D SNOR_ID(0x8c, 0x20, 0x16), + .name =3D "f25l32pa", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x8c, 0x41, 0x16), + .name =3D "f25l32qa-2s", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x8c, 0x41, 0x17), + .name =3D "f25l64qa", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SECT_4K, + } }; =20 const struct spi_nor_manufacturer spi_nor_esmt =3D { --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15ABFC001B0 for ; Mon, 7 Aug 2023 13:24:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233688AbjHGNYG (ORCPT ); Mon, 7 Aug 2023 09:24:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35428 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234032AbjHGNXe (ORCPT ); Mon, 7 Aug 2023 09:23:34 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2CBD31BF5 for ; Mon, 7 Aug 2023 06:22:52 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 9539D61B0E for ; Mon, 7 Aug 2023 13:22:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4F4CDC433C7; Mon, 7 Aug 2023 13:22:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414555; bh=1nkVQlo/pntUPcuI8tZ3St9xyXgZLdanptrUEPEewkQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=BG1TQ70GI+gpRihh8XnlP2KHjfXnD/irqFQ0ogYgWsqvSdITnF0fIGh528xRQ2st0 a5NQVNb4OYQszDBl8LGsKzm+HSNSx1Y49AXX2ngIpURrFoOldb2OBanv2lcI5s3E12 O5YNfx+Cs1KJd7+4eygBzXN0/eROY3q2occ13ad6xPPw12tU3iN1Ugx7NGZWQdNt8y uwT78lLQ/JaIFGDz3avZjJ5E0kxDBsdEhhRWHNldrTmkZ5n/pzuPtv+5ZTiMm5XCPl 28ijbKIEj6tZNAtFHHpQgGa0rlrMzygtxkVO2NgvOSyt4FYhnSETbNCigdmILAlk0E 4HtCig4nXM1Zg== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:14 +0200 Subject: [PATCH 20/41] mtd: spi-nor: everspin: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-20-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/everspin.c | 33 +++++++++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi-nor/everspin.c b/drivers/mtd/spi-nor/everspin.c index d02c32f2f7ad..46776bc10b27 100644 --- a/drivers/mtd/spi-nor/everspin.c +++ b/drivers/mtd/spi-nor/everspin.c @@ -9,10 +9,35 @@ #include "core.h" =20 static const struct flash_info everspin_nor_parts[] =3D { - { "mr25h128", CAT25_INFO(16 * 1024, 1, 256, 2) }, - { "mr25h256", CAT25_INFO(32 * 1024, 1, 256, 2) }, - { "mr25h10", CAT25_INFO(128 * 1024, 1, 256, 3) }, - { "mr25h40", CAT25_INFO(512 * 1024, 1, 256, 3) }, + { + .name =3D "mr25h128", + .size =3D SZ_16K, + .sector_size =3D SZ_16K, + .page_size =3D 256, + .addr_nbytes =3D 2, + .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, + }, { + .name =3D "mr25h256", + .size =3D SZ_32K, + .sector_size =3D SZ_32K, + .page_size =3D 256, + .addr_nbytes =3D 2, + .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, + }, { + .name =3D "mr25h10", + .size =3D SZ_128K, + .sector_size =3D SZ_128K, + .page_size =3D 256, + .addr_nbytes =3D 3, + .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, + }, { + .name =3D "mr25h40", + .size =3D SZ_512K, + .sector_size =3D SZ_512K, + .page_size =3D 256, + .addr_nbytes =3D 3, + .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, + } }; =20 const struct spi_nor_manufacturer spi_nor_everspin =3D { --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20A67C001B0 for ; Mon, 7 Aug 2023 13:24:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232731AbjHGNYP (ORCPT ); Mon, 7 Aug 2023 09:24:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234063AbjHGNXg (ORCPT ); Mon, 7 Aug 2023 09:23:36 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1C741FFB for ; Mon, 7 Aug 2023 06:22:57 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AED3061B07 for ; Mon, 7 Aug 2023 13:22:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6A575C433CA; Mon, 7 Aug 2023 13:22:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414557; bh=Wbw26ozDm2yZuCOCpEEf+tY0cT7CvfziJiMaObcpSys=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Uxt7i/1b2MRPDpAzZVAbWPJtkHxShma6vIczBTkDyNaey89RYzqWvONkTOwOzkay5 ZNCa5Fl7pU8gKYN+GWXY5BgLe1Fl8yb6LWLJiRrp6f7tY6qlVQBTJUXzSg0QowNf0C AC+eS+Uk7RiDBu1wth8VD8iesliZPyhL0TmXFzYhEXFZ/lCcK8CN3K2zJCGPFuCXqG PWYJs4nT4RthbGHBMrsNXJ5nsaJN/nBYVhlyoUwYbWr7s+qmXIE+HXQ/JcwEhnHn1G O302Jeo8Km3ZgQTTb/zwjIWrd3GTj+uDfkH/rB/vEuUC+FLikCLVuakwvBemAZ8MYb fcvxJdmiCleQw== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:15 +0200 Subject: [PATCH 21/41] mtd: spi-nor: gigadevice: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-21-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/gigadevice.c | 81 ++++++++++++++++++++++++------------= ---- 1 file changed, 49 insertions(+), 32 deletions(-) diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadev= ice.c index 7cf142c75529..0d22cd99715b 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -34,38 +34,55 @@ static const struct spi_nor_fixups gd25q256_fixups =3D { }; =20 static const struct flash_info gigadevice_nor_parts[] =3D { - { "gd25q16", INFO(0xc84015, 0, 64 * 1024, 32) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "gd25q32", INFO(0xc84016, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "gd25lq32", INFO(0xc86016, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "gd25lq64c", INFO(0xc86017, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "gd25lq128d", INFO(0xc86018, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "gd25q256", INFO(0xc84019, 0, 64 * 1024, 0) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - .fixups =3D &gd25q256_fixups }, + { + .id =3D SNOR_ID(0xc8, 0x40, 0x15), + .name =3D "gd25q16", + .size =3D SZ_2M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x40, 0x16), + .name =3D "gd25q32", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x60, 0x16), + .name =3D "gd25lq32", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x40, 0x17), + .name =3D "gd25q64", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x60, 0x17), + .name =3D "gd25lq64c", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x60, 0x18), + .name =3D "gd25lq128d", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x40, 0x18), + .name =3D "gd25q128", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x40, 0x19), + .name =3D "gd25q256", + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6, + .fixups =3D &gd25q256_fixups, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, }; =20 const struct spi_nor_manufacturer spi_nor_gigadevice =3D { --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71326C001B0 for ; Mon, 7 Aug 2023 13:24:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233723AbjHGNYZ (ORCPT ); Mon, 7 Aug 2023 09:24:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231815AbjHGNXw (ORCPT ); Mon, 7 Aug 2023 09:23:52 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3DE782109 for ; Mon, 7 Aug 2023 06:23:04 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C254861B14 for ; Mon, 7 Aug 2023 13:22:39 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 854F2C433CB; Mon, 7 Aug 2023 13:22:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414559; bh=pG2FdGd2bZ50xpBr1ZIaO+fF4bmW9tYC4LsRjQC4xQA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=oU+DQXxD2tL6/hASsZsagEicjZ1QH7W4ZB4wwT6CfjqRpOixKepcpv3d/lB2A3RcJ gTEeIqfd9IZqK1y1v2EgvQ1/qNY6ZBKZlGXsX5+bpNvvhzgR+p9Uc2El/lYApVrBbX 5yQ2bTvbvfK4Q4M24WDIuQ3a3VSpchsNvctQGaKlYDjZleYllxbO0a3mY98QlPz54y LbcbKZstMh9wHaPDcjRbEyFBLf8krEvdPVnDmH+E82OV/inrtHMXQ6T+zeExMZdhAa hxHFlVGez5BQfE88dIFquSGFjmSi/IXs9aVji76gO9JkNmQyG3ITNkdTUB2a6Nmmzz DmuhBbN6ZArfw== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:16 +0200 Subject: [PATCH 22/41] mtd: spi-nor: intel: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-22-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/intel.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/spi-nor/intel.c b/drivers/mtd/spi-nor/intel.c index aba62759a02e..f647359fee7a 100644 --- a/drivers/mtd/spi-nor/intel.c +++ b/drivers/mtd/spi-nor/intel.c @@ -9,12 +9,22 @@ #include "core.h" =20 static const struct flash_info intel_nor_parts[] =3D { - { "160s33b", INFO(0x898911, 0, 64 * 1024, 32) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, - { "320s33b", INFO(0x898912, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, - { "640s33b", INFO(0x898913, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, + { + .id =3D SNOR_ID(0x89, 0x89, 0x11), + .name =3D "160s33b", + .size =3D SZ_2M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + }, { + .id =3D SNOR_ID(0x89, 0x89, 0x12), + .name =3D "320s33b", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + }, { + .id =3D SNOR_ID(0x89, 0x89, 0x13), + .name =3D "640s33b", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + } }; =20 const struct spi_nor_manufacturer spi_nor_intel =3D { --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC7C4C04A6A for ; Mon, 7 Aug 2023 13:23:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234081AbjHGNXp (ORCPT ); Mon, 7 Aug 2023 09:23:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36168 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234152AbjHGNXH (ORCPT ); Mon, 7 Aug 2023 09:23:07 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D97A2702 for ; Mon, 7 Aug 2023 06:22:42 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id E40B361ACC for ; Mon, 7 Aug 2023 13:22:41 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A015BC433C8; Mon, 7 Aug 2023 13:22:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414561; bh=u3h1HEnFV5TaycBrs44qWUZVzeJsRZVGR9YPZRIQPdw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=JWojkmy7iPB7nkJT6BfUN1QiFICIUIq1Ze2n6hFI8yWiXENND4ujjXiGyZiaEuT/h yrYukSoIjJ/mjLdbUvxhweIHWnHgwjJW/TX+79Fz1/5ylWGDMd77VGvkdWbtcUbrf+ VE1sr5SuEsHQGzGrhinjkOoyL6lxVLYfai+M8EtOfYwd7I6y6fDm/lXJcLbAj2+ogh Ukd8Gg4hRpRROEOL2SkGaqUmwXeZDseEV1mvhhGFcyu8I4DJ7ZxdG3NSuqiZkr8czg LGHVq0Wzab2QAU/6coKKFDEGuVE5qxFb0PGorVYu116azgQoPmCLWGYK/Z+f9nbRhu f6STgbLWTh25g== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:17 +0200 Subject: [PATCH 23/41] mtd: spi-nor: issi: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-23-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/issi.c | 114 +++++++++++++++++++++++++++++++----------= ---- 1 file changed, 78 insertions(+), 36 deletions(-) diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index d31401bcab64..9478f1e61626 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -47,44 +47,86 @@ static const struct spi_nor_fixups pm25lv_nor_fixups = =3D { }; =20 static const struct flash_info issi_nor_parts[] =3D { - { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2) - NO_SFDP_FLAGS(SECT_4K) }, - { "is25lq040b", INFO(0x9d4013, 0, 64 * 1024, 8) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "is25lp016d", INFO(0x9d6015, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "is25lp080d", INFO(0x9d6014, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "is25lp032", INFO(0x9d6016, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "is25lp064", INFO(0x9d6017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "is25lp128", INFO(0x9d6018, 0, 64 * 1024, 256) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "is25lp256", INFO(0x9d6019, 0, 64 * 1024, 0) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - .fixups =3D &is25lp256_fixups }, - { "is25wp032", INFO(0x9d7016, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "is25wp064", INFO(0x9d7017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "is25wp128", INFO(0x9d7018, 0, 64 * 1024, 256) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "is25wp256", INFO(0x9d7019, 0, 0, 0) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - FLAGS(SPI_NOR_QUAD_PP) - .fixups =3D &is25lp256_fixups }, - - { "pm25lv512", INFO0(32 * 1024, 2) - NO_SFDP_FLAGS(SECT_4K) + { + .id =3D SNOR_ID(0x7f, 0x9d, 0x20), + .name =3D "is25cd512", + .sector_size =3D SZ_32K, + .size =3D SZ_64K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x9d, 0x40, 0x13), + .name =3D "is25lq040b", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x60, 0x15), + .name =3D "is25lp016d", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x60, 0x14), + .name =3D "is25lp080d", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x60, 0x16), + .name =3D "is25lp032", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x60, 0x17), + .name =3D "is25lp064", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x60, 0x18), + .name =3D "is25lp128", + .size =3D SZ_16M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x60, 0x19), + .name =3D "is25lp256", + .fixups =3D &is25lp256_fixups, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0x9d, 0x70, 0x16), + .name =3D "is25wp032", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x70, 0x17), + .size =3D SZ_8M, + .name =3D "is25wp064", + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x70, 0x18), + .name =3D "is25wp128", + .size =3D SZ_16M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x70, 0x19), + .name =3D "is25wp256", + .flags =3D SPI_NOR_QUAD_PP, + .fixups =3D &is25lp256_fixups, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .name =3D "pm25lv512", + .sector_size =3D SZ_32K, + .size =3D SZ_64K, + .no_sfdp_flags =3D SECT_4K, .fixups =3D &pm25lv_nor_fixups - }, - { "pm25lv010", INFO0(32 * 1024, 4) - NO_SFDP_FLAGS(SECT_4K) + }, { + .name =3D "pm25lv010", + .sector_size =3D SZ_32K, + .size =3D SZ_128K, + .no_sfdp_flags =3D SECT_4K, .fixups =3D &pm25lv_nor_fixups - }, - { "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, + }, { + .id =3D SNOR_ID(0x7f, 0x9d, 0x46), + .name =3D "pm25lq032", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + } }; =20 static void issi_nor_default_init(struct spi_nor *nor) --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7632C04A94 for ; Mon, 7 Aug 2023 13:24:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234027AbjHGNX6 (ORCPT ); Mon, 7 Aug 2023 09:23:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36378 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234010AbjHGNXc (ORCPT ); Mon, 7 Aug 2023 09:23:32 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A5641BC3 for ; Mon, 7 Aug 2023 06:22:49 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0693761AE3 for ; Mon, 7 Aug 2023 13:22:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BAF1CC433C9; Mon, 7 Aug 2023 13:22:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414563; bh=oMgc1/5JxnhtyDALEk/TOuQOpIC5QJP7tEpRGwFyIfU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=YN26U12FUtoacJoAz5S0XgPU8FCpDFvKgiV81SUbMxTEIPMyvRrf+7X7nzwtKpUGf c6wnwPyPi+zY3wrbK+xq6qqRl0qUW3aEBHlkUXixIzKecor8TSlYrVi/Tl/DGmQNC4 PrIGG9937j3b+xi1d73l4PG3TCGBfXArttsQ+F3CBJZmAZnSjKv1z0ix682dknrUPC sTlJV3ukSucaJMH2QI7qfpH6JusqRC2hlQsCQEYGzyZ3iDokbnSzvEv0LVzz38aEco +69MRGhfWu1PFYSCnYVf9pwVHFegw018BLjPHg1v1ZojeJ3pRF5tI67pzoXsSIh25e fvRtVdTgvBATQ== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:18 +0200 Subject: [PATCH 24/41] mtd: spi-nor: macronix: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-24-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/macronix.c | 218 ++++++++++++++++++++++++++++---------= ---- 1 file changed, 150 insertions(+), 68 deletions(-) diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index b21e688fe056..0508a207e9df 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -33,74 +33,156 @@ static const struct spi_nor_fixups mx25l25635_fixups = =3D { }; =20 static const struct flash_info macronix_nor_parts[] =3D { - { "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l2005a", INFO(0xc22012, 0, 64 * 1024, 4) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l4005a", INFO(0xc22013, 0, 64 * 1024, 8) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l8005", INFO(0xc22014, 0, 64 * 1024, 16) }, - { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "mx25u4035", INFO(0xc22533, 0, 64 * 1024, 8) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25u8035", INFO(0xc22534, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP) - NO_SFDP_FLAGS(SECT_4K) }, - { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256) }, - { "mx25r1635f", INFO(0xc22815, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "mx25r3235f", INFO(0xc22816, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "mx25u12835f", INFO(0xc22538, 0, 64 * 1024, 256) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - .fixups =3D &mx25l25635_fixups }, - { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, - { "mx25u51245g", INFO(0xc2253a, 0, 64 * 1024, 1024) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, - { "mx25uw51245g", INFOB(0xc2813a, 0, 0, 0, 4) - FLAGS(SPI_NOR_RWW) }, - { "mx25v8035f", INFO(0xc22314, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512) }, - { "mx66l51235f", INFO(0xc2201a, 0, 64 * 1024, 1024) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, - { "mx66u51235f", INFO(0xc2253a, 0, 64 * 1024, 1024) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, - { "mx66l1g45g", INFO(0xc2201b, 0, 64 * 1024, 2048) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048) - NO_SFDP_FLAGS(SPI_NOR_QUAD_READ) }, - { "mx66u2g45g", INFO(0xc2253c, 0, 64 * 1024, 4096) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, + { + .id =3D SNOR_ID(0xc2, 0x20, 0x10), + .name =3D "mx25l512e", + .size =3D SZ_64K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x12), + .name =3D "mx25l2005a", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x13), + .name =3D "mx25l4005a", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x14), + .name =3D "mx25l8005", + .size =3D SZ_1M, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x15), + .name =3D "mx25l1606e", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x16), + .name =3D "mx25l3205d", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x9e, 0x16), + .name =3D "mx25l3255e", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x17), + .name =3D "mx25l6405d", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x32), + .name =3D "mx25u2033e", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x36), + .name =3D "mx25u3235f", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x33), + .name =3D "mx25u4035", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x34), + .name =3D "mx25u8035", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x37), + .name =3D "mx25u6435f", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x18), + .name =3D "mx25l12805d", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x26, 0x18), + .name =3D "mx25l12855e", + .size =3D SZ_16M, + }, { + .id =3D SNOR_ID(0xc2, 0x28, 0x15), + .name =3D "mx25r1635f", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x28, 0x16), + .name =3D "mx25r3235f", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x38), + .name =3D "mx25u12835f", + .size =3D SZ_16M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x19), + .name =3D "mx25l25635e", + .size =3D SZ_32M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixups =3D &mx25l25635_fixups + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x39), + .name =3D "mx25u25635f", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K, + FIXUP_FLAGS(SPI_NOR_4B_OPCODES) + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x3a), + .name =3D "mx25u51245g", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0xc2, 0x81, 0x3a), + .name =3D "mx25uw51245g", + .n_banks =3D 4, + .flags =3D SPI_NOR_RWW, + }, { + .id =3D SNOR_ID(0xc2, 0x23, 0x14), + .name =3D "mx25v8035f", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x26, 0x19), + .name =3D "mx25l25655e", + .size =3D SZ_32M, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x1a), + .name =3D "mx66l51235f", + .size =3D SZ_64M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x3a), + .name =3D "mx66u51235f", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x1b), + .name =3D "mx66l1g45g", + .size =3D SZ_128M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x26, 0x1b), + .name =3D "mx66l1g55g", + .size =3D SZ_128M, + .no_sfdp_flags =3D SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x3c), + .name =3D "mx66u2g45g", + .size =3D SZ_256M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, }; =20 static void macronix_nor_default_init(struct spi_nor *nor) --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D4C5C04A6A for ; Mon, 7 Aug 2023 13:24:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via 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bh=jKxDZT+qryyIWW++zQGnQdmrNqAzQRffxtMJjsy7a/M=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=QFh+Ql016qz9TwuDvDry0MMiDxx2Ih/sIl4sKcDeqqZXGKLLTh5+shX+rEwao3TRW AkcKno/AXD3dPHMAkmkz9di9vHoq27ZfxJH4rKtuGRYeaI1lJSJQmgw20I/fk+BUPs ivzvHUsCE2ECTT9GoQn62VvHhoW8Q8YVwkMOlg8t00Y8YxLkHcIOn6EwC20zD/9d87 YJ9IKnjau7wsliL0f3qCaceW8DMZMewqWASIQq9Kvd3BKlYjOV9Gy0oZD034m1Tbju XVVzP5mN7/MEmukVGgEmyM2U0s17jq0Yb4pLq5UiZKLyyFalAEfuP9pnPoDkz0jUZU fHFJJ3FGwLPzQ== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:19 +0200 Subject: [PATCH 25/41] mtd: spi-nor: micron-st: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-25-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/micron-st.c | 405 ++++++++++++++++++++++++++----------= ---- 1 file changed, 268 insertions(+), 137 deletions(-) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 229c951efcce..720fd2fbd0ad 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -159,148 +159,279 @@ static const struct spi_nor_fixups mt35xu512aba_fix= ups =3D { }; =20 static const struct flash_info micron_nor_parts[] =3D { - { "mt35xu512aba", INFO(0x2c5b1a, 0, 128 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_OCTAL_READ | - SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE) - MFR_FLAGS(USE_FSR) - .fixups =3D &mt35xu512aba_fixups - }, - { "mt35xu02g", INFO(0x2c5b1c, 0, 128 * 1024, 2048) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_OCTAL_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - MFR_FLAGS(USE_FSR) + { + .id =3D SNOR_ID(0x2c, 0x5b, 0x1a), + .name =3D "mt35xu512aba", + .sector_size =3D SZ_128K, + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_OCTAL_READ | + SPI_NOR_OCTAL_DTR_READ | SPI_NOR_OCTAL_DTR_PP, + .mfr_flags =3D USE_FSR, + .fixup_flags =3D SPI_NOR_4B_OPCODES | SPI_NOR_IO_MODE_EN_VOLATILE, + .fixups =3D &mt35xu512aba_fixups, + }, { + .id =3D SNOR_ID(0x2c, 0x5b, 0x1c), + .name =3D "mt35xu02g", + .sector_size =3D SZ_128K, + .size =3D SZ_256M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_OCTAL_READ, + .mfr_flags =3D USE_FSR, + .fixup_flags =3D SPI_NOR_4B_OPCODES, }, }; =20 static const struct flash_info st_nor_parts[] =3D { - { "n25q016a", INFO(0x20bb15, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, - { "n25q032", INFO(0x20ba16, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SPI_NOR_QUAD_READ) }, - { "n25q032a", INFO(0x20bb16, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SPI_NOR_QUAD_READ) }, - { "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, - { "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) }, - { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "mt25ql256a", INFO6(0x20ba19, 0x104400, 64 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - MFR_FLAGS(USE_FSR) - }, - { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "mt25qu256a", INFO6(0x20bb19, 0x104400, 64 * 1024, 512) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - MFR_FLAGS(USE_FSR) - }, - { "n25q256ax1", INFO(0x20bb19, 0, 64 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "mt25ql512a", INFO6(0x20ba20, 0x104400, 64 * 1024, 1024) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - MFR_FLAGS(USE_FSR) - }, - { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) + { + .id =3D SNOR_ID(0x20, 0xbb, 0x15), + .name =3D "n25q016a", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x16), + .name =3D "n25q032", + .size =3D SZ_4M, + .no_sfdp_flags =3D SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x16), + .name =3D "n25q032a", + .size =3D SZ_4M, + .no_sfdp_flags =3D SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x17), + .name =3D "n25q064", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x17), + .name =3D "n25q064a", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x18), + .name =3D "n25q128a11", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x18), + .name =3D "n25q128a13", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x19, 0x10, 0x44, 0x00), + .name =3D "mt25ql256a", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x19), + .name =3D "n25q256a", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x19, 0x10, 0x44, 0x00), + .name =3D "mt25qu256a", + .size =3D SZ_32M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x19), + .name =3D "n25q256ax1", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x20, 0x10, 0x44, 0x00), + .name =3D "mt25ql512a", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x20), + .name =3D "n25q512ax3", + .size =3D SZ_64M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x20, 0x10, 0x44, 0x00), + .name =3D "mt25qu512a", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x20), + .name =3D "n25q512a", + .size =3D SZ_64M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x21), + .name =3D "n25q00", + .size =3D SZ_128M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x21), + .name =3D "n25q00a", + .size =3D SZ_128M, + .flags =3D NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x22), + .name =3D "mt25ql02g", + .size =3D SZ_256M, + .flags =3D NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x22), + .name =3D "mt25qu02g", + .size =3D SZ_256M, + .flags =3D NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x10), + .name =3D "m25p05", + .sector_size =3D SZ_32K, + .size =3D SZ_64K, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x11), + .name =3D "m25p10", + .sector_size =3D SZ_32K, + .size =3D SZ_128K, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x12), + .name =3D "m25p20", + .size =3D SZ_256K, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x13), + .name =3D "m25p40", + .size =3D SZ_512K, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x14), + .name =3D "m25p80", + .size =3D SZ_1M, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x15), + .name =3D "m25p16", + .size =3D SZ_2M, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x16), + .name =3D "m25p32", + .size =3D SZ_4M, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x17), + .name =3D "m25p64", + .size =3D SZ_8M, + }, { + .id =3D SNOR_ID(0x20, 0x20, 0x18), + .name =3D "m25p128", + .sector_size =3D SZ_256K, + .size =3D SZ_16M, + }, { + .name =3D "m25p05-nonjedec", + .sector_size =3D SZ_32K, + .size =3D SZ_64K, + }, { + .name =3D "m25p10-nonjedec", + .sector_size =3D SZ_32K, + .size =3D SZ_128K, + }, { + .name =3D "m25p20-nonjedec", + .size =3D SZ_256K, + }, { + .name =3D "m25p40-nonjedec", + .size =3D SZ_512K, + }, { + .name =3D "m25p80-nonjedec", + .size =3D SZ_1M, + }, { + .name =3D "m25p16-nonjedec", + .size =3D SZ_2M, + }, { + .name =3D "m25p32-nonjedec", + .size =3D SZ_4M, + }, { + .name =3D "m25p64-nonjedec", + .size =3D SZ_8M, + }, { + .name =3D "m25p128-nonjedec", + .sector_size =3D SZ_256K, + .size =3D SZ_16M, + }, { + .id =3D SNOR_ID(0x20, 0x40, 0x11), + .name =3D "m45pe10", + .size =3D SZ_128K, + }, { + .id =3D SNOR_ID(0x20, 0x40, 0x14), + .name =3D "m45pe80", + .size =3D SZ_1M, + }, { + .id =3D SNOR_ID(0x20, 0x40, 0x15), + .name =3D "m45pe16", + .size =3D SZ_2M, + }, { + .id =3D SNOR_ID(0x20, 0x80, 0x12), + .name =3D "m25pe20", + .size =3D SZ_256K, + }, { + .id =3D SNOR_ID(0x20, 0x80, 0x14), + .name =3D "m25pe80", + .size =3D SZ_1M, + }, { + .id =3D SNOR_ID(0x20, 0x80, 0x15), + .name =3D "m25pe16", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x20, 0x71, 0x15), + .name =3D "m25px16", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x20, 0x71, 0x16), + .name =3D "m25px32", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x20, 0x73, 0x16), + .name =3D "m25px32-s0", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x20, 0x63, 0x16), + .name =3D "m25px32-s1", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x20, 0x71, 0x17), + .name =3D "m25px64", + .size =3D SZ_8M, + }, { + .id =3D SNOR_ID(0x20, 0x71, 0x14), + .name =3D "m25px80", + .size =3D SZ_1M, }, - { "mt25qu512a", INFO6(0x20bb20, 0x104400, 64 * 1024, 1024) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) - MFR_FLAGS(USE_FSR) - }, - { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048) - FLAGS(NO_CHIP_ERASE) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "mt25ql02g", INFO(0x20ba22, 0, 64 * 1024, 4096) - FLAGS(NO_CHIP_ERASE) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - { "mt25qu02g", INFO(0x20bb22, 0, 64 * 1024, 4096) - FLAGS(NO_CHIP_ERASE) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_FSR) - }, - - { "m25p05", INFO(0x202010, 0, 32 * 1024, 2) }, - { "m25p10", INFO(0x202011, 0, 32 * 1024, 4) }, - { "m25p20", INFO(0x202012, 0, 64 * 1024, 4) }, - { "m25p40", INFO(0x202013, 0, 64 * 1024, 8) }, - { "m25p80", INFO(0x202014, 0, 64 * 1024, 16) }, - { "m25p16", INFO(0x202015, 0, 64 * 1024, 32) }, - { "m25p32", INFO(0x202016, 0, 64 * 1024, 64) }, - { "m25p64", INFO(0x202017, 0, 64 * 1024, 128) }, - { "m25p128", INFO(0x202018, 0, 256 * 1024, 64) }, - - { "m25p05-nonjedec", INFO0( 32 * 1024, 2) }, - { "m25p10-nonjedec", INFO0( 32 * 1024, 4) }, - { "m25p20-nonjedec", INFO0( 64 * 1024, 4) }, - { "m25p40-nonjedec", INFO0( 64 * 1024, 8) }, - { "m25p80-nonjedec", INFO0( 64 * 1024, 16) }, - { "m25p16-nonjedec", INFO0( 64 * 1024, 32) }, - { "m25p32-nonjedec", INFO0( 64 * 1024, 64) }, - { "m25p64-nonjedec", INFO0( 64 * 1024, 128) }, - { "m25p128-nonjedec", INFO0(256 * 1024, 64) }, - - { "m45pe10", INFO(0x204011, 0, 64 * 1024, 2) }, - { "m45pe80", INFO(0x204014, 0, 64 * 1024, 16) }, - { "m45pe16", INFO(0x204015, 0, 64 * 1024, 32) }, - - { "m25pe20", INFO(0x208012, 0, 64 * 1024, 4) }, - { "m25pe80", INFO(0x208014, 0, 64 * 1024, 16) }, - { "m25pe16", INFO(0x208015, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K) }, - - { "m25px16", INFO(0x207115, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K) }, - { "m25px32", INFO(0x207116, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "m25px32-s0", INFO(0x207316, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "m25px32-s1", INFO(0x206316, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "m25px64", INFO(0x207117, 0, 64 * 1024, 128) }, - { "m25px80", INFO(0x207114, 0, 64 * 1024, 16) }, }; =20 /** --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29C9EC04A6A for ; Mon, 7 Aug 2023 13:24:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234115AbjHGNYM (ORCPT ); Mon, 7 Aug 2023 09:24:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234048AbjHGNXf (ORCPT ); Mon, 7 Aug 2023 09:23:35 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 085401FCD for ; Mon, 7 Aug 2023 06:22:53 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 41C9D61B0D for ; Mon, 7 Aug 2023 13:22:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F211CC43391; Mon, 7 Aug 2023 13:22:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414567; bh=7Ax3pkPo6UX4EijR1qZKMW+2WThEdBs7d0bv6XlTilA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ZIXavo8inivGQGgIa7DIw2gNALvxkr4SxrLjASzTjpUDnTneC7oFnP/hDBAakLOsi Pm0nS+0UGyATXdYUaA4i8L2F/FGsUTjb3O1fTOIMwaJlKamJmj7jO71mebxiBTwzkn q0xBFOR1z4ITo24tvq0ObVMTgIUq1ZhmAGXRr8jjOnLhj84zxirjkv7qqoUUzOv5bN TsWIBjnAxWg9JlIhoQg7T81V6+daD1aKuwKI9H64kPYjAblEWQrfxw2W53MndIBE5f p6Y2ONdyEvsgNDAPsxaqJrNbIrQ8vW6/gldEe8+LU5HmSkTHYjDtood8FdUk+wjPrx uCH4JYn5Q6/Qg== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:20 +0200 Subject: [PATCH 26/41] mtd: spi-nor: spansion: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-26-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/spansion.c | 370 +++++++++++++++++++++++++++----------= ---- 1 file changed, 241 insertions(+), 129 deletions(-) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 1a1d2368c462..5953df6aff93 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -756,140 +756,252 @@ static const struct spi_nor_fixups s25fs_s_nor_fixu= ps =3D { }; =20 static const struct flash_info spansion_nor_parts[] =3D { - { "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, - { "s25fl128s0", INFO6(0x012018, 0x4d0080, 256 * 1024, 64) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fl256s0", INFO6(0x010219, 0x4d0080, 256 * 1024, 128) - NO_SFDP_FLAGS(SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fl256s1", INFO6(0x010219, 0x4d0180, 64 * 1024, 512) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fl512s", INFO6(0x010220, 0x4d0080, 256 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fs128s1", INFO6(0x012018, 0x4d0181, 64 * 1024, 256) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - .fixups =3D &s25fs_s_nor_fixups, }, - { "s25fs256s0", INFO6(0x010219, 0x4d0081, 256 * 1024, 128) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - .fixups =3D &s25fs_s_nor_fixups, }, - { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64) }, - { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256) }, - { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256) - NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - MFR_FLAGS(USE_CLSR) - }, - { "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8) }, - { "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16) }, - { "s25sl016a", INFO(0x010214, 0, 64 * 1024, 32) }, - { "s25sl032a", INFO(0x010215, 0, 64 * 1024, 64) }, - { "s25sl064a", INFO(0x010216, 0, 64 * 1024, 128) }, - { "s25fl004k", INFO(0xef4013, 0, 64 * 1024, 8) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "s25fl008k", INFO(0xef4014, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "s25fl016k", INFO(0xef4015, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "s25fl064k", INFO(0xef4017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "s25fl116k", INFO(0x014015, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "s25fl132k", INFO(0x014016, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "s25fl164k", INFO(0x014017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K) }, - { "s25fl204k", INFO(0x014013, 0, 64 * 1024, 8) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "s25fl208k", INFO(0x014014, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "s25fl064l", INFO(0x016017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, - { "s25fl128l", INFO(0x016018, 0, 64 * 1024, 256) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, - { "s25fl256l", INFO(0x016019, 0, 64 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) }, - { "s25fs256t", INFO6(0x342b19, 0x0f0890, 0, 0) - MFR_FLAGS(USE_CLPEF) - .fixups =3D &s25fs256t_fixups }, - { "s25hl512t", INFO6(0x342a1a, 0x0f0390, 0, 0) - MFR_FLAGS(USE_CLPEF) - .fixups =3D &s25hx_t_fixups }, - { "s25hl01gt", INFO6(0x342a1b, 0x0f0390, 0, 0) - MFR_FLAGS(USE_CLPEF) - .fixups =3D &s25hx_t_fixups }, - { "s25hl02gt", INFO6(0x342a1c, 0x0f0090, 0, 0) - MFR_FLAGS(USE_CLPEF) - FLAGS(NO_CHIP_ERASE) - .fixups =3D &s25hx_t_fixups }, - { "s25hs512t", INFO6(0x342b1a, 0x0f0390, 0, 0) - MFR_FLAGS(USE_CLPEF) - .fixups =3D &s25hx_t_fixups }, - { "s25hs01gt", INFO6(0x342b1b, 0x0f0390, 0, 0) - MFR_FLAGS(USE_CLPEF) - .fixups =3D &s25hx_t_fixups }, - { "s25hs02gt", INFO6(0x342b1c, 0x0f0090, 0, 0) - MFR_FLAGS(USE_CLPEF) - FLAGS(NO_CHIP_ERASE) - .fixups =3D &s25hx_t_fixups }, - { "cy15x104q", INFO6(0x042cc2, 0x7f7f7f, 512 * 1024, 1) - FLAGS(SPI_NOR_NO_ERASE) }, - { "s28hl512t", INFO(0x345a1a, 0, 0, 0) - MFR_FLAGS(USE_CLPEF) + { + .id =3D SNOR_ID(0x01, 0x02, 0x15, 0x4d, 0x00), + .name =3D "s25sl032p", + .size =3D SZ_4M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x16, 0x4d, 0x00), + .name =3D "s25sl064p", + .size =3D SZ_8M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00, 0x80), + .name =3D "s25fl128s0", + .size =3D SZ_16M, + .sector_size =3D SZ_256K, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x80), + .name =3D "s25fl128s1", + .size =3D SZ_16M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x80), + .name =3D "s25fl256s0", + .size =3D SZ_32M, + .sector_size =3D SZ_256K, + .no_sfdp_flags =3D SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_= READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x01, 0x80), + .name =3D "s25fl256s1", + .size =3D SZ_32M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x80), + .name =3D "s25fl512s", + .size =3D SZ_64M, + .sector_size =3D SZ_256K, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x81), + .name =3D "s25fs128s1", + .size =3D SZ_16M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + .fixups =3D &s25fs_s_nor_fixups, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x81), + .name =3D "s25fs256s0", + .size =3D SZ_32M, + .sector_size =3D SZ_256K, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x01, 0x81), + .name =3D "s25fs256s1", + .size =3D SZ_32M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x81), + .name =3D "s25fs512s", + .size =3D SZ_64M, + .sector_size =3D SZ_256K, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + .fixups =3D &s25fs_s_nor_fixups, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x03, 0x00), + .name =3D "s25sl12800", + .size =3D SZ_16M, + .sector_size =3D SZ_256K, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x03, 0x01), + .name =3D "s25sl12801", + .size =3D SZ_16M, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00), + .name =3D "s25fl129p0", + .size =3D SZ_16M, + .sector_size =3D SZ_256K, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01), + .name =3D "s25fl129p1", + .size =3D SZ_16M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x12), + .name =3D "s25sl004a", + .size =3D SZ_512K, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x13), + .name =3D "s25sl008a", + .size =3D SZ_1M, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x14), + .name =3D "s25sl016a", + .size =3D SZ_2M, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x15), + .name =3D "s25sl032a", + .size =3D SZ_4M, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x16), + .name =3D "s25sl064a", + .size =3D SZ_8M, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x13), + .name =3D "s25fl004k", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x14), + .name =3D "s25fl008k", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x15), + .name =3D "s25fl016k", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x17), + .name =3D "s25fl064k", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x01, 0x40, 0x15), + .name =3D "s25fl116k", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x01, 0x40, 0x16), + .name =3D "s25fl132k", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x01, 0x40, 0x17), + .name =3D "s25fl164k", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x01, 0x40, 0x13), + .name =3D "s25fl204k", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x01, 0x40, 0x14), + .name =3D "s25fl208k", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x01, 0x60, 0x17), + .name =3D "s25fl064l", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0x01, 0x60, 0x18), + .name =3D "s25fl128l", + .size =3D SZ_16M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0x01, 0x60, 0x19), + .name =3D "s25fl256l", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0x34, 0x2b, 0x19, 0x0f, 0x08, 0x90), + .name =3D "s25fs256t", + .mfr_flags =3D USE_CLPEF, + .fixups =3D &s25fs256t_fixups + }, { + .id =3D SNOR_ID(0x34, 0x2a, 0x1a, 0x0f, 0x03, 0x90), + .name =3D "s25hl512t", + .mfr_flags =3D USE_CLPEF, + .fixups =3D &s25hx_t_fixups + }, { + .id =3D SNOR_ID(0x34, 0x2a, 0x1b, 0x0f, 0x03, 0x90), + .name =3D "s25hl01gt", + .mfr_flags =3D USE_CLPEF, + .fixups =3D &s25hx_t_fixups + }, { + .id =3D SNOR_ID(0x34, 0x2a, 0x1c, 0x0f, 0x00, 0x90), + .name =3D "s25hl02gt", + .mfr_flags =3D USE_CLPEF, + .flags =3D NO_CHIP_ERASE, + .fixups =3D &s25hx_t_fixups + }, { + .id =3D SNOR_ID(0x34, 0x2b, 0x1a, 0x0f, 0x03, 0x90), + .name =3D "s25hs512t", + .mfr_flags =3D USE_CLPEF, + .fixups =3D &s25hx_t_fixups + }, { + .id =3D SNOR_ID(0x34, 0x2b, 0x1b, 0x0f, 0x03, 0x90), + .name =3D "s25hs01gt", + .mfr_flags =3D USE_CLPEF, + .fixups =3D &s25hx_t_fixups + }, { + .id =3D SNOR_ID(0x34, 0x2b, 0x1c, 0x0f, 0x00, 0x90), + .name =3D "s25hs02gt", + .mfr_flags =3D USE_CLPEF, + .flags =3D NO_CHIP_ERASE, + .fixups =3D &s25hx_t_fixups + }, { + .id =3D SNOR_ID(0x04, 0x2c, 0xc2, 0x7f, 0x7f, 0x7f), + .name =3D "cy15x104q", + .size =3D SZ_512K, + .sector_size =3D SZ_512K, + .flags =3D SPI_NOR_NO_ERASE, + }, { + .id =3D SNOR_ID(0x34, 0x5a, 0x1a), + .name =3D "s28hl512t", + .mfr_flags =3D USE_CLPEF, .fixups =3D &s28hx_t_fixups, - }, - { "s28hl01gt", INFO(0x345a1b, 0, 0, 0) - MFR_FLAGS(USE_CLPEF) + }, { + .id =3D SNOR_ID(0x34, 0x5a, 0x1b), + .name =3D "s28hl01gt", + .mfr_flags =3D USE_CLPEF, .fixups =3D &s28hx_t_fixups, - }, - { "s28hs512t", INFO(0x345b1a, 0, 0, 0) - MFR_FLAGS(USE_CLPEF) + }, { + .id =3D SNOR_ID(0x34, 0x5b, 0x1a), + .name =3D "s28hs512t", + .mfr_flags =3D USE_CLPEF, .fixups =3D &s28hx_t_fixups, - }, - { "s28hs01gt", INFO(0x345b1b, 0, 0, 0) - MFR_FLAGS(USE_CLPEF) + }, { + .id =3D SNOR_ID(0x34, 0x5b, 0x1b), + .name =3D "s28hs01gt", + .mfr_flags =3D USE_CLPEF, .fixups =3D &s28hx_t_fixups, - }, - { "s28hs02gt", INFO(0x345b1c, 0, 0, 0) - MFR_FLAGS(USE_CLPEF) + }, { + .id =3D SNOR_ID(0x34, 0x5b, 0x1c), + .name =3D "s28hs02gt", + .mfr_flags =3D USE_CLPEF, .fixups =3D &s28hx_t_fixups, - }, + } }; =20 /** --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1CB25C001B0 for ; Mon, 7 Aug 2023 13:24:05 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v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414569; bh=B6xNNgCdUxYx/FDwlznTmWB5XyM+EBLTTtA64gYkn7k=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=hFAjENPmsmZB5D0QDQL9CfwYE1FjZ1FAJRPL2Zjl+Kj4tJRSq+GM3segO2Ad1Vcpm xUYsMXoASFgAgQq/rN1cTFmsmCQ/CU61KhZ/VFYrcyvmmC+It/OIpLUWwKJslJlYkg lYj3LEq7a6sUZ4ZvjGmvFk50NWxRunNNQQM0vP3XizEABzE8wr+OVmUgFH3Mp+2C08 GdsNGn+tEElcvTWTkGS+nVqWLNeWOG3q+YtnJ5eXl6P3wxGwz9jO/WLF9CrewM4l6f mnjyrcaCDqE+0UOI/3w/HbjVmgJjRYxJcycYEjMDvYiAy/2krA7YN4pHVRMWB0OJmd B9Uw34r4SSbUw== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:21 +0200 Subject: [PATCH 27/41] mtd: spi-nor: sst: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-27-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/sst.c | 155 ++++++++++++++++++++++++++++++------------= ---- 1 file changed, 100 insertions(+), 55 deletions(-) diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index 42e29441a7f7..8defff00c35f 100644 --- a/drivers/mtd/spi-nor/sst.c +++ b/drivers/mtd/spi-nor/sst.c @@ -61,61 +61,106 @@ static const struct spi_nor_fixups sst26vf_nor_fixups = =3D { }; =20 static const struct flash_info sst_nor_parts[] =3D { - { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP | - SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) }, - { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25wf020a", INFO(0x621612, 0, 64 * 1024, 4) - FLAGS(SPI_NOR_HAS_LOCK) - NO_SFDP_FLAGS(SECT_4K) }, - { "sst25wf040b", INFO(0x621613, 0, 64 * 1024, 8) - FLAGS(SPI_NOR_HAS_LOCK) - NO_SFDP_FLAGS(SECT_4K) }, - { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K) - MFR_FLAGS(SST_WRITE) }, - { "sst26wf016b", INFO(0xbf2651, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "sst26vf016b", INFO(0xbf2641, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ) }, - { "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - .fixups =3D &sst26vf_nor_fixups }, + { + .id =3D SNOR_ID(0xbf, 0x25, 0x8d), + .name =3D "sst25vf040b", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x8e), + .name =3D "sst25vf080b", + .size =3D SZ_1M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x41), + .name =3D "sst25vf016b", + .size =3D SZ_2M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x4a), + .name =3D "sst25vf032b", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x4b), + .name =3D "sst25vf064c", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x01), + .name =3D "sst25wf512", + .size =3D SZ_64K, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x02), + .name =3D "sst25wf010", + .size =3D SZ_128K, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x03), + .name =3D "sst25wf020", + .size =3D SZ_256K, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0x62, 0x16, 0x12), + .name =3D "sst25wf020a", + .size =3D SZ_256K, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x62, 0x16, 0x13), + .name =3D "sst25wf040b", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x04), + .name =3D "sst25wf040", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x05), + .name =3D "sst25wf080", + .size =3D SZ_1M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x26, 0x51), + .name =3D "sst26wf016b", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xbf, 0x26, 0x41), + .name =3D "sst26vf016b", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0xbf, 0x26, 0x43), + .name =3D "sst26vf064b", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixups =3D &sst26vf_nor_fixups, + } }; =20 static int sst_nor_write(struct mtd_info *mtd, loff_t to, size_t len, --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8EE56C04A6A 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13:22:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414571; bh=7YrNyXC7V+pn6zBK9bb3rHawo2C44jutORAdPpM/Vm4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=jwFlZGM6YPzJOgJWi1abEIpVVmSwX0N9gJ+UkWPoblg/85YaIti7+728Aq3cBrJ72 r401NdFNGdKvAfN9i4vV1COe6IfmkvH20Y1LHZQIgKmUWSrSMcglMcO8T1jYjHS9/H MW+JaZTitYAI02MrvXEk2IGpo6pImDn0K7vBlFriFvg/gPsooRpQ4hCBlfFo+AaQ0P M2fYOqgg6j9e0mem9r++ROk14FSK+tmJ3GM2RIOeOIusMJKVpfoMipiDQw9ZKIT/aj KaJbgjWg18jAcM7MEQpDvt4grTmoQfwUo+NRrK/sHySpy1fskNyOgS6S4Q2YKInLe3 tMPg8RfRpdw3Q== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:22 +0200 Subject: [PATCH 28/41] mtd: spi-nor: winbond: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-28-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/winbond.c | 281 +++++++++++++++++++++++++++-----------= ---- 1 file changed, 185 insertions(+), 96 deletions(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 2d3ae972b419..1f95c4ccecd9 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -42,102 +42,191 @@ static const struct spi_nor_fixups w25q256_fixups =3D= { }; =20 static const struct flash_info winbond_nor_parts[] =3D { - { "w25x05", INFO(0xef3010, 0, 64 * 1024, 1) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25x10", INFO(0xef3011, 0, 64 * 1024, 2) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25x20", INFO(0xef3012, 0, 64 * 1024, 4) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25x40", INFO(0xef3013, 0, 64 * 1024, 8) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25x80", INFO(0xef3014, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25x16", INFO(0xef3015, 0, 64 * 1024, 32) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q16dw", INFO(0xef6015, 0, 64 * 1024, 32) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25x32", INFO(0xef3016, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q16jv-im/jm", INFO(0xef7015, 0, 64 * 1024, 32) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q20cl", INFO(0xef4012, 0, 64 * 1024, 4) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q20bw", INFO(0xef5012, 0, 64 * 1024, 4) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q20ew", INFO(0xef6012, 0, 64 * 1024, 4) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q32", INFO(0xef4016, 0, 64 * 1024, 64) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - OTP_INFO(256, 3, 0x1000, 0x1000) }, - { "w25q32jv", INFO(0xef7016, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q32jwm", INFO(0xef8016, 0, 64 * 1024, 64) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - OTP_INFO(256, 3, 0x1000, 0x1000) }, - { "w25q64jwm", INFO(0xef8017, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q128jwm", INFO(0xef8018, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q256jwm", INFO(0xef8019, 0, 64 * 1024, 512) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q64jvm", INFO(0xef7017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q128fw", INFO(0xef6018, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q128jv", INFO(0xef7018, 0, 64 * 1024, 256) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16) - NO_SFDP_FLAGS(SECT_4K) }, - { "w25q128", INFO(0xef4018, 0, 0, 0) - FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, - { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) - .fixups =3D &w25q256_fixups }, - { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 0) }, - { "w25q256jw", INFO(0xef6019, 0, 64 * 1024, 512) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ | - SPI_NOR_DUAL_READ) }, - { "w25q512nwq", INFO(0xef6020, 0, 0, 0) - OTP_INFO(256, 3, 0x1000, 0x1000) }, - { "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 0) - OTP_INFO(256, 3, 0x1000, 0x1000) }, - { "w25q512jvq", INFO(0xef4020, 0, 64 * 1024, 1024) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, + { + .id =3D SNOR_ID(0xef, 0x30, 0x10), + .name =3D "w25x05", + .size =3D SZ_64K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x30, 0x11), + .name =3D "w25x10", + .size =3D SZ_128K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x30, 0x12), + .name =3D "w25x20", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x30, 0x13), + .name =3D "w25x40", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x30, 0x14), + .name =3D "w25x80", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x30, 0x15), + .name =3D "w25x16", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x15), + .name =3D "w25q16dw", + .size =3D SZ_2M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x30, 0x16), + .name =3D "w25x32", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x70, 0x15), + .name =3D "w25q16jv-im/jm", + .size =3D SZ_2M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x12), + .name =3D "w25q20cl", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x50, 0x12), + .name =3D "w25q20bw", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x12), + .name =3D "w25q20ew", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x16), + .name =3D "w25q32", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x16), + .name =3D "w25q32dw", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), + }, { + .id =3D SNOR_ID(0xef, 0x70, 0x16), + .name =3D "w25q32jv", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x16), + .name =3D "w25q32jwm", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x17), + .name =3D "w25q64jwm", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x18), + .name =3D "w25q128jwm", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x19), + .name =3D "w25q256jwm", + .size =3D SZ_32M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x30, 0x17), + .name =3D "w25x64", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x17), + .name =3D "w25q64", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x17), + .name =3D "w25q64dw", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x70, 0x17), + .name =3D "w25q64jvm", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x18), + .name =3D "w25q128fw", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x70, 0x18), + .name =3D "w25q128jv", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x50, 0x14), + .name =3D "w25q80", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x14), + .name =3D "w25q80bl", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x18), + .name =3D "w25q128", + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x19), + .name =3D "w25q256", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixups =3D &w25q256_fixups, + }, { + .id =3D SNOR_ID(0xef, 0x70, 0x19), + .name =3D "w25q256jvm", + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x19), + .name =3D "w25q256jw", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x71, 0x19), + .name =3D "w25m512jv", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x20), + .name =3D "w25q512nwq", + .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x20), + .name =3D "w25q512nwm", + .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x20), + .name =3D "w25q512jvq", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, }; =20 /** --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2573C001B0 for ; Mon, 7 Aug 2023 13:25:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234162AbjHGNZJ (ORCPT ); Mon, 7 Aug 2023 09:25:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35428 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233999AbjHGNYj (ORCPT ); Mon, 7 Aug 2023 09:24:39 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CDB0730E2 for ; Mon, 7 Aug 2023 06:23:27 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 97A4561B0C for ; Mon, 7 Aug 2023 13:22:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 535C3C433CD; Mon, 7 Aug 2023 13:22:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414574; bh=EyuDNaE5JOFL0ZQ/K44CuNRKS87m9hVeJq1QWqZcq6Y=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=iSKsVsqfX/2z9UasmUll/MuIlbesMuNKfOKMo+3MG6KgzrrToj8aMB31r+/uIxcNp T53LbfUO4pUuBTy2W0QBrwA7b3xChhZigbfOivgKBBtjgGll6V0oZZsQ2OzVQRhtiV UhfDDCdUoInzJS/Gbtmt5qCwvoeroVAtHV9bnuGtU2kK6NK5haUuINgfTNZLuuCuUP slu6CcgcOjvPBSi2QhrSPgOgk/zT8b1DJEgYdk6SnHTs4ti0m3fajd5nlZyi3CpLTp DRhKa4vmWqvftJ+lP7tqeucTJHBQIcfn+gBC0pK8BCW8/iUCaN6Dc4Kd279COitgIn uV+Ifj8wl7yUw== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:23 +0200 Subject: [PATCH 29/41] mtd: spi-nor: xilinx: use new macros in S3AN_INFO() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-29-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There won't be any new entries, nor are the entries that much different and the very odd page and sector sizes make the new format hard to read. Therefore, convert the old S3AN_INFO() macro. Signed-off-by: Michael Walle --- This collides with the atmel flashes and there seems to be a typo in the IDs. All this makes me wonder wether we shouldn't deprecate the support for this (FPGA configuration) flash. --- drivers/mtd/spi-nor/xilinx.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 8d4539e32dfe..f99118c691b0 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -21,21 +21,22 @@ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_DATA_IN(1, buf, 0)) =20 -#define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \ - SPI_NOR_ID(_jedec_id, 0), \ - .size =3D 8 * (_page_size) * (_n_sectors), \ - .sector_size =3D (8 * (_page_size)), \ - .page_size =3D (_page_size), \ - .flags =3D SPI_NOR_NO_FR +#define S3AN_FLASH(_id, _name, _n_sectors, _page_size) \ + .id =3D _id, \ + .name =3D _name, \ + .size =3D 8 * (_page_size) * (_n_sectors), \ + .sector_size =3D (8 * (_page_size)), \ + .page_size =3D (_page_size), \ + .flags =3D SPI_NOR_NO_FR =20 /* Xilinx S3AN share MFR with Atmel SPI NOR */ static const struct flash_info xilinx_nor_parts[] =3D { /* Xilinx S3AN Internal Flash */ - { "3S50AN", S3AN_INFO(0x1f2200, 64, 264) }, - { "3S200AN", S3AN_INFO(0x1f2400, 256, 264) }, - { "3S400AN", S3AN_INFO(0x1f2400, 256, 264) }, - { "3S700AN", S3AN_INFO(0x1f2500, 512, 264) }, - { "3S1400AN", S3AN_INFO(0x1f2600, 512, 528) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x22, 0x00), "3S50AN", 64, 264) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x24, 0x00), "3S200AN", 256, 264) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x24, 0x00), "3S400AN", 256, 264) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x25, 0x00), "3S700AN", 512, 264) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x26, 0x00), "3S1400AN", 512, 528) }, }; =20 /* --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 374BBC001B0 for ; Mon, 7 Aug 2023 13:24:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234089AbjHGNYS (ORCPT ); Mon, 7 Aug 2023 09:24:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234059AbjHGNXg (ORCPT ); Mon, 7 Aug 2023 09:23:36 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 491411FEF for ; Mon, 7 Aug 2023 06:22:57 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AEECC61AF0 for ; Mon, 7 Aug 2023 13:22:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6E518C433CA; Mon, 7 Aug 2023 13:22:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414576; bh=qrtlb3Inp+0PAFufVQ6/JFPnxSSyzXyjdaLgPSqbaiA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=NsR9qDDkaxORpZBJiKsta+1/GDmhp6GK5QJQzBO5BYofQPVspWIV4sKjVRJ3KSGZn 84Gn3Xke2SL/S3sMIoYYvJIKCpMnguwiYYxJ5odVcjQvGYhBLAfwE+i1BNfLr8G7yj JHuV1NoEKkGHIi0ZFaymdqu0dHOVJfz+C0oPrCDQbQwTN26kpCw1W0uPLj7J6cGZCR 3PnBxVYlfbOpe3G0QbUdobR0T6oKcMZM/kzzOlJbfQHQiZIcb7ba9ml+BqBG8nz2oq c2OIuDIC9NbBvShiKX7TLR2JabhafBhyxJaandhllpN8QGhzvC/xt5G02xJjM5LYYN dDypKC/z8C1dg== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:24 +0200 Subject: [PATCH 30/41] mtd: spi-nor: xmc: convert flash_info to new format MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-30-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The INFOx() macros are going away. Convert the flash_info database to the new format. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/xmc.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/spi-nor/xmc.c b/drivers/mtd/spi-nor/xmc.c index 48062ccb22fa..d5a06054b0dd 100644 --- a/drivers/mtd/spi-nor/xmc.c +++ b/drivers/mtd/spi-nor/xmc.c @@ -9,12 +9,17 @@ #include "core.h" =20 static const struct flash_info xmc_nor_parts[] =3D { - { "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, - { "XM25QH128A", INFO(0x207018, 0, 64 * 1024, 256) - NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | - SPI_NOR_QUAD_READ) }, + { + .id =3D SNOR_ID(0x20, 0x70, 0x17), + .name =3D "XM25QH64A", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0x70, 0x18), + .name =3D "XM25QH128A", + .size =3D SZ_16M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, }; =20 /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2BFBC04A6A for ; Mon, 7 Aug 2023 13:24:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234125AbjHGNYW (ORCPT ); Mon, 7 Aug 2023 09:24:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35586 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234072AbjHGNXj (ORCPT ); Mon, 7 Aug 2023 09:23:39 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 83EED1FD8 for ; Mon, 7 Aug 2023 06:22:59 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C96DD61A5A for ; Mon, 7 Aug 2023 13:22:58 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 893A3C433CB; Mon, 7 Aug 2023 13:22:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414578; bh=cvOmQ4r9lT/hD8cobtpM84I53hfGaM55Wi2KKw6QCYM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=dSfvpvUa4h4x8C4ItJk1cXUE/DFxF59UYVS47o5zy0khNIu8QjCN3PeXiPJTXDxhO 4KHUvi40oafgVJGAc2nSvgKGb+mxVFKSCtzjMz0eJ6p4Z/lE3/hsK2VEc7kvGoAzXR 99ffUJw5RZkdTsqQgb7R1LJvRT5AH+9shRuXGuY5bR1aCFuUBEYnJtGqLoEnugSkR6 81Acd3NvY+UGp+2mgMviaZneGyV1e4/WIaBF3XFLfeT7dnFY5FUhey87wUXaiDpUOM AgrZqJYs/p250owJOilsUZg6tMgLvtWJ5aa9nosPRsnrOZmo+nk/B8RG6HIPyvCeUz 00+JvtzpD/CgA== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:25 +0200 Subject: [PATCH 31/41] mtd: spi-nor: atmel: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-31-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/atmel.c | 82 ++++++++++++++++++++++-------------------= ---- 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c index ccc985c48ae3..18e904962d0e 100644 --- a/drivers/mtd/spi-nor/atmel.c +++ b/drivers/mtd/spi-nor/atmel.c @@ -164,20 +164,20 @@ static const struct spi_nor_fixups atmel_nor_global_p= rotection_fixups =3D { =20 static const struct flash_info atmel_nor_parts[] =3D { { - .id =3D SNOR_ID(0x1f, 0x66, 0x01), - .name =3D "at25fs010", - .sector_size =3D SZ_32K, - .size =3D SZ_128K, - .flags =3D SPI_NOR_HAS_LOCK, + .id =3D SNOR_ID(0x1f, 0x04, 0x00), + .name =3D "at26f004", + .size =3D SZ_512K, .no_sfdp_flags =3D SECT_4K, - .fixups =3D &at25fs_nor_fixups }, { - .id =3D SNOR_ID(0x1f, 0x66, 0x04), - .name =3D "at25fs040", - .size =3D SZ_512K, - .flags =3D SPI_NOR_HAS_LOCK, + .id =3D SNOR_ID(0x1f, 0x25, 0x00), + .name =3D "at45db081d", + .size =3D SZ_1M, .no_sfdp_flags =3D SECT_4K, - .fixups =3D &at25fs_nor_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x42, 0x16), + .name =3D "at25sl321", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0x1f, 0x44, 0x01), .name =3D "at25df041a", @@ -186,62 +186,62 @@ static const struct flash_info atmel_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups, }, { - .id =3D SNOR_ID(0x1f, 0x47, 0x00), - .name =3D "at25df321", - .size =3D SZ_4M, + .id =3D SNOR_ID(0x1f, 0x45, 0x01), + .name =3D "at26df081a", + .size =3D SZ_1M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups }, { - .id =3D SNOR_ID(0x1f, 0x47, 0x01), - .name =3D "at25df321a", - .size =3D SZ_4M, + .id =3D SNOR_ID(0x1f, 0x46, 0x01), + .name =3D "at26df161a", + .size =3D SZ_2M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups }, { - .id =3D SNOR_ID(0x1f, 0x48, 0x00), - .name =3D "at25df641", - .size =3D SZ_8M, + .id =3D SNOR_ID(0x1f, 0x47, 0x00), + .name =3D "at25df321", + .size =3D SZ_4M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups }, { - .id =3D SNOR_ID(0x1f, 0x42, 0x16), - .name =3D "at25sl321", + .id =3D SNOR_ID(0x1f, 0x47, 0x00), + .name =3D "at26df321", .size =3D SZ_4M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0x1f, 0x04, 0x00), - .name =3D "at26f004", - .size =3D SZ_512K, - .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0x1f, 0x45, 0x01), - .name =3D "at26df081a", - .size =3D SZ_1M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups }, { - .id =3D SNOR_ID(0x1f, 0x46, 0x01), - .name =3D "at26df161a", - .size =3D SZ_2M, + .id =3D SNOR_ID(0x1f, 0x47, 0x01), + .name =3D "at25df321a", + .size =3D SZ_4M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups }, { - .id =3D SNOR_ID(0x1f, 0x47, 0x00), - .name =3D "at26df321", - .size =3D SZ_4M, + .id =3D SNOR_ID(0x1f, 0x48, 0x00), + .name =3D "at25df641", + .size =3D SZ_8M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups }, { - .id =3D SNOR_ID(0x1f, 0x25, 0x00), - .name =3D "at45db081d", - .size =3D SZ_1M, + .id =3D SNOR_ID(0x1f, 0x66, 0x01), + .name =3D "at25fs010", + .sector_size =3D SZ_32K, + .size =3D SZ_128K, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &at25fs_nor_fixups + }, { + .id =3D SNOR_ID(0x1f, 0x66, 0x04), + .name =3D "at25fs040", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK, .no_sfdp_flags =3D SECT_4K, + .fixups =3D &at25fs_nor_fixups }, }; =20 --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31396C001DB for ; Mon, 7 Aug 2023 13:25:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234135AbjHGNZT (ORCPT ); Mon, 7 Aug 2023 09:25:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234101AbjHGNYl (ORCPT ); Mon, 7 Aug 2023 09:24:41 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5FD7A19AB for ; Mon, 7 Aug 2023 06:23:33 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id E7AF061B06 for ; Mon, 7 Aug 2023 13:23:00 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A43F3C433C8; Mon, 7 Aug 2023 13:22:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414580; bh=yf+i4Rv/o/8TXBlVhYljTJbV/eUqv5ZZTBjDmCQ4PA0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=c7w/2nHMiI1Ih+Msu1UD6s4O38rZIEENrYqf7XuoFBaFf15Fe4+JSOfuKFujzqNm3 A1uGMOVTB+QDlH9TKaLUmev4LBE2nFYOmK8GUlTTyu6rmIstFXbCyn6oh8uUsaf2cM R/65hn4+hV41m5w/416ZA8zHr1Z3ZBl3QH5s1h9AmNcDqyw00EfflTzK3EGgyi7r0q RpRNgQrrdLQCJT8YWwWTfnMm8CNAO8AtBzwhmCOV9drfyEUXWhpsKihRNN0AlcT0X5 DdW+B6CkLJX0liDI1dZUsAkpaF3/yYTTIGIRaoCGj5fk4puaTCFpU2AubQgYbW7tEJ vKe4TutaePmgg== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:26 +0200 Subject: [PATCH 32/41] mtd: spi-nor: eon: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-32-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/eon.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/mtd/spi-nor/eon.c b/drivers/mtd/spi-nor/eon.c index ba09cb6c2abd..c1ddf662f782 100644 --- a/drivers/mtd/spi-nor/eon.c +++ b/drivers/mtd/spi-nor/eon.c @@ -10,32 +10,37 @@ =20 static const struct flash_info eon_nor_parts[] =3D { { - .id =3D SNOR_ID(0x1c, 0x31, 0x16), - .name =3D "en25f32", - .size =3D SZ_4M, - .no_sfdp_flags =3D SECT_4K, - }, { .id =3D SNOR_ID(0x1c, 0x20, 0x16), .name =3D "en25p32", .size =3D SZ_4M, - }, { - .id =3D SNOR_ID(0x1c, 0x30, 0x16), - .name =3D "en25q32b", - .size =3D SZ_4M, }, { .id =3D SNOR_ID(0x1c, 0x20, 0x17), .name =3D "en25p64", .size =3D SZ_8M, + }, { + .id =3D SNOR_ID(0x1c, 0x30, 0x14), + .name =3D "en25q80a", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + }, { + .id =3D SNOR_ID(0x1c, 0x30, 0x16), + .name =3D "en25q32b", + .size =3D SZ_4M, }, { .id =3D SNOR_ID(0x1c, 0x30, 0x17), .name =3D "en25q64", .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K, }, { - .id =3D SNOR_ID(0x1c, 0x30, 0x14), - .name =3D "en25q80a", - .size =3D SZ_1M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, + .id =3D SNOR_ID(0x1c, 0x31, 0x16), + .name =3D "en25f32", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + }, { + .name =3D "en25s64", + .id =3D SNOR_ID(0x1c, 0x38, 0x17), + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0x1c, 0x70, 0x15), .name =3D "en25qh16", @@ -57,11 +62,6 @@ static const struct flash_info eon_nor_parts[] =3D { }, { .id =3D SNOR_ID(0x1c, 0x70, 0x19), .name =3D "en25qh256", - }, { - .name =3D "en25s64", - .id =3D SNOR_ID(0x1c, 0x38, 0x17), - .size =3D SZ_8M, - .no_sfdp_flags =3D SECT_4K, }, }; =20 --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 635D5C001DB for ; Mon, 7 Aug 2023 13:24:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233759AbjHGNYa (ORCPT ); Mon, 7 Aug 2023 09:24:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233913AbjHGNXw (ORCPT ); Mon, 7 Aug 2023 09:23:52 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 91DB11992 for ; Mon, 7 Aug 2023 06:23:04 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0C05E61ADE for ; Mon, 7 Aug 2023 13:23:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BF039C433CB; Mon, 7 Aug 2023 13:23:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414582; bh=yWhME5tjoVL5WamO6J63OUfuy5+Vof54SIVht26T9gk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=JLdPVyA8cHvtZeQYvLzkb2+Q6tYHcF5KuAZ4x5ZWe6DatzjQLk2DkK4rm/8aRlfI+ ypiL96yybg5qndi1oD9jOJ4sSMq6yY5EWgpGgNvpD6lnNGCcPeTXHhYwi6q3vpofB1 bIm2zFIoU9N3ncnWtBXQI9Qjh1WQd7xxuku0NKYhMNYcDgfCaGs4pxHiCOt3vAjQgM cJmDVQSM7pIB5qyTWlKt5hYJlS7swgHkuiGmmYzJZQo0R920lSnzMlwUWPf60BwKpb efHuFH74F8JzCWxtGCc+oWmjO8zRl8C/JBZSfn5uHNzBua2jUBUWmKmzdDyq+MgQy3 V/LwKAOR2vW1w== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:27 +0200 Subject: [PATCH 33/41] mtd: spi-nor: gigadevice: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-33-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/gigadevice.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadev= ice.c index 0d22cd99715b..ef1edd0add70 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -46,30 +46,12 @@ static const struct flash_info gigadevice_nor_parts[] = =3D { .size =3D SZ_4M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xc8, 0x60, 0x16), - .name =3D "gd25lq32", - .size =3D SZ_4M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xc8, 0x40, 0x17), .name =3D "gd25q64", .size =3D SZ_8M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xc8, 0x60, 0x17), - .name =3D "gd25lq64c", - .size =3D SZ_8M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xc8, 0x60, 0x18), - .name =3D "gd25lq128d", - .size =3D SZ_16M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xc8, 0x40, 0x18), .name =3D "gd25q128", @@ -82,6 +64,24 @@ static const struct flash_info gigadevice_nor_parts[] = =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6, .fixups =3D &gd25q256_fixups, .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0xc8, 0x60, 0x16), + .name =3D "gd25lq32", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x60, 0x17), + .name =3D "gd25lq64c", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc8, 0x60, 0x18), + .name =3D "gd25lq128d", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, }; =20 --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F41CC001B0 for ; Mon, 7 Aug 2023 13:25:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234146AbjHGNZX (ORCPT ); Mon, 7 Aug 2023 09:25:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36230 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234136AbjHGNYp (ORCPT ); Mon, 7 Aug 2023 09:24:45 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BBD219BA for ; Mon, 7 Aug 2023 06:23:34 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 4086661AE0 for ; Mon, 7 Aug 2023 13:23:05 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DAD69C433CD; Mon, 7 Aug 2023 13:23:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414584; bh=v3ofMUp8UBxPgYd5XD7XRHJNeXUWfMpXY/dIXqoAhK8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=es5CoEJce0v1chJ3Ry11vQ0GhdRj6X8gklJ28pDG1Ic/YfKoDOMqil6qcGTgXZiV3 GFYqkdTW2DCOXPH7Lsi+5JvaNt0dqzufqW5lV+SP0m/lRzAOo8Xuo924dqT6Zyi0Ju 0EH6f6kPSYIaSNA+Wnn1bD7WgDWTMpvdu8bpL3wFBBT78sITFDDl1XC/HnvqMvpmaj U2cxKagIH4b0EZJvcxpZ7Lpt1l5euCTRJ4ddJ50Fzu2lXCrAcww+UI65Ede5KTCqVJ JSgEMENfWfaA6/1R8CKdcQkLBGPjaULvftRvZE0cdeq2/1o2Vvt/oU5s7XYetUrBtk Idc5jlGyvcb0A== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:28 +0200 Subject: [PATCH 34/41] mtd: spi-nor: issi: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-34-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/issi.c | 44 ++++++++++++++++++++++--------------------= -- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c index 9478f1e61626..18d9a00aa22e 100644 --- a/drivers/mtd/spi-nor/issi.c +++ b/drivers/mtd/spi-nor/issi.c @@ -48,26 +48,43 @@ static const struct spi_nor_fixups pm25lv_nor_fixups = =3D { =20 static const struct flash_info issi_nor_parts[] =3D { { + .name =3D "pm25lv512", + .sector_size =3D SZ_32K, + .size =3D SZ_64K, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &pm25lv_nor_fixups + }, { + .name =3D "pm25lv010", + .sector_size =3D SZ_32K, + .size =3D SZ_128K, + .no_sfdp_flags =3D SECT_4K, + .fixups =3D &pm25lv_nor_fixups + }, { .id =3D SNOR_ID(0x7f, 0x9d, 0x20), .name =3D "is25cd512", .sector_size =3D SZ_32K, .size =3D SZ_64K, .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x7f, 0x9d, 0x46), + .name =3D "pm25lq032", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0x9d, 0x40, 0x13), .name =3D "is25lq040b", .size =3D SZ_512K, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0x9d, 0x60, 0x15), - .name =3D "is25lp016d", - .size =3D SZ_2M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0x9d, 0x60, 0x14), .name =3D "is25lp080d", .size =3D SZ_1M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x9d, 0x60, 0x15), + .name =3D "is25lp016d", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0x9d, 0x60, 0x16), .name =3D "is25lp032", @@ -109,23 +126,6 @@ static const struct flash_info issi_nor_parts[] =3D { .flags =3D SPI_NOR_QUAD_PP, .fixups =3D &is25lp256_fixups, .fixup_flags =3D SPI_NOR_4B_OPCODES, - }, { - .name =3D "pm25lv512", - .sector_size =3D SZ_32K, - .size =3D SZ_64K, - .no_sfdp_flags =3D SECT_4K, - .fixups =3D &pm25lv_nor_fixups - }, { - .name =3D "pm25lv010", - .sector_size =3D SZ_32K, - .size =3D SZ_128K, - .no_sfdp_flags =3D SECT_4K, - .fixups =3D &pm25lv_nor_fixups - }, { - .id =3D SNOR_ID(0x7f, 0x9d, 0x46), - .name =3D "pm25lq032", - .size =3D SZ_4M, - .no_sfdp_flags =3D SECT_4K, } }; =20 --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11C0BC001B0 for ; Mon, 7 Aug 2023 13:25:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234173AbjHGNZZ (ORCPT ); Mon, 7 Aug 2023 09:25:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234114AbjHGNYs (ORCPT ); Mon, 7 Aug 2023 09:24:48 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 38DBE1BCE for ; Mon, 7 Aug 2023 06:23:35 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 3E4F561ACC for ; Mon, 7 Aug 2023 13:23:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0125EC433C7; Mon, 7 Aug 2023 13:23:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414586; bh=S2VGpvolKhnaojGSg3lKj4d7SDdm9iFqv4jQmZl9diQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=izRzvuAC1Kj2+PagOXQGgx1F6X2L7ZlMfSiXQPBpEMoX23BToljIbEdNJ7u4ANp+y dmaCz4xhXf/Cnvn/KPmD7Dhlq1bIdaKjzEy3a+NHIbiD712OSvx5Un1cl3TEN/nVEo A+2c8g3zMG0T2S0V6otbBEx8rNB6C7hmKcBs4HuSXJbmopJ3bVVaJjjDvTmVgw9vAR mIWM4F4IBm71JsJWkkKYErtjrHwTQ2ZbIci/Q0qWvOi+gTE3QjxinqxnIBJYmPFuIt VcGrHetWA/qo/ItoIlxJhBHizVVSVnrksYjAdoSDOMCDhlJSnTFO6CorXM7eCO1mZU S2dzbd6mJLf3w== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:29 +0200 Subject: [PATCH 35/41] mtd: spi-nor: macronix: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-35-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/macronix.c | 130 ++++++++++++++++++++-----------------= ---- 1 file changed, 65 insertions(+), 65 deletions(-) diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index 0508a207e9df..ea6be95e75a5 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -62,26 +62,44 @@ static const struct flash_info macronix_nor_parts[] =3D= { .name =3D "mx25l3205d", .size =3D SZ_4M, .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xc2, 0x9e, 0x16), - .name =3D "mx25l3255e", - .size =3D SZ_4M, - .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0xc2, 0x20, 0x17), .name =3D "mx25l6405d", .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x18), + .name =3D "mx25l12805d", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x19), + .name =3D "mx25l25635e", + .size =3D SZ_32M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixups =3D &mx25l25635_fixups + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x1a), + .name =3D "mx66l51235f", + .size =3D SZ_64M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0xc2, 0x20, 0x1b), + .name =3D "mx66l1g45g", + .size =3D SZ_128M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x23, 0x14), + .name =3D "mx25v8035f", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xc2, 0x25, 0x32), .name =3D "mx25u2033e", .size =3D SZ_256K, .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xc2, 0x25, 0x36), - .name =3D "mx25u3235f", - .size =3D SZ_4M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xc2, 0x25, 0x33), .name =3D "mx25u4035", @@ -92,74 +110,33 @@ static const struct flash_info macronix_nor_parts[] = =3D { .name =3D "mx25u8035", .size =3D SZ_1M, .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xc2, 0x25, 0x36), + .name =3D "mx25u3235f", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xc2, 0x25, 0x37), .name =3D "mx25u6435f", .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xc2, 0x20, 0x18), - .name =3D "mx25l12805d", - .size =3D SZ_16M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP, - .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xc2, 0x26, 0x18), - .name =3D "mx25l12855e", - .size =3D SZ_16M, - }, { - .id =3D SNOR_ID(0xc2, 0x28, 0x15), - .name =3D "mx25r1635f", - .size =3D SZ_2M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xc2, 0x28, 0x16), - .name =3D "mx25r3235f", - .size =3D SZ_4M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xc2, 0x25, 0x38), .name =3D "mx25u12835f", .size =3D SZ_16M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xc2, 0x20, 0x19), - .name =3D "mx25l25635e", - .size =3D SZ_32M, - .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixups =3D &mx25l25635_fixups }, { .id =3D SNOR_ID(0xc2, 0x25, 0x39), .name =3D "mx25u25635f", .size =3D SZ_32M, .no_sfdp_flags =3D SECT_4K, - FIXUP_FLAGS(SPI_NOR_4B_OPCODES) + .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { .id =3D SNOR_ID(0xc2, 0x25, 0x3a), .name =3D "mx25u51245g", .size =3D SZ_64M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .fixup_flags =3D SPI_NOR_4B_OPCODES, - }, { - .id =3D SNOR_ID(0xc2, 0x81, 0x3a), - .name =3D "mx25uw51245g", - .n_banks =3D 4, - .flags =3D SPI_NOR_RWW, - }, { - .id =3D SNOR_ID(0xc2, 0x23, 0x14), - .name =3D "mx25v8035f", - .size =3D SZ_1M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xc2, 0x26, 0x19), - .name =3D "mx25l25655e", - .size =3D SZ_32M, - }, { - .id =3D SNOR_ID(0xc2, 0x20, 0x1a), - .name =3D "mx66l51235f", - .size =3D SZ_64M, - .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { .id =3D SNOR_ID(0xc2, 0x25, 0x3a), .name =3D "mx66u51235f", @@ -167,22 +144,45 @@ static const struct flash_info macronix_nor_parts[] = =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { - .id =3D SNOR_ID(0xc2, 0x20, 0x1b), - .name =3D "mx66l1g45g", - .size =3D SZ_128M, + .id =3D SNOR_ID(0xc2, 0x25, 0x3c), + .name =3D "mx66u2g45g", + .size =3D SZ_256M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + }, { + .id =3D SNOR_ID(0xc2, 0x26, 0x18), + .name =3D "mx25l12855e", + .size =3D SZ_16M, + }, { + .id =3D SNOR_ID(0xc2, 0x26, 0x19), + .name =3D "mx25l25655e", + .size =3D SZ_32M, }, { .id =3D SNOR_ID(0xc2, 0x26, 0x1b), .name =3D "mx66l1g55g", .size =3D SZ_128M, .no_sfdp_flags =3D SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0xc2, 0x25, 0x3c), - .name =3D "mx66u2g45g", - .size =3D SZ_256M, + .id =3D SNOR_ID(0xc2, 0x28, 0x15), + .name =3D "mx25r1635f", + .size =3D SZ_2M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, - }, + }, { + .id =3D SNOR_ID(0xc2, 0x28, 0x16), + .name =3D "mx25r3235f", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xc2, 0x81, 0x3a), + .name =3D "mx25uw51245g", + .n_banks =3D 4, + .flags =3D SPI_NOR_RWW, + }, { + .id =3D SNOR_ID(0xc2, 0x9e, 0x16), + .name =3D "mx25l3255e", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, + } }; =20 static void macronix_nor_default_init(struct spi_nor *nor) --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA3EDC04FDF for ; Mon, 7 Aug 2023 13:24:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234098AbjHGNYl (ORCPT ); Mon, 7 Aug 2023 09:24:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234028AbjHGNX6 (ORCPT ); Mon, 7 Aug 2023 09:23:58 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 68BC62683 for ; Mon, 7 Aug 2023 06:23:10 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 602BD61B11 for ; Mon, 7 Aug 2023 13:23:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1C2FFC433CC; Mon, 7 Aug 2023 13:23:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414588; bh=uBLUgzG+Qr84SJ0zH/c3GfOsYhPI41nZW9Idjp3TdLA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=dFTwwY66zNWui2sj1Bg2eQWzNrp4yc+E6DgKCTaX1dRm6NHQCRj/Z4h3wdJ1HpqbH ziLQummgaAsXWg99rIOvdjpnlhMA08msQMAo+dCKPKnuAwoX/7KusVcnnD3bg/Gmo0 bUGCMxL1/tn/hwndDV9LMFc1Tl2iV4SRExVjUfqGsL453pb3K9YZ9LPcHWzlcPpUGb YudjLV0xaJINizJ74U6eB7hZWmzGwKN6B5W7M92zuUVjUEz3JI8CmsAz+MkeSzPT6b MDO1LzS8RTb64n4NxTP2byGB/wqhUE/M5YcPjm0Meh1aBlNr/xzXokHKBmB6TPUDf2 oSoXBQmaLEscw== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:30 +0200 Subject: [PATCH 36/41] mtd: spi-nor: micron-st: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-36-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/micron-st.c | 336 ++++++++++++++++++++----------------= ---- 1 file changed, 168 insertions(+), 168 deletions(-) diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-s= t.c index 720fd2fbd0ad..4afcfc57c896 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -182,133 +182,35 @@ static const struct flash_info micron_nor_parts[] = =3D { =20 static const struct flash_info st_nor_parts[] =3D { { - .id =3D SNOR_ID(0x20, 0xbb, 0x15), - .name =3D "n25q016a", - .size =3D SZ_2M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0x20, 0xba, 0x16), - .name =3D "n25q032", - .size =3D SZ_4M, - .no_sfdp_flags =3D SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x16), - .name =3D "n25q032a", - .size =3D SZ_4M, - .no_sfdp_flags =3D SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0x20, 0xba, 0x17), - .name =3D "n25q064", - .size =3D SZ_8M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x17), - .name =3D "n25q064a", - .size =3D SZ_8M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x18), - .name =3D "n25q128a11", - .size =3D SZ_16M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, - }, { - .id =3D SNOR_ID(0x20, 0xba, 0x18), - .name =3D "n25q128a13", - .size =3D SZ_16M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, - }, { - .id =3D SNOR_ID(0x20, 0xba, 0x19, 0x10, 0x44, 0x00), - .name =3D "mt25ql256a", - .size =3D SZ_32M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, - .mfr_flags =3D USE_FSR, - }, { - .id =3D SNOR_ID(0x20, 0xba, 0x19), - .name =3D "n25q256a", - .size =3D SZ_32M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, - }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x19, 0x10, 0x44, 0x00), - .name =3D "mt25qu256a", - .size =3D SZ_32M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, - .mfr_flags =3D USE_FSR, - }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x19), - .name =3D "n25q256ax1", - .size =3D SZ_32M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, + .name =3D "m25p05-nonjedec", + .sector_size =3D SZ_32K, + .size =3D SZ_64K, }, { - .id =3D SNOR_ID(0x20, 0xba, 0x20, 0x10, 0x44, 0x00), - .name =3D "mt25ql512a", - .size =3D SZ_64M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, - .mfr_flags =3D USE_FSR, + .name =3D "m25p10-nonjedec", + .sector_size =3D SZ_32K, + .size =3D SZ_128K, }, { - .id =3D SNOR_ID(0x20, 0xba, 0x20), - .name =3D "n25q512ax3", - .size =3D SZ_64M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, + .name =3D "m25p20-nonjedec", + .size =3D SZ_256K, }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x20, 0x10, 0x44, 0x00), - .name =3D "mt25qu512a", - .size =3D SZ_64M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixup_flags =3D SPI_NOR_4B_OPCODES, - .mfr_flags =3D USE_FSR, + .name =3D "m25p40-nonjedec", + .size =3D SZ_512K, }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x20), - .name =3D "n25q512a", - .size =3D SZ_64M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, + .name =3D "m25p80-nonjedec", + .size =3D SZ_1M, }, { - .id =3D SNOR_ID(0x20, 0xba, 0x21), - .name =3D "n25q00", - .size =3D SZ_128M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | - SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, + .name =3D "m25p16-nonjedec", + .size =3D SZ_2M, }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x21), - .name =3D "n25q00a", - .size =3D SZ_128M, - .flags =3D NO_CHIP_ERASE, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, + .name =3D "m25p32-nonjedec", + .size =3D SZ_4M, }, { - .id =3D SNOR_ID(0x20, 0xba, 0x22), - .name =3D "mt25ql02g", - .size =3D SZ_256M, - .flags =3D NO_CHIP_ERASE, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, + .name =3D "m25p64-nonjedec", + .size =3D SZ_8M, }, { - .id =3D SNOR_ID(0x20, 0xbb, 0x22), - .name =3D "mt25qu02g", - .size =3D SZ_256M, - .flags =3D NO_CHIP_ERASE, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_FSR, + .name =3D "m25p128-nonjedec", + .sector_size =3D SZ_256K, + .size =3D SZ_16M, }, { .id =3D SNOR_ID(0x20, 0x20, 0x10), .name =3D "m25p05", @@ -348,36 +250,6 @@ static const struct flash_info st_nor_parts[] =3D { .name =3D "m25p128", .sector_size =3D SZ_256K, .size =3D SZ_16M, - }, { - .name =3D "m25p05-nonjedec", - .sector_size =3D SZ_32K, - .size =3D SZ_64K, - }, { - .name =3D "m25p10-nonjedec", - .sector_size =3D SZ_32K, - .size =3D SZ_128K, - }, { - .name =3D "m25p20-nonjedec", - .size =3D SZ_256K, - }, { - .name =3D "m25p40-nonjedec", - .size =3D SZ_512K, - }, { - .name =3D "m25p80-nonjedec", - .size =3D SZ_1M, - }, { - .name =3D "m25p16-nonjedec", - .size =3D SZ_2M, - }, { - .name =3D "m25p32-nonjedec", - .size =3D SZ_4M, - }, { - .name =3D "m25p64-nonjedec", - .size =3D SZ_8M, - }, { - .name =3D "m25p128-nonjedec", - .sector_size =3D SZ_256K, - .size =3D SZ_16M, }, { .id =3D SNOR_ID(0x20, 0x40, 0x11), .name =3D "m45pe10", @@ -391,18 +263,14 @@ static const struct flash_info st_nor_parts[] =3D { .name =3D "m45pe16", .size =3D SZ_2M, }, { - .id =3D SNOR_ID(0x20, 0x80, 0x12), - .name =3D "m25pe20", - .size =3D SZ_256K, + .id =3D SNOR_ID(0x20, 0x63, 0x16), + .name =3D "m25px32-s1", + .size =3D SZ_4M, + .no_sfdp_flags =3D SECT_4K, }, { - .id =3D SNOR_ID(0x20, 0x80, 0x14), - .name =3D "m25pe80", + .id =3D SNOR_ID(0x20, 0x71, 0x14), + .name =3D "m25px80", .size =3D SZ_1M, - }, { - .id =3D SNOR_ID(0x20, 0x80, 0x15), - .name =3D "m25pe16", - .size =3D SZ_2M, - .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0x20, 0x71, 0x15), .name =3D "m25px16", @@ -413,25 +281,157 @@ static const struct flash_info st_nor_parts[] =3D { .name =3D "m25px32", .size =3D SZ_4M, .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0x20, 0x71, 0x17), + .name =3D "m25px64", + .size =3D SZ_8M, }, { .id =3D SNOR_ID(0x20, 0x73, 0x16), .name =3D "m25px32-s0", .size =3D SZ_4M, .no_sfdp_flags =3D SECT_4K, }, { - .id =3D SNOR_ID(0x20, 0x63, 0x16), - .name =3D "m25px32-s1", - .size =3D SZ_4M, + .id =3D SNOR_ID(0x20, 0x80, 0x12), + .name =3D "m25pe20", + .size =3D SZ_256K, + }, { + .id =3D SNOR_ID(0x20, 0x80, 0x14), + .name =3D "m25pe80", + .size =3D SZ_1M, + }, { + .id =3D SNOR_ID(0x20, 0x80, 0x15), + .name =3D "m25pe16", + .size =3D SZ_2M, .no_sfdp_flags =3D SECT_4K, }, { - .id =3D SNOR_ID(0x20, 0x71, 0x17), - .name =3D "m25px64", + .id =3D SNOR_ID(0x20, 0xba, 0x16), + .name =3D "n25q032", + .size =3D SZ_4M, + .no_sfdp_flags =3D SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x17), + .name =3D "n25q064", .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0x20, 0x71, 0x14), - .name =3D "m25px80", - .size =3D SZ_1M, - }, + .id =3D SNOR_ID(0x20, 0xba, 0x18), + .name =3D "n25q128a13", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x19, 0x10, 0x44, 0x00), + .name =3D "mt25ql256a", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x19), + .name =3D "n25q256a", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x20, 0x10, 0x44, 0x00), + .name =3D "mt25ql512a", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x20), + .name =3D "n25q512ax3", + .size =3D SZ_64M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x21), + .name =3D "n25q00", + .size =3D SZ_128M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xba, 0x22), + .name =3D "mt25ql02g", + .size =3D SZ_256M, + .flags =3D NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x15), + .name =3D "n25q016a", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x16), + .name =3D "n25q032a", + .size =3D SZ_4M, + .no_sfdp_flags =3D SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x17), + .name =3D "n25q064a", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x18), + .name =3D "n25q128a11", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x19, 0x10, 0x44, 0x00), + .name =3D "mt25qu256a", + .size =3D SZ_32M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x19), + .name =3D "n25q256ax1", + .size =3D SZ_32M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x20, 0x10, 0x44, 0x00), + .name =3D "mt25qu512a", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .fixup_flags =3D SPI_NOR_4B_OPCODES, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x20), + .name =3D "n25q512a", + .size =3D SZ_64M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | + SPI_NOR_BP3_SR_BIT6, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x21), + .name =3D "n25q00a", + .size =3D SZ_128M, + .flags =3D NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + }, { + .id =3D SNOR_ID(0x20, 0xbb, 0x22), + .name =3D "mt25qu02g", + .size =3D SZ_256M, + .flags =3D NO_CHIP_ERASE, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_FSR, + } }; =20 /** --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52DC5C04FE0 for ; Mon, 7 Aug 2023 13:24:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234057AbjHGNYn (ORCPT ); Mon, 7 Aug 2023 09:24:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36112 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234031AbjHGNX6 (ORCPT ); Mon, 7 Aug 2023 09:23:58 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A9EC72697 for ; Mon, 7 Aug 2023 06:23:11 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7542F6192E for ; Mon, 7 Aug 2023 13:23:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 384C8C433CA; Mon, 7 Aug 2023 13:23:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414590; bh=8w3XDg6OtHsIPMEmA3w/5H7T3yQdVD+fVZ/p/srxbKw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=QWRZcR6c3bYQlYJPKpDOX33/eecQRgdPRF3GpqdLxrBV3pHlCEFO7mmYCxKfihfLT IucUEANYxfLhRw6uC0W6sCwK6QufZZY5V68eEgmhYIxC35UZZRJOueuYkTAbWWf8fn DdmExs4V38bTWKao9gag9wqXaGj283x0N6wizFYFIs8myF13AVFvJiWFrTrvNJvvVH Soq/Ds8c68HQcS5QFNqdouVFkgkkSt67vW8Q4xcD4mJpTk7QAwDveVN0NonOaQxtWf yBmD3Jeai5NphSrrSu0ugd5MPDTwmPhbjLbPWF4GAs4FOPuxbnS8ZQmEDqpHc8Ci5d j4erZ/FxXfEnA== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:31 +0200 Subject: [PATCH 37/41] mtd: spi-nor: spansion: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-37-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/spansion.c | 174 ++++++++++++++++++++-----------------= ---- 1 file changed, 87 insertions(+), 87 deletions(-) diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 5953df6aff93..fd2652aa6c1e 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -757,28 +757,35 @@ static const struct spi_nor_fixups s25fs_s_nor_fixups= =3D { =20 static const struct flash_info spansion_nor_parts[] =3D { { + .id =3D SNOR_ID(0x01, 0x02, 0x12), + .name =3D "s25sl004a", + .size =3D SZ_512K, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x13), + .name =3D "s25sl008a", + .size =3D SZ_1M, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x14), + .name =3D "s25sl016a", + .size =3D SZ_2M, + }, { .id =3D SNOR_ID(0x01, 0x02, 0x15, 0x4d, 0x00), .name =3D "s25sl032p", .size =3D SZ_4M, .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x15), + .name =3D "s25sl032a", + .size =3D SZ_4M, }, { .id =3D SNOR_ID(0x01, 0x02, 0x16, 0x4d, 0x00), .name =3D "s25sl064p", .size =3D SZ_8M, .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00, 0x80), - .name =3D "s25fl128s0", - .size =3D SZ_16M, - .sector_size =3D SZ_256K, - .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_CLSR, - }, { - .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x80), - .name =3D "s25fl128s1", - .size =3D SZ_16M, - .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_CLSR, + .id =3D SNOR_ID(0x01, 0x02, 0x16), + .name =3D "s25sl064a", + .size =3D SZ_8M, }, { .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x80), .name =3D "s25fl256s0", @@ -787,31 +794,16 @@ static const struct flash_info spansion_nor_parts[] = =3D { .no_sfdp_flags =3D SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_= READ, .mfr_flags =3D USE_CLSR, }, { - .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x01, 0x80), - .name =3D "s25fl256s1", + .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x81), + .name =3D "s25fs256s0", .size =3D SZ_32M, - .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_CLSR, - }, { - .id =3D SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x80), - .name =3D "s25fl512s", - .size =3D SZ_64M, .sector_size =3D SZ_256K, - .flags =3D SPI_NOR_HAS_LOCK, .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_CLSR, }, { - .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x81), - .name =3D "s25fs128s1", - .size =3D SZ_16M, - .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .mfr_flags =3D USE_CLSR, - .fixups =3D &s25fs_s_nor_fixups, - }, { - .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x00, 0x81), - .name =3D "s25fs256s0", + .id =3D SNOR_ID(0x01, 0x02, 0x19, 0x4d, 0x01, 0x80), + .name =3D "s25fl256s1", .size =3D SZ_32M, - .sector_size =3D SZ_256K, .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_CLSR, }, { @@ -820,6 +812,14 @@ static const struct flash_info spansion_nor_parts[] = =3D { .size =3D SZ_32M, .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_CLSR, + }, { + .id =3D SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x80), + .name =3D "s25fl512s", + .size =3D SZ_64M, + .sector_size =3D SZ_256K, + .flags =3D SPI_NOR_HAS_LOCK, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, }, { .id =3D SNOR_ID(0x01, 0x02, 0x20, 0x4d, 0x00, 0x81), .name =3D "s25fs512s", @@ -837,6 +837,13 @@ static const struct flash_info spansion_nor_parts[] = =3D { .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x03, 0x01), .name =3D "s25sl12801", .size =3D SZ_16M, + }, { + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00, 0x80), + .name =3D "s25fl128s0", + .size =3D SZ_16M, + .sector_size =3D SZ_256K, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, }, { .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x00), .name =3D "s25fl129p0", @@ -845,51 +852,34 @@ static const struct flash_info spansion_nor_parts[] = =3D { .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_CLSR, }, { - .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01), - .name =3D "s25fl129p1", + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x80), + .name =3D "s25fl128s1", .size =3D SZ_16M, .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .mfr_flags =3D USE_CLSR, }, { - .id =3D SNOR_ID(0x01, 0x02, 0x12), - .name =3D "s25sl004a", - .size =3D SZ_512K, - }, { - .id =3D SNOR_ID(0x01, 0x02, 0x13), - .name =3D "s25sl008a", - .size =3D SZ_1M, - }, { - .id =3D SNOR_ID(0x01, 0x02, 0x14), - .name =3D "s25sl016a", - .size =3D SZ_2M, - }, { - .id =3D SNOR_ID(0x01, 0x02, 0x15), - .name =3D "s25sl032a", - .size =3D SZ_4M, + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01, 0x81), + .name =3D "s25fs128s1", + .size =3D SZ_16M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, + .fixups =3D &s25fs_s_nor_fixups, }, { - .id =3D SNOR_ID(0x01, 0x02, 0x16), - .name =3D "s25sl064a", - .size =3D SZ_8M, + .id =3D SNOR_ID(0x01, 0x20, 0x18, 0x4d, 0x01), + .name =3D "s25fl129p1", + .size =3D SZ_16M, + .no_sfdp_flags =3D SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .mfr_flags =3D USE_CLSR, }, { - .id =3D SNOR_ID(0xef, 0x40, 0x13), - .name =3D "s25fl004k", + .id =3D SNOR_ID(0x01, 0x40, 0x13), + .name =3D "s25fl204k", .size =3D SZ_512K, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, }, { - .id =3D SNOR_ID(0xef, 0x40, 0x14), - .name =3D "s25fl008k", + .id =3D SNOR_ID(0x01, 0x40, 0x14), + .name =3D "s25fl208k", .size =3D SZ_1M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xef, 0x40, 0x15), - .name =3D "s25fl016k", - .size =3D SZ_2M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xef, 0x40, 0x17), - .name =3D "s25fl064k", - .size =3D SZ_8M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, }, { .id =3D SNOR_ID(0x01, 0x40, 0x15), .name =3D "s25fl116k", @@ -905,16 +895,6 @@ static const struct flash_info spansion_nor_parts[] = =3D { .name =3D "s25fl164k", .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0x01, 0x40, 0x13), - .name =3D "s25fl204k", - .size =3D SZ_512K, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, - }, { - .id =3D SNOR_ID(0x01, 0x40, 0x14), - .name =3D "s25fl208k", - .size =3D SZ_1M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ, }, { .id =3D SNOR_ID(0x01, 0x60, 0x17), .name =3D "s25fl064l", @@ -934,10 +914,11 @@ static const struct flash_info spansion_nor_parts[] = =3D { .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .fixup_flags =3D SPI_NOR_4B_OPCODES, }, { - .id =3D SNOR_ID(0x34, 0x2b, 0x19, 0x0f, 0x08, 0x90), - .name =3D "s25fs256t", - .mfr_flags =3D USE_CLPEF, - .fixups =3D &s25fs256t_fixups + .id =3D SNOR_ID(0x04, 0x2c, 0xc2, 0x7f, 0x7f, 0x7f), + .name =3D "cy15x104q", + .size =3D SZ_512K, + .sector_size =3D SZ_512K, + .flags =3D SPI_NOR_NO_ERASE, }, { .id =3D SNOR_ID(0x34, 0x2a, 0x1a, 0x0f, 0x03, 0x90), .name =3D "s25hl512t", @@ -954,6 +935,11 @@ static const struct flash_info spansion_nor_parts[] = =3D { .mfr_flags =3D USE_CLPEF, .flags =3D NO_CHIP_ERASE, .fixups =3D &s25hx_t_fixups + }, { + .id =3D SNOR_ID(0x34, 0x2b, 0x19, 0x0f, 0x08, 0x90), + .name =3D "s25fs256t", + .mfr_flags =3D USE_CLPEF, + .fixups =3D &s25fs256t_fixups }, { .id =3D SNOR_ID(0x34, 0x2b, 0x1a, 0x0f, 0x03, 0x90), .name =3D "s25hs512t", @@ -970,12 +956,6 @@ static const struct flash_info spansion_nor_parts[] = =3D { .mfr_flags =3D USE_CLPEF, .flags =3D NO_CHIP_ERASE, .fixups =3D &s25hx_t_fixups - }, { - .id =3D SNOR_ID(0x04, 0x2c, 0xc2, 0x7f, 0x7f, 0x7f), - .name =3D "cy15x104q", - .size =3D SZ_512K, - .sector_size =3D SZ_512K, - .flags =3D SPI_NOR_NO_ERASE, }, { .id =3D SNOR_ID(0x34, 0x5a, 0x1a), .name =3D "s28hl512t", @@ -1001,6 +981,26 @@ static const struct flash_info spansion_nor_parts[] = =3D { .name =3D "s28hs02gt", .mfr_flags =3D USE_CLPEF, .fixups =3D &s28hx_t_fixups, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x13), + .name =3D "s25fl004k", + .size =3D SZ_512K, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x14), + .name =3D "s25fl008k", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x15), + .name =3D "s25fl016k", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x17), + .name =3D "s25fl064k", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, } }; =20 --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B20E3C001B0 for ; Mon, 7 Aug 2023 13:24:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233815AbjHGNYr (ORCPT ); Mon, 7 Aug 2023 09:24:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36132 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234047AbjHGNYA (ORCPT ); Mon, 7 Aug 2023 09:24:00 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B8AC826A4 for ; Mon, 7 Aug 2023 06:23:13 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 989C061AE3 for ; Mon, 7 Aug 2023 13:23:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 539C5C433CB; Mon, 7 Aug 2023 13:23:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414593; bh=/8n9R2/oWAVHgTCJaVeGwlOLzTsRsPPSO3b5ChZ4ZCs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=FZylSiwJgs6mftUeStn078FokHyU8c7OBO8YMXYuwNEygKOSTHDnsD3Ju+HJfm8DI s7cikYPyUqEjYoa3NzA99UO1FfWBvG6GgG7blm+GLZraEs31CXr7DtNd2kaYA7FIPY 6h7NfYqgZwSn1foT3cVHmfgiqG0+NYmQ27ugF8fXAasQpVnG/Uzc4yi3G8Dbo5RSje rjuVuffh+614NDaejwshNjFQyO3xLzI+sHkH3kf5ArKa7oBZ4vYhQXW2BUJ2P/65+G 2C7kQgP5ysarN+kwILbrBpvtrqhmqLafB2zvEkpqRJVAc3jM2LAd9Krjk2bJgf9dSV Cb5Kr1PV3hmlQ== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:32 +0200 Subject: [PATCH 38/41] mtd: spi-nor: sst: sort flash_info database MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-38-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/sst.c | 90 +++++++++++++++++++++++--------------------= ---- 1 file changed, 45 insertions(+), 45 deletions(-) diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index 8defff00c35f..0f09eaf43db9 100644 --- a/drivers/mtd/spi-nor/sst.c +++ b/drivers/mtd/spi-nor/sst.c @@ -62,38 +62,16 @@ static const struct spi_nor_fixups sst26vf_nor_fixups = =3D { =20 static const struct flash_info sst_nor_parts[] =3D { { - .id =3D SNOR_ID(0xbf, 0x25, 0x8d), - .name =3D "sst25vf040b", - .size =3D SZ_512K, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, - .no_sfdp_flags =3D SECT_4K, - .mfr_flags =3D SST_WRITE, - }, { - .id =3D SNOR_ID(0xbf, 0x25, 0x8e), - .name =3D "sst25vf080b", - .size =3D SZ_1M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, - .no_sfdp_flags =3D SECT_4K, - .mfr_flags =3D SST_WRITE, - }, { - .id =3D SNOR_ID(0xbf, 0x25, 0x41), - .name =3D "sst25vf016b", - .size =3D SZ_2M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, - .no_sfdp_flags =3D SECT_4K, - .mfr_flags =3D SST_WRITE, - }, { - .id =3D SNOR_ID(0xbf, 0x25, 0x4a), - .name =3D "sst25vf032b", - .size =3D SZ_4M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .id =3D SNOR_ID(0x62, 0x16, 0x12), + .name =3D "sst25wf020a", + .size =3D SZ_256K, + .flags =3D SPI_NOR_HAS_LOCK, .no_sfdp_flags =3D SECT_4K, - .mfr_flags =3D SST_WRITE, }, { - .id =3D SNOR_ID(0xbf, 0x25, 0x4b), - .name =3D "sst25vf064c", - .size =3D SZ_8M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP | SPI_NOR_SWP_IS_VOLATILE, + .id =3D SNOR_ID(0x62, 0x16, 0x13), + .name =3D "sst25wf040b", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK, .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0xbf, 0x25, 0x01), @@ -116,18 +94,6 @@ static const struct flash_info sst_nor_parts[] =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .mfr_flags =3D SST_WRITE, - }, { - .id =3D SNOR_ID(0x62, 0x16, 0x12), - .name =3D "sst25wf020a", - .size =3D SZ_256K, - .flags =3D SPI_NOR_HAS_LOCK, - .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0x62, 0x16, 0x13), - .name =3D "sst25wf040b", - .size =3D SZ_512K, - .flags =3D SPI_NOR_HAS_LOCK, - .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0xbf, 0x25, 0x04), .name =3D "sst25wf040", @@ -143,10 +109,39 @@ static const struct flash_info sst_nor_parts[] =3D { .no_sfdp_flags =3D SECT_4K, .mfr_flags =3D SST_WRITE, }, { - .id =3D SNOR_ID(0xbf, 0x26, 0x51), - .name =3D "sst26wf016b", + .id =3D SNOR_ID(0xbf, 0x25, 0x41), + .name =3D "sst25vf016b", .size =3D SZ_2M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x4a), + .name =3D "sst25vf032b", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x4b), + .name =3D "sst25vf064c", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x8d), + .name =3D "sst25vf040b", + .size =3D SZ_512K, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, + }, { + .id =3D SNOR_ID(0xbf, 0x25, 0x8e), + .name =3D "sst25vf080b", + .size =3D SZ_1M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, + .no_sfdp_flags =3D SECT_4K, + .mfr_flags =3D SST_WRITE, }, { .id =3D SNOR_ID(0xbf, 0x26, 0x41), .name =3D "sst26vf016b", @@ -160,6 +155,11 @@ static const struct flash_info sst_nor_parts[] =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .fixups =3D &sst26vf_nor_fixups, + }, { + .id =3D SNOR_ID(0xbf, 0x26, 0x51), + .name =3D "sst26wf016b", + .size =3D SZ_2M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, } }; =20 --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B33E7C001B0 for ; Mon, 7 Aug 2023 13:24:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233774AbjHGNYx (ORCPT ); Mon, 7 Aug 2023 09:24:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234070AbjHGNYF (ORCPT ); Mon, 7 Aug 2023 09:24:05 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E949C2737 for ; Mon, 7 Aug 2023 06:23:15 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B533961B18 for ; Mon, 7 Aug 2023 13:23:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 705ABC433C7; Mon, 7 Aug 2023 13:23:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414595; bh=iBTPt8S5w7gWdJJi3s71qBJDZbCtHTAsa1phX7FXsLc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=J51iR/8+/4RKCNJpy6/8JDLOvmP0LXzz6PjNYZeTaibCYsgEpi8VHQey/qeoHYCEM xz495LqPBc+HFzhPR+sAik858x2SKqKYTHduCQ0FMORRhE5C1NaKCiVj0WvJ05nPB8 0NFu0rXrIhLDztop3X2Uc4537UYj1cU2bvSl3an0+KGeEvfCOh5JA+PjHeGAIl71FN olreunuAH1IQCSrTOIPdfJEirugzpMPoExw7PJ+Z7f1wrJ1AarhNq4M32wYkYmxu0B fiChc32wUEznfOBVVoKSMX/LDPVBo0bGjidr9S2Nd+nkHb9L5vr/0Nn1rknAQpRGbL xR6TQbwD4zDyA== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:33 +0200 Subject: [PATCH 39/41] mtd: spi-nor: winbond: sort flash_info entries MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-39-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/winbond.c | 166 +++++++++++++++++++++-----------------= ---- 1 file changed, 83 insertions(+), 83 deletions(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index 1f95c4ccecd9..6ce50c3f3c27 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -72,37 +72,25 @@ static const struct flash_info winbond_nor_parts[] =3D { .name =3D "w25x16", .size =3D SZ_2M, .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xef, 0x60, 0x15), - .name =3D "w25q16dw", - .size =3D SZ_2M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xef, 0x30, 0x16), .name =3D "w25x32", .size =3D SZ_4M, .no_sfdp_flags =3D SECT_4K, }, { - .id =3D SNOR_ID(0xef, 0x70, 0x15), - .name =3D "w25q16jv-im/jm", - .size =3D SZ_2M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + .id =3D SNOR_ID(0xef, 0x30, 0x17), + .name =3D "w25x64", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0xef, 0x40, 0x12), .name =3D "w25q20cl", .size =3D SZ_256K, .no_sfdp_flags =3D SECT_4K, }, { - .id =3D SNOR_ID(0xef, 0x50, 0x12), - .name =3D "w25q20bw", - .size =3D SZ_256K, - .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xef, 0x60, 0x12), - .name =3D "w25q20ew", - .size =3D SZ_256K, + .id =3D SNOR_ID(0xef, 0x40, 0x14), + .name =3D "w25q80bl", + .size =3D SZ_1M, .no_sfdp_flags =3D SECT_4K, }, { .id =3D SNOR_ID(0xef, 0x40, 0x16), @@ -110,57 +98,84 @@ static const struct flash_info winbond_nor_parts[] =3D= { .size =3D SZ_4M, .no_sfdp_flags =3D SECT_4K, }, { - .id =3D SNOR_ID(0xef, 0x60, 0x16), - .name =3D "w25q32dw", - .size =3D SZ_4M, + .id =3D SNOR_ID(0xef, 0x40, 0x17), + .name =3D "w25q64", + .size =3D SZ_8M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x18), + .name =3D "w25q128", .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + }, { + .id =3D SNOR_ID(0xef, 0x40, 0x19), + .name =3D "w25q256", + .size =3D SZ_32M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), + .fixups =3D &w25q256_fixups, }, { - .id =3D SNOR_ID(0xef, 0x70, 0x16), - .name =3D "w25q32jv", - .size =3D SZ_4M, + .id =3D SNOR_ID(0xef, 0x40, 0x20), + .name =3D "w25q512jvq", + .size =3D SZ_64M, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x50, 0x12), + .name =3D "w25q20bw", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x50, 0x14), + .name =3D "w25q80", + .size =3D SZ_1M, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x12), + .name =3D "w25q20ew", + .size =3D SZ_256K, + .no_sfdp_flags =3D SECT_4K, + }, { + .id =3D SNOR_ID(0xef, 0x60, 0x15), + .name =3D "w25q16dw", + .size =3D SZ_2M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0xef, 0x80, 0x16), - .name =3D "w25q32jwm", + .id =3D SNOR_ID(0xef, 0x60, 0x16), + .name =3D "w25q32dw", .size =3D SZ_4M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), }, { - .id =3D SNOR_ID(0xef, 0x80, 0x17), - .name =3D "w25q64jwm", + .id =3D SNOR_ID(0xef, 0x60, 0x17), + .name =3D "w25q64dw", .size =3D SZ_8M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0xef, 0x80, 0x18), - .name =3D "w25q128jwm", + .id =3D SNOR_ID(0xef, 0x60, 0x18), + .name =3D "w25q128fw", .size =3D SZ_16M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0xef, 0x80, 0x19), - .name =3D "w25q256jwm", + .id =3D SNOR_ID(0xef, 0x60, 0x19), + .name =3D "w25q256jw", .size =3D SZ_32M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0xef, 0x30, 0x17), - .name =3D "w25x64", - .size =3D SZ_8M, - .no_sfdp_flags =3D SECT_4K, + .id =3D SNOR_ID(0xef, 0x60, 0x20), + .name =3D "w25q512nwq", + .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), }, { - .id =3D SNOR_ID(0xef, 0x40, 0x17), - .name =3D "w25q64", - .size =3D SZ_8M, + .id =3D SNOR_ID(0xef, 0x70, 0x15), + .name =3D "w25q16jv-im/jm", + .size =3D SZ_2M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0xef, 0x60, 0x17), - .name =3D "w25q64dw", - .size =3D SZ_8M, + .id =3D SNOR_ID(0xef, 0x70, 0x16), + .name =3D "w25q32jv", + .size =3D SZ_4M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { @@ -168,64 +183,49 @@ static const struct flash_info winbond_nor_parts[] = =3D { .name =3D "w25q64jvm", .size =3D SZ_8M, .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xef, 0x60, 0x18), - .name =3D "w25q128fw", - .size =3D SZ_16M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xef, 0x70, 0x18), .name =3D "w25q128jv", .size =3D SZ_16M, .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - }, { - .id =3D SNOR_ID(0xef, 0x50, 0x14), - .name =3D "w25q80", - .size =3D SZ_1M, - .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xef, 0x40, 0x14), - .name =3D "w25q80bl", - .size =3D SZ_1M, - .no_sfdp_flags =3D SECT_4K, - }, { - .id =3D SNOR_ID(0xef, 0x40, 0x18), - .name =3D "w25q128", - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, - }, { - .id =3D SNOR_ID(0xef, 0x40, 0x19), - .name =3D "w25q256", - .size =3D SZ_32M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, - .fixups =3D &w25q256_fixups, }, { .id =3D SNOR_ID(0xef, 0x70, 0x19), .name =3D "w25q256jvm", - }, { - .id =3D SNOR_ID(0xef, 0x60, 0x19), - .name =3D "w25q256jw", - .size =3D SZ_32M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xef, 0x71, 0x19), .name =3D "w25m512jv", .size =3D SZ_64M, .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { - .id =3D SNOR_ID(0xef, 0x60, 0x20), - .name =3D "w25q512nwq", + .id =3D SNOR_ID(0xef, 0x80, 0x16), + .name =3D "w25q32jwm", + .size =3D SZ_4M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x17), + .name =3D "w25q64jwm", + .size =3D SZ_8M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x18), + .name =3D "w25q128jwm", + .size =3D SZ_16M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id =3D SNOR_ID(0xef, 0x80, 0x19), + .name =3D "w25q256jwm", + .size =3D SZ_32M, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, { .id =3D SNOR_ID(0xef, 0x80, 0x20), .name =3D "w25q512nwm", .otp =3D SNOR_OTP(256, 3, 0x1000, 0x1000), - }, { - .id =3D SNOR_ID(0xef, 0x40, 0x20), - .name =3D "w25q512jvq", - .size =3D SZ_64M, - .no_sfdp_flags =3D SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, }, }; =20 --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD48FC001B0 for ; Mon, 7 Aug 2023 13:24:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234150AbjHGNY5 (ORCPT ); Mon, 7 Aug 2023 09:24:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35598 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234119AbjHGNYN (ORCPT ); Mon, 7 Aug 2023 09:24:13 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A86C2D57 for ; Mon, 7 Aug 2023 06:23:18 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D723561B0D for ; Mon, 7 Aug 2023 13:23:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8D7A2C433C9; Mon, 7 Aug 2023 13:23:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414597; bh=fjBFDwKo3KO8ngc80qTC0rIJuf+fwM3TGfE20y77Uv8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=oQzpSyKsYxPLi3to0W9DQqS/mGEukCCI/szQR+jA1oFg90bGzwUET1D2xnpvSISrb 65+OfiYiFnfosvUF7aZ5pZxngVXC7cDXj7QXj7NaC6FOkzIzxOdz6zS+ohB3inqycY tS8t4A4nUnLLC6OcGhniQ6NFbzc1uAyEPb6KZi1uHCAuZqt2DZA0kp9n1C80pYP5J2 7hhi71nEeIWCyXC5C1YDf687VsB2eaQB3VUO14kr8D0XinuJquVJ+d7wOhYr/NUOJ0 XS5A/wV2HktIWke5TID75p6az2Nki8BnrgUOOzGjbveliZVlQxanAfY+KDXI3F4yQQ dq3O1oRqh+p8Q== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:34 +0200 Subject: [PATCH 40/41] mtd: spi-nor: atmel: drop duplicate entry MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-40-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Atmel AT26DF321 and AT25DF321 have the same ID. Both were just discovered by reading their IDs, that is, there is no probing by name. Thus only the first one in the list was ever probed. The AT25DF is the newer series. Drop the older one. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/atmel.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/mtd/spi-nor/atmel.c b/drivers/mtd/spi-nor/atmel.c index 18e904962d0e..95f0e139284e 100644 --- a/drivers/mtd/spi-nor/atmel.c +++ b/drivers/mtd/spi-nor/atmel.c @@ -206,13 +206,6 @@ static const struct flash_info atmel_nor_parts[] =3D { .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, .no_sfdp_flags =3D SECT_4K, .fixups =3D &atmel_nor_global_protection_fixups - }, { - .id =3D SNOR_ID(0x1f, 0x47, 0x00), - .name =3D "at26df321", - .size =3D SZ_4M, - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE, - .no_sfdp_flags =3D SECT_4K, - .fixups =3D &atmel_nor_global_protection_fixups }, { .id =3D SNOR_ID(0x1f, 0x47, 0x01), .name =3D "at25df321a", --=20 2.39.2 From nobody Sun Sep 7 12:25:51 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD02DC001B0 for ; Mon, 7 Aug 2023 13:25:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233965AbjHGNZE (ORCPT ); Mon, 7 Aug 2023 09:25:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35998 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233929AbjHGNYh (ORCPT ); Mon, 7 Aug 2023 09:24:37 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 879832D7F for ; Mon, 7 Aug 2023 06:23:24 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id EAEA361A5A for ; Mon, 7 Aug 2023 13:23:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AE26DC433CB; Mon, 7 Aug 2023 13:23:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1691414599; bh=Jqo8XbuMCxp/lU8H372pqnV5J9no6ZO9LFvX2EEpUkI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=dcKJzNz0Ci5OzkoSUNLW4LbMqNTrbb9mKTewnxvJziSjfXjDS0VJ+DcMwhU/YtRwe sz5kZ24FOOX/ol1OZaSKbM9GjH1WpisQbuocqY3ZDPoM1tVPRQmzPqbvhIF+3AP0+i ekDVxLqV8wO8EgJviTg5f64MoO9B2SapJMIovNW0bJL4IviW5qZMuWz6NKofaUf6YW CLHKQtZn34RN3vBqK8eikB2d0h0ecYGNfEwNq8CQnqviAm3MUjzRAX1MUsI5wppYP8 dQLb+J5Y7TRRbhg5KGwUOKZMsrtEt3VSf9D8Q1NdL7aZhBeo8q9ACaywr/4r3ML+tJ mfVqcFZF3zR8A== From: Michael Walle Date: Mon, 07 Aug 2023 15:21:35 +0200 Subject: [PATCH 41/41] mtd: spi-nor: core: get rid of the INFOx() macros MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230807-mtd-flash-info-db-rework-v1-41-3d3d5bef4ba4@kernel.org> References: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v1-0-3d3d5bef4ba4@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that all flash_info tables are converted to the new format, remove the old INFOx() macros. Signed-off-by: Michael Walle --- drivers/mtd/spi-nor/core.h | 65 ------------------------------------------= ---- 1 file changed, 65 deletions(-) diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index d0e83bfb847c..8f0f3c64488c 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -573,71 +573,6 @@ struct flash_info { .n_regions =3D (_n_regions), \ }) =20 -#define SPI_NOR_ID_2ITEMS(_id) ((_id) >> 8) & 0xff, (_id) & 0xff -#define SPI_NOR_ID_3ITEMS(_id) ((_id) >> 16) & 0xff, SPI_NOR_ID_2ITEMS(_id) - -#define SPI_NOR_ID(_jedec_id, _ext_id) \ - .id =3D &(const struct spi_nor_id){ \ - .bytes =3D (const u8[]){ SPI_NOR_ID_3ITEMS(_jedec_id), \ - SPI_NOR_ID_2ITEMS(_ext_id) }, \ - .len =3D !(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0)), \ - } - -#define SPI_NOR_ID6(_jedec_id, _ext_id) \ - .id =3D &(const struct spi_nor_id){ \ - .bytes =3D (const u8[]){ SPI_NOR_ID_3ITEMS(_jedec_id), \ - SPI_NOR_ID_3ITEMS(_ext_id) }, \ - .len =3D 6, \ - } - -#define SPI_NOR_GEOMETRY(_sector_size, _n_sectors, _n_banks) \ - .size =3D (_sector_size) * (_n_sectors), \ - .sector_size =3D (_sector_size =3D=3D SZ_64K) ? 0 : (_sector_size), \ - .n_banks =3D (_n_banks) - -/* Used when the "_ext_id" is two bytes at most */ -#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors) \ - SPI_NOR_ID((_jedec_id), (_ext_id)), \ - SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 0), - -#define INFO0(_sector_size, _n_sectors) \ - SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 0), - -#define INFOB(_jedec_id, _ext_id, _sector_size, _n_sectors, _n_banks) \ - SPI_NOR_ID((_jedec_id), (_ext_id)), \ - SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), (_n_banks)), - -#define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors) \ - SPI_NOR_ID6((_jedec_id), (_ext_id)), \ - SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 0), - -#define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_nbytes) \ - .size =3D (_sector_size) * (_n_sectors), \ - .sector_size =3D (_sector_size), \ - .page_size =3D (_page_size), \ - .addr_nbytes =3D (_addr_nbytes), \ - .flags =3D SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, \ - -#define OTP_INFO(_len, _n_regions, _base, _offset) \ - .otp =3D &(const struct spi_nor_otp_organization){ \ - .len =3D (_len), \ - .base =3D (_base), \ - .offset =3D (_offset), \ - .n_regions =3D (_n_regions), \ - }, - -#define FLAGS(_flags) \ - .flags =3D (_flags), \ - -#define NO_SFDP_FLAGS(_no_sfdp_flags) \ - .no_sfdp_flags =3D (_no_sfdp_flags), \ - -#define FIXUP_FLAGS(_fixup_flags) \ - .fixup_flags =3D (_fixup_flags), \ - -#define MFR_FLAGS(_mfr_flags) \ - .mfr_flags =3D (_mfr_flags), \ - /** * struct spi_nor_manufacturer - SPI NOR manufacturer object * @name: manufacturer name --=20 2.39.2