From nobody Fri Sep 20 13:32:14 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 142B3C04A6A for ; Fri, 4 Aug 2023 07:29:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234219AbjHDH3n (ORCPT ); Fri, 4 Aug 2023 03:29:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33714 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234169AbjHDH3I (ORCPT ); Fri, 4 Aug 2023 03:29:08 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 014993AA6 for ; Fri, 4 Aug 2023 00:29:07 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 300E966071BD; Fri, 4 Aug 2023 08:29:05 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1691134145; bh=2c+FsWSMCsIjoPxVpExi1poYE+difGX9dXXLJhfN7Oo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YvLyS0S52p6DOHMp7hwxi8SH342b3e6R4kIbstOlpCvXs/VjWDkr355vbGlM3h4ji 6uc6YyrT9np0lNvOAkosTIAeD4IE9s1dcI4S8RAYL3zeNfPly65m5khwlzwoiEZTct c92hryfaNR9ItaFd7K32wjkJa0bYN57LbUGZZVoTlQMOF/dlXChB3yhmcutrjCFS3K 45v7UclhHU2/oxpRqU09kN4VbZPww4fApDTlqU5QpYObeDVESmxExb+3i6w0ol0Qx3 1Sgoucsw9tjjzr776jPRbnCvQ8PQPwjprmy2t29ke/edsnM6ELkEMGs/13fyxRCqoA lu9nF3EUNJCbw== From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, wenst@chromium.org, kernel@collabora.com, ehristev@collabora.com, "Jason-JH . Lin" , Alexandre Mergnat Subject: [PATCH v10 10/16] drm/mediatek: gamma: Support multi-bank gamma LUT Date: Fri, 4 Aug 2023 09:28:44 +0200 Message-ID: <20230804072850.89365-11-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230804072850.89365-1-angelogioacchino.delregno@collabora.com> References: <20230804072850.89365-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Newer Gamma IP have got multiple LUT banks: support specifying the size of the LUT banks and handle bank-switching before programming the LUT in mtk_gamma_set_common() in preparation for adding support for MT8195 and newer SoCs. Suggested-by: Jason-JH.Lin [Angelo: Refactored original commit] Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Alexandre Mergnat Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 70 ++++++++++++++--------- 1 file changed, 44 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/me= diatek/mtk_disp_gamma.c index 1845bd326a6d..3f1c6815ea5a 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c @@ -24,6 +24,8 @@ #define DISP_GAMMA_SIZE 0x0030 #define DISP_GAMMA_SIZE_HSIZE GENMASK(28, 16) #define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0) +#define DISP_GAMMA_BANK 0x0100 +#define DISP_GAMMA_BANK_BANK GENMASK(1, 0) #define DISP_GAMMA_LUT 0x0700 =20 #define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20) @@ -37,6 +39,7 @@ struct mtk_disp_gamma_data { bool has_dither; bool lut_diff; + u16 lut_bank_size; u16 lut_size; u8 lut_bits; }; @@ -80,41 +83,54 @@ void mtk_gamma_set(struct device *dev, struct drm_crtc_= state *state) unsigned int i; struct drm_color_lut *lut; void __iomem *lut_base; - u32 cfg_val, word; + u32 cfg_val, lbank_val, word; + int cur_bank, num_lut_banks; =20 /* If there's no gamma lut there's nothing to do here. */ if (!state->gamma_lut) return; =20 + num_lut_banks =3D gamma->data->lut_size / gamma->data->lut_bank_size; cfg_val =3D readl(gamma->regs + DISP_GAMMA_CFG); lut_base =3D gamma->regs + DISP_GAMMA_LUT; lut =3D (struct drm_color_lut *)state->gamma_lut->data; - for (i =3D 0; i < gamma->data->lut_size; i++) { - struct drm_color_lut diff, hwlut; - - hwlut.red =3D drm_color_lut_extract(lut[i].red, gamma->data->lut_bits); - hwlut.green =3D drm_color_lut_extract(lut[i].green, gamma->data->lut_bit= s); - hwlut.blue =3D drm_color_lut_extract(lut[i].blue, gamma->data->lut_bits); - - if (!gamma->data->lut_diff || (i % 2 =3D=3D 0)) { - word =3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red); - word |=3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green); - word |=3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue); - } else { - diff.red =3D lut[i].red - lut[i - 1].red; - diff.red =3D drm_color_lut_extract(diff.red, gamma->data->lut_bits); - - diff.green =3D lut[i].green - lut[i - 1].green; - diff.green =3D drm_color_lut_extract(diff.green, gamma->data->lut_bits); - - diff.blue =3D lut[i].blue - lut[i - 1].blue; - diff.blue =3D drm_color_lut_extract(diff.blue, gamma->data->lut_bits); - - word =3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red); - word |=3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green); - word |=3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue); + + for (cur_bank =3D 0; cur_bank < num_lut_banks; cur_bank++) { + + /* Switch gamma bank and set data mode before writing LUT */ + if (num_lut_banks > 1) { + lbank_val =3D FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank); + writel(lbank_val, gamma->regs + DISP_GAMMA_BANK); + } + + for (i =3D 0; i < gamma->data->lut_bank_size; i++) { + int n =3D (cur_bank * gamma->data->lut_bank_size) + i; + struct drm_color_lut diff, hwlut; + + hwlut.red =3D drm_color_lut_extract(lut[n].red, gamma->data->lut_bits); + hwlut.green =3D drm_color_lut_extract(lut[n].green, gamma->data->lut_bi= ts); + hwlut.blue =3D drm_color_lut_extract(lut[n].blue, gamma->data->lut_bits= ); + + if (!gamma->data->lut_diff || (i % 2 =3D=3D 0)) { + word =3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red); + word |=3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green); + word |=3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue); + } else { + diff.red =3D lut[n].red - lut[n - 1].red; + diff.red =3D drm_color_lut_extract(diff.red, gamma->data->lut_bits); + + diff.green =3D lut[n].green - lut[n - 1].green; + diff.green =3D drm_color_lut_extract(diff.green, gamma->data->lut_bits= ); + + diff.blue =3D lut[n].blue - lut[n - 1].blue; + diff.blue =3D drm_color_lut_extract(diff.blue, gamma->data->lut_bits); + + word =3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red); + word |=3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green); + word |=3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue); + } + writel(word, (lut_base + i * 4)); } - writel(word, (lut_base + i * 4)); } =20 /* Enable the gamma table */ @@ -218,11 +234,13 @@ static int mtk_disp_gamma_remove(struct platform_devi= ce *pdev) =20 static const struct mtk_disp_gamma_data mt8173_gamma_driver_data =3D { .has_dither =3D true, + .lut_bank_size =3D 512, .lut_bits =3D 10, .lut_size =3D 512, }; =20 static const struct mtk_disp_gamma_data mt8183_gamma_driver_data =3D { + .lut_bank_size =3D 512, .lut_bits =3D 10, .lut_diff =3D true, .lut_size =3D 512, --=20 2.41.0