From nobody Fri Sep 20 14:39:12 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76A47C04A94 for ; Fri, 4 Aug 2023 07:29:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234300AbjHDH3j (ORCPT ); Fri, 4 Aug 2023 03:29:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234166AbjHDH3H (ORCPT ); Fri, 4 Aug 2023 03:29:07 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 220353AAF for ; Fri, 4 Aug 2023 00:29:06 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 4AA8366071BA; Fri, 4 Aug 2023 08:29:04 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1691134145; bh=G9jUBbuND2wlk1NRIFaK24JaPI1K8tQwQG9IqubvDH8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=loIubv0nBqKSChhbUGNaF4ysry+i8DIBdMelbcYLA+Zju8yNRgqhfaYDnxphzL6rU e4ib9MBIjO5AO9ilAfO2FX0ZlHum3jsA4+XsFJC2RhdXQOwZxuJoFsFVOG7U58aMwm M0oNnh9sVRxhYtBFlOqmXd8XyPjYBe9ZMnF49QehihwpUFKVcQyni5CNsDXzfTHPC4 Q4F3s8wuT7kTaIFHp3Feup1HI3rS/bJS7ApbQTXoDvGEVupOaz2XeqL3oP6ew/gC6x 4FGLW5IN7ZhLTtzivlRHiN55GukD47ZMb5rYniqcJIRswMkBJQVWHE/NgaCh/C7Wmp QsjskA8MRu7Og== From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, wenst@chromium.org, kernel@collabora.com, ehristev@collabora.com, "Jason-JH . Lin" , Alexandre Mergnat Subject: [PATCH v10 09/16] drm/mediatek: gamma: Support specifying number of bits per LUT component Date: Fri, 4 Aug 2023 09:28:43 +0200 Message-ID: <20230804072850.89365-10-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230804072850.89365-1-angelogioacchino.delregno@collabora.com> References: <20230804072850.89365-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" New SoCs, like MT8195, not only may support bigger lookup tables, but have got a different register layout to support bigger precision: support specifying the number of `lut_bits` for each SoC and use it in mtk_gamma_set_common() to perform the right calculation. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Jason-JH.Lin Reviewed-by: Alexandre Mergnat --- drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/me= diatek/mtk_disp_gamma.c index 001b98694761..1845bd326a6d 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c @@ -38,6 +38,7 @@ struct mtk_disp_gamma_data { bool has_dither; bool lut_diff; u16 lut_size; + u8 lut_bits; }; =20 /* @@ -91,9 +92,9 @@ void mtk_gamma_set(struct device *dev, struct drm_crtc_st= ate *state) for (i =3D 0; i < gamma->data->lut_size; i++) { struct drm_color_lut diff, hwlut; =20 - hwlut.red =3D drm_color_lut_extract(lut[i].red, LUT_BITS_DEFAULT); - hwlut.green =3D drm_color_lut_extract(lut[i].green, LUT_BITS_DEFAULT); - hwlut.blue =3D drm_color_lut_extract(lut[i].blue, LUT_BITS_DEFAULT); + hwlut.red =3D drm_color_lut_extract(lut[i].red, gamma->data->lut_bits); + hwlut.green =3D drm_color_lut_extract(lut[i].green, gamma->data->lut_bit= s); + hwlut.blue =3D drm_color_lut_extract(lut[i].blue, gamma->data->lut_bits); =20 if (!gamma->data->lut_diff || (i % 2 =3D=3D 0)) { word =3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red); @@ -101,13 +102,13 @@ void mtk_gamma_set(struct device *dev, struct drm_crt= c_state *state) word |=3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue); } else { diff.red =3D lut[i].red - lut[i - 1].red; - diff.red =3D drm_color_lut_extract(diff.red, LUT_BITS_DEFAULT); + diff.red =3D drm_color_lut_extract(diff.red, gamma->data->lut_bits); =20 diff.green =3D lut[i].green - lut[i - 1].green; - diff.green =3D drm_color_lut_extract(diff.green, LUT_BITS_DEFAULT); + diff.green =3D drm_color_lut_extract(diff.green, gamma->data->lut_bits); =20 diff.blue =3D lut[i].blue - lut[i - 1].blue; - diff.blue =3D drm_color_lut_extract(diff.blue, LUT_BITS_DEFAULT); + diff.blue =3D drm_color_lut_extract(diff.blue, gamma->data->lut_bits); =20 word =3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red); word |=3D FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green); @@ -217,10 +218,12 @@ static int mtk_disp_gamma_remove(struct platform_devi= ce *pdev) =20 static const struct mtk_disp_gamma_data mt8173_gamma_driver_data =3D { .has_dither =3D true, + .lut_bits =3D 10, .lut_size =3D 512, }; =20 static const struct mtk_disp_gamma_data mt8183_gamma_driver_data =3D { + .lut_bits =3D 10, .lut_diff =3D true, .lut_size =3D 512, }; --=20 2.41.0