From nobody Thu Sep 11 14:52:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12F09C001DF for ; Fri, 4 Aug 2023 10:44:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231517AbjHDKoq (ORCPT ); Fri, 4 Aug 2023 06:44:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229634AbjHDKom (ORCPT ); Fri, 4 Aug 2023 06:44:42 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81A9E46BD for ; Fri, 4 Aug 2023 03:44:41 -0700 (PDT) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id AA6BE12E4; Fri, 4 Aug 2023 12:43:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1691145814; bh=3BEyrzp4IUiLGe9w3xtacn7Yy6nvFBbT4HOk9yd56NA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=FT+PbaJNlTpwZPIvNYkMtzEJmWRm4vJP236yMj3QUZ5O2XhBrzD1necB+dYoKY6wV GgcPIDSfVxczEKuGBNYKzjwoYx8NSdRYMdoWx9rrk5HHSEU41ytiL7PEcZ4gjeA4HR EmW3pd7FO9GnC2C/2q8CEM8l33wgvTTldB005cG0= From: Tomi Valkeinen Date: Fri, 04 Aug 2023 13:44:06 +0300 Subject: [PATCH 01/11] drm/bridge: tc358768: Fix use of uninitialized variable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230804-tc358768-v1-1-1afd44b7826b@ideasonboard.com> References: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> In-Reply-To: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Francesco Dolcini Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Aradhya Bhatia , Tomi Valkeinen X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=909; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=3BEyrzp4IUiLGe9w3xtacn7Yy6nvFBbT4HOk9yd56NA=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBkzNaRGYqdx9CLtWjNaw71yuxZ7twAVPL/kKywz 73jg/nITEyJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZMzWkQAKCRD6PaqMvJYe 9R/ED/0e1faduwhJY8SxU8fljAbFFDWdEBvarjI1D4D/CRcIKgRU7Mc2sn7RFbrHSOJrYeCYJWS h1pGjDdPvKmhw4njBLZefSGXAaSJTo8oI9ZOEwkbTuEcuFZaLaGwtCOJQGSlLMt0NJgv5LcKi3v u8QJOwmEkzwiANoErF84woZj5cIH22ZuCT/ZIt8KsaAfHR8N8DFNrslZkTFPEMnL3PWVS4NKlxI rTDp/nqU0G9GQUywOp2dQA7IupqBJJZXFh9anZ/yJNhKy58SuMb04Yo5JQjhZqTkMhrB4NTXctu 42hGy57/TkRT0dsm0h5XiK4/s+ldCDn0wjy+hWsbVe1R4NAmfJWdwVIMlrjVQuASMAOfitCwSsA Z4NOWBQjx5Vzo9oJuTos5mabMOGW9Ji6CpycTPPTfnTkLEu8bNlIFC09yOB7PSb0inUNAMaB2W3 BSntU0hS4MgAHptNXQFy5p+BGYUUnZ6P5Da2ByeWbH6/WOj2XgwWGPmchNY+RDoamePLay70lzU xvcdg94Te/QIi2sJTT2dyMoopwJfmQRBE6jTY+nAhw9XgU7LoId9YRffFHwUhPVguLSNGHKhoHX ouVb8j94cHFEMytHccOLohg70pvFxrgNIvcJd1BbMP1X8S2vzcUcC/6FjRoD+yfIP97Uvj0ZXN5 hOnOfe5OhhqfXMA== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org smatch reports: drivers/gpu/drm/bridge/tc358768.c:223 tc358768_update_bits() error: uniniti= alized symbol 'orig'. Fix this by bailing out from tc358768_update_bits() if the tc358768_read() produces an error. Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver") Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc3= 58768.c index 819a4b6ec2a0..bc97a837955b 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -216,6 +216,10 @@ static void tc358768_update_bits(struct tc358768_priv = *priv, u32 reg, u32 mask, u32 tmp, orig; =20 tc358768_read(priv, reg, &orig); + + if (priv->error) + return; + tmp =3D orig & ~mask; tmp |=3D val & mask; if (tmp !=3D orig) --=20 2.34.1 From nobody Thu Sep 11 14:52:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 525B7C04A94 for ; Fri, 4 Aug 2023 10:44:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231531AbjHDKou (ORCPT ); Fri, 4 Aug 2023 06:44:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46694 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231509AbjHDKoo (ORCPT ); Fri, 4 Aug 2023 06:44:44 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 43B1C46B5 for ; Fri, 4 Aug 2023 03:44:43 -0700 (PDT) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id B21ED188E; Fri, 4 Aug 2023 12:43:34 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1691145815; bh=rtp9mGXPYI+O3f2aQFTiJmta7zUghg7DuTpPSnMYVrU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ogHmPUfZs6vovAKVCrGMNPw6M8LeS3Z0RaiFNbFy2ICeJueV++UWVIJREG2oaD5Nc 5iRKFrToeFG0nM7TVHvkv0O1j8wga9YGP+2RqEQjwKPgfhvaWzKS+KlC0GWFQUQBFO I5qbvgZ0z97r+Dc29xy+53K6Rrb21foDNyMixXQM= From: Tomi Valkeinen Date: Fri, 04 Aug 2023 13:44:07 +0300 Subject: [PATCH 02/11] drm/bridge: tc358768: Fix bit updates MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230804-tc358768-v1-2-1afd44b7826b@ideasonboard.com> References: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> In-Reply-To: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Francesco Dolcini Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Aradhya Bhatia , Tomi Valkeinen X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1966; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=rtp9mGXPYI+O3f2aQFTiJmta7zUghg7DuTpPSnMYVrU=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBkzNaRHlppAaUlp8wmp8JUbwlcKbfRJpNDPjydH YYi+Al1AKWJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZMzWkQAKCRD6PaqMvJYe 9R8aD/91CxuRAWCF7MErsxmijuy+KAwtPMqSW0zBy2N6+cCaXwDex4qa57bXDMHnlvmo3h2kLYw VkoEqMtdAVe123Cxi7jJXLBTvV/4FmQNdl+oGMumHwf/HpXPo8htpApWiFrf8m+fybRVXQZ5lAo fOtFiuF319tJONUj5P4t3Y9/k3zsJPoXEgC8HdGt5xXf+HPTDUgQHU/0PDPQSP6y8wE0KmOQOdT UZ5NHK5MSFnchZZgqgZM6XP9Sq54GShRmgjf+iDajV85zHO77y2rvB0QGAXXaEYWM3nyHvvPv77 ptl/yPC/YwktitF95mwf9UALiB+VBA8YKok/qap9k0bIwclno/8JYwBsK2bfTKhN6q3ZhuZUyKW MGzFAQtnWb+agPRefMO1eiBJ4mMRY7Jp6NFLyWvRDxIY/fb356yzIBaX8g6JwjbQuarWrL/Xwxy INQPQ70R9YZRCyaKsEtoEXvb+zJ4BBuOwrXYEEkeyCxPYk/RKSzyee5LccSWhyqCf1BAWFaw134 PqBHf/bU8/SEy5jDNhyLGN1+xsPba4DP262HhsVhDJ67RwsVjk1Fbybtf/H1loICZ6e/Ow2PjR0 xxcjAwC97H936jk0jI9AThKf1Cbs7EmFnpo6yQl+RSdmCi6SCe4fRjZVwWxdkkfTJ2DenXxfpso xJMzgO12Zbn5/bA== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The driver has a few places where it does: if (thing_is_enabled_in_config) update_thing_bit_in_hw() This means that if the thing is _not_ enabled, the bit never gets cleared. This affects the h/vsyncs and continuous DSI clock bits. Fix the driver to always update the bit. Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver") Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc3= 58768.c index bc97a837955b..b668f77673c3 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -794,8 +794,8 @@ static void tc358768_bridge_pre_enable(struct drm_bridg= e *bridge) val |=3D BIT(i + 1); tc358768_write(priv, TC358768_HSTXVREGEN, val); =20 - if (!(mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)) - tc358768_write(priv, TC358768_TXOPTIONCNTRL, 0x1); + tc358768_write(priv, TC358768_TXOPTIONCNTRL, + (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? 0 : BIT(0)); =20 /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */ val =3D tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk * 4); @@ -861,11 +861,12 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) tc358768_write(priv, TC358768_DSI_HACT, hact); =20 /* VSYNC polarity */ - if (!(mode->flags & DRM_MODE_FLAG_NVSYNC)) - tc358768_update_bits(priv, TC358768_CONFCTL, BIT(5), BIT(5)); + tc358768_update_bits(priv, TC358768_CONFCTL, BIT(5), + (mode->flags & DRM_MODE_FLAG_PVSYNC) ? BIT(5) : 0); + /* HSYNC polarity */ - if (mode->flags & DRM_MODE_FLAG_PHSYNC) - tc358768_update_bits(priv, TC358768_PP_MISC, BIT(0), BIT(0)); + tc358768_update_bits(priv, TC358768_PP_MISC, BIT(0), + (mode->flags & DRM_MODE_FLAG_PHSYNC) ? BIT(0) : 0); =20 /* Start DSI Tx */ tc358768_write(priv, TC358768_DSI_START, 0x1); --=20 2.34.1 From nobody Thu Sep 11 14:52:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8247C001DF for ; Fri, 4 Aug 2023 10:44:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231528AbjHDKoy (ORCPT ); Fri, 4 Aug 2023 06:44:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231511AbjHDKoo (ORCPT ); Fri, 4 Aug 2023 06:44:44 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A7E4246BD for ; Fri, 4 Aug 2023 03:44:43 -0700 (PDT) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id B52AB1AB3; Fri, 4 Aug 2023 12:43:35 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1691145816; bh=TUkJXEdGx2L3x9eOO5C14gMRZFfjPUo5XB/iG7hSXNo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ZBKaogA8fDtPzUHgLJ47o74td6AxNRtTuZ0YDFbVcXz2cO8MWPFItGTgP+VyoU7Is X4J7VUL5w15BSA33yIKC0wCZ8j1l4YbXOLg5p/Z40rHSvW27t2RfRwjzkDSIz66qaw WPuVYrpiJMXWFd4/nib02sVqMUF+nwr07AYpCFBc= From: Tomi Valkeinen Date: Fri, 04 Aug 2023 13:44:08 +0300 Subject: [PATCH 03/11] drm/bridge: tc358768: Cleanup PLL calculations MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230804-tc358768-v1-3-1afd44b7826b@ideasonboard.com> References: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> In-Reply-To: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Francesco Dolcini Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Aradhya Bhatia , Tomi Valkeinen X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=2487; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=TUkJXEdGx2L3x9eOO5C14gMRZFfjPUo5XB/iG7hSXNo=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBkzNaRbMCh94UFjagognh3oJEUiI6qNt+gM+fzG Yv/rFC3ImWJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZMzWkQAKCRD6PaqMvJYe 9dNsD/0UNDVcvUORRAtGZiv2RIJjqZLr5U/45ualp74tfJ9OTV89JWa2IrNOMeHrsrJFISQ4LJs iAgOMgOAFINCQiCMeBPRJwCjaWBNr6Y3yWmUkIuHcGIpYpf2uq9QcgPHtI2fbGqrYRsNVK80Vn8 Qlb5BSltsktT4Y4TVlFFMnyNOSKQMd63cGKTY2oQgZKSkeD+MKC8AOJqUAqwEdD8SnmV7tdhifk oGrT3y4K+LlS88kACQyjmfqyn+plqzZ5O/Yd1a4/nD7kK3OKTgYDt0mE+fItq+c3uvbCvL6IiYm vxXmrSOqlPb4bFVYNlIjmchhY7TMq8rQabtnNv7ELvUNT+O2UGrMMY8eqlrF2CNqYZXc1Es2OJz AZ/YsJog7994aGwkE5kBGz2V02CXcnYTtISRgFClbKICbSENUaGMSNMO4XjvPWVlWVmMm5oS5N6 XCUzqIlciigPUo/msfredtN1E65XFdxwX0q6l99r48T+okcdI2Yf4CA2YgCpYevMxEoEN3rWXEt +J+PX/1D2OUhhuwutu8oQ9LGt2teasgouJtoMSkDmXtVrvY0Vim4VC4YPM1VScaQlwFEJBchczr pM2i2gJ045jjjyA8h1p/z4VPvSN29soY4lp96V64xoSDNYZKw/ogBTUidUpmInaJi81br24qAF5 +70lWAqiaoul+bw== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As is quite common, some of TC358768's PLL register fields are to be programmed with (value - 1). Specifically, the FBD and PRD, multiplier and divider, are such fields. However, what the driver currently does is that it considers that the formula used for PLL rate calculation is: RefClk * [(FBD + 1)/ (PRD + 1)] * [1 / (2^FRS)] where FBD and PRD are values directly from the registers, while a more sensible way to look at it is: RefClk * FBD / PRD * (1 / (2^FRS)) and when the FBD and PRD values are written to the registers, they will be subtracted by one. Change the driver accordingly, as it simplifies the PLL code. Signed-off-by: Tomi Valkeinen Reviewed-by: Peter Ujfalusi --- drivers/gpu/drm/bridge/tc358768.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc3= 58768.c index b668f77673c3..d5831a1236e9 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -316,7 +316,7 @@ static int tc358768_calc_pll(struct tc358768_priv *priv, =20 target_pll =3D tc358768_pclk_to_pll(priv, mode->clock * 1000); =20 - /* pll_clk =3D RefClk * [(FBD + 1)/ (PRD + 1)] * [1 / (2^FRS)] */ + /* pll_clk =3D RefClk * FBD / PRD * (1 / (2^FRS)) */ =20 for (i =3D 0; i < ARRAY_SIZE(frs_limits); i++) if (target_pll >=3D frs_limits[i]) @@ -336,19 +336,19 @@ static int tc358768_calc_pll(struct tc358768_priv *pr= iv, best_prd =3D 0; best_fbd =3D 0; =20 - for (prd =3D 0; prd < 16; ++prd) { - u32 divisor =3D (prd + 1) * (1 << frs); + for (prd =3D 1; prd <=3D 16; ++prd) { + u32 divisor =3D prd * (1 << frs); u32 fbd; =20 - for (fbd =3D 0; fbd < 512; ++fbd) { + for (fbd =3D 1; fbd <=3D 512; ++fbd) { u32 pll, diff, pll_in; =20 - pll =3D (u32)div_u64((u64)refclk * (fbd + 1), divisor); + pll =3D (u32)div_u64((u64)refclk * fbd, divisor); =20 if (pll >=3D max_pll || pll < min_pll) continue; =20 - pll_in =3D (u32)div_u64((u64)refclk, prd + 1); + pll_in =3D (u32)div_u64((u64)refclk, prd); if (pll_in < 4000000) continue; =20 @@ -611,7 +611,7 @@ static int tc358768_setup_pll(struct tc358768_priv *pri= v, mode->clock * 1000); =20 /* PRD[15:12] FBD[8:0] */ - tc358768_write(priv, TC358768_PLLCTL0, (prd << 12) | fbd); + tc358768_write(priv, TC358768_PLLCTL0, ((prd - 1) << 12) | (fbd - 1)); =20 /* FRS[11:10] LBWS[9:8] CKEN[4] RESETB[1] EN[0] */ tc358768_write(priv, TC358768_PLLCTL1, --=20 2.34.1 From nobody Thu Sep 11 14:52:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B350C04E69 for ; Fri, 4 Aug 2023 10:45:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231561AbjHDKpA (ORCPT ); Fri, 4 Aug 2023 06:45:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46702 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231508AbjHDKor (ORCPT ); Fri, 4 Aug 2023 06:44:47 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C601649C1 for ; Fri, 4 Aug 2023 03:44:45 -0700 (PDT) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id BB74A1BAD; Fri, 4 Aug 2023 12:43:36 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1691145817; bh=WCGNIXcGcdl4nJn+dx6lcBvQUFqQ55HfWTEz54MJwVw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=MK2AtVNhVEBgVjSDGNhmtoZ8KjiMA7AiCJPz9eFTXEgyi/l/jOP1Xr0NxtJt+0tG2 pAvOj33+r1KziwPiPQQCFQMuuJlEIgDrtRmf4kGlif2+edjN7lMNI8F2byBb5YOBpz ARyojtie+6BJmGYmYGX1nnJFb31zDaJJN00kqXNE= From: Tomi Valkeinen Date: Fri, 04 Aug 2023 13:44:09 +0300 Subject: [PATCH 04/11] drm/bridge: tc358768: Use struct videomode MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230804-tc358768-v1-4-1afd44b7826b@ideasonboard.com> References: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> In-Reply-To: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Francesco Dolcini Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Aradhya Bhatia , Tomi Valkeinen X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=4738; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=WCGNIXcGcdl4nJn+dx6lcBvQUFqQ55HfWTEz54MJwVw=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBkzNaSZtaCZTUTMK2vRUk8BC+9py3CA7QFWEyvh Y2y2pe7w6SJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZMzWkgAKCRD6PaqMvJYe 9XRpEACGSSmoQ7fJZ7Gv5yX/hogaE80D+3dt7+5wRL8c09/59O0sLcAYQTFnlL2l7ttC0MxNbqy 8WJISu1ptKdyhP3Q+fEVqRQL9O51QsUvAkcXqjaQvH2suLpAqvtU2k1HXlYtn8yCOjSb5phtJUZ mtqzns7g5Zl2ac0J2AMx5N9M4TmiH3V9uAE82vhsq2Xul1KH/7xG5/lGaBuqQ114s3mO+WhTrxT Ump8ZuZ80MymE21vsEyaOW5J4D7C9okUWx+5+lU+w2k5epzv0nvnCCeSAyN6Jg8/qfkqllJjmlP cdcQKqD866RWsjBSIW1zS6jr7zO72SaX1zuG1GlWL3fZguYP8yod/VyhJi4ZvsNv3/pnWBCwApw ADf3zxu8h4E4xGZOcEhI6Hbq3P7DtPaqbGIjFBnJsyITVKEI/Ei5CTjh4zCzNGsd+cAD554qWiH SdHoHnbu6wSC1Vji9nQEj7wT/ZOzUPLaw7Vi2FB5prx49Me/pzGKjgdLIFsQM+kkC/ftW4JqDRj wiAcdNOgMqlplu5Wgyg3qM9C/WfqBo4WAEeqaGwDyzY094X0i0idqNVmTb5ol9lXCZJyw9z4OPd 4J70tJdjBFzhce+Xnv7U6AyLorhfekJdG6KbQcYFTSEJfx9JS7R8/DZImww12wITt6UZl/lzHDV CFp04MYkSYpJuRA== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The TC358768 documentation uses HFP, HBP, etc. values to deal with the video mode, while the driver currently uses the DRM display mode (htotal, hsync_start, etc). Change the driver to convert the DRM display mode to struct videomode, which then allows us to use the same units the documentation uses. This makes it much easier to work on the code when using the TC358768 documentation as a reference. Signed-off-by: Tomi Valkeinen Reviewed-by: Peter Ujfalusi --- drivers/gpu/drm/bridge/tc358768.c | 45 +++++++++++++++++++++--------------= ---- 1 file changed, 24 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc3= 58768.c index d5831a1236e9..9b633038af33 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -650,6 +650,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridg= e *bridge) u32 dsiclk, dsibclk, video_start; const u32 internal_delay =3D 40; int ret, i; + struct videomode vm; =20 if (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { dev_warn_once(priv->dev, "Non-continuous mode unimplemented, falling bac= k to continuous\n"); @@ -673,6 +674,8 @@ static void tc358768_bridge_pre_enable(struct drm_bridg= e *bridge) return; } =20 + drm_display_mode_to_videomode(mode, &vm); + dsiclk =3D priv->dsiclk; dsibclk =3D dsiclk / 4; =20 @@ -681,28 +684,28 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) switch (dsi_dev->format) { case MIPI_DSI_FMT_RGB888: val |=3D (0x3 << 4); - hact =3D mode->hdisplay * 3; - video_start =3D (mode->htotal - mode->hsync_start) * 3; + hact =3D vm.hactive * 3; + video_start =3D (vm.hsync_len + vm.hback_porch) * 3; data_type =3D MIPI_DSI_PACKED_PIXEL_STREAM_24; break; case MIPI_DSI_FMT_RGB666: val |=3D (0x4 << 4); - hact =3D mode->hdisplay * 3; - video_start =3D (mode->htotal - mode->hsync_start) * 3; + hact =3D vm.hactive * 3; + video_start =3D (vm.hsync_len + vm.hback_porch) * 3; data_type =3D MIPI_DSI_PACKED_PIXEL_STREAM_18; break; =20 case MIPI_DSI_FMT_RGB666_PACKED: val |=3D (0x4 << 4) | BIT(3); - hact =3D mode->hdisplay * 18 / 8; - video_start =3D (mode->htotal - mode->hsync_start) * 18 / 8; + hact =3D vm.hactive * 18 / 8; + video_start =3D (vm.hsync_len + vm.hback_porch) * 18 / 8; data_type =3D MIPI_DSI_PIXEL_STREAM_3BYTE_18; break; =20 case MIPI_DSI_FMT_RGB565: val |=3D (0x5 << 4); - hact =3D mode->hdisplay * 2; - video_start =3D (mode->htotal - mode->hsync_start) * 2; + hact =3D vm.hactive * 2; + video_start =3D (vm.hsync_len + vm.hback_porch) * 2; data_type =3D MIPI_DSI_PACKED_PIXEL_STREAM_16; break; default: @@ -814,43 +817,43 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) tc358768_write(priv, TC358768_DSI_EVENT, 0); =20 /* vact */ - tc358768_write(priv, TC358768_DSI_VACT, mode->vdisplay); + tc358768_write(priv, TC358768_DSI_VACT, vm.vactive); =20 /* vsw */ - tc358768_write(priv, TC358768_DSI_VSW, - mode->vsync_end - mode->vsync_start); + tc358768_write(priv, TC358768_DSI_VSW, vm.vsync_len); + /* vbp */ - tc358768_write(priv, TC358768_DSI_VBPR, - mode->vtotal - mode->vsync_end); + tc358768_write(priv, TC358768_DSI_VBPR, vm.vback_porch); =20 /* hsw * byteclk * ndl / pclk */ - val =3D (u32)div_u64((mode->hsync_end - mode->hsync_start) * + val =3D (u32)div_u64(vm.hsync_len * ((u64)priv->dsiclk / 4) * priv->dsi_lanes, - mode->clock * 1000); + vm.pixelclock); tc358768_write(priv, TC358768_DSI_HSW, val); =20 /* hbp * byteclk * ndl / pclk */ - val =3D (u32)div_u64((mode->htotal - mode->hsync_end) * + val =3D (u32)div_u64(vm.hback_porch * ((u64)priv->dsiclk / 4) * priv->dsi_lanes, - mode->clock * 1000); + vm.pixelclock); tc358768_write(priv, TC358768_DSI_HBPR, val); } else { /* Set event mode */ tc358768_write(priv, TC358768_DSI_EVENT, 1); =20 /* vact */ - tc358768_write(priv, TC358768_DSI_VACT, mode->vdisplay); + tc358768_write(priv, TC358768_DSI_VACT, vm.vactive); =20 /* vsw (+ vbp) */ tc358768_write(priv, TC358768_DSI_VSW, - mode->vtotal - mode->vsync_start); + vm.vsync_len + vm.vback_porch); + /* vbp (not used in event mode) */ tc358768_write(priv, TC358768_DSI_VBPR, 0); =20 /* (hsw + hbp) * byteclk * ndl / pclk */ - val =3D (u32)div_u64((mode->htotal - mode->hsync_start) * + val =3D (u32)div_u64((vm.hsync_len + vm.hback_porch) * ((u64)priv->dsiclk / 4) * priv->dsi_lanes, - mode->clock * 1000); + vm.pixelclock); tc358768_write(priv, TC358768_DSI_HSW, val); =20 /* hbp (not used in event mode) */ --=20 2.34.1 From nobody Thu Sep 11 14:52:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B712C04A94 for ; Fri, 4 Aug 2023 10:45:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231577AbjHDKpC (ORCPT ); Fri, 4 Aug 2023 06:45:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46724 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231518AbjHDKor (ORCPT ); Fri, 4 Aug 2023 06:44:47 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E67546BD for ; Fri, 4 Aug 2023 03:44:46 -0700 (PDT) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id C0E1E1BAE; Fri, 4 Aug 2023 12:43:37 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1691145818; bh=VL2Zw7Ueb46o20OnyXzo7UsNsItrGawjFD5subpRhLA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=u4ULlL7tvxIKpOUx0VJO+MVbnfZrDOfOYTnlihOhFO8TLNvLS2KO/yUsNHy+OBkxJ QwM7FLJRxjgHAbzy+0V6M5tH53AzKpi2jGaUpB1jvHnbnLv8FEVznyEnbwPVX0ilQn Ssii+EpwteLN6FRajzPbcTNJ76hVn4cuxdA0EWXI= From: Tomi Valkeinen Date: Fri, 04 Aug 2023 13:44:10 +0300 Subject: [PATCH 05/11] drm/bridge: tc358768: Print logical values, not raw register values MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230804-tc358768-v1-5-1afd44b7826b@ideasonboard.com> References: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> In-Reply-To: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Francesco Dolcini Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Aradhya Bhatia , Tomi Valkeinen X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=4161; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=VL2Zw7Ueb46o20OnyXzo7UsNsItrGawjFD5subpRhLA=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBkzNaS4UeqJCGOhxjM1pf6s/5aVvSD48+u23FYF z4/mHBK/+uJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZMzWkgAKCRD6PaqMvJYe 9T2RD/0YwlqUpyhFktnI4J/zqdVjHTNjyt/hhVrv7zBqKOlX8+ZReohrJ0sZpZrjyZSv4/tTr/Y Zy5PXtHTEbGDeOFMXz3XU5HUef7+E2OPuwRUVgDT+ATsVsQNC5LFPwJWsLifRFfYjm1/SY0NM/T oA64T3LV4LxWUrt/8NU5wAje4EzTdmd0OZ6ZY2L4xobZ4irxFaBqRBFNk/fmcPgw8twucBBPRZv pCy9bJSXEQ9kgMNMrJSlPyw4GMGavR9DpazR3KfIWbGwBEGDr2iVgDrRJVBdHl3X37bzJvkGgm8 lNTymEtfWemDw93TLBblbaQqPI0pSHYrItEaUVEHmbIHaybKpkWqg4iAetEVbEhkYbgJt/N40Bc 5Kv1RQQJq0Xme3ZZ0eJ6a04/fKfM8u9LSuJCABhI0YT6KCEIZwepYeX1XICC8F3YLCznzd7mAI1 YmRzUs9OE17GNmacEXdkR7F2Fg7oQ9hJ8Yyyvfz29KA23+BpAwyqUOfwFsfFR0dGRPY+b4HFJOF yQF1hTSCwoCphmDZkdUvuNlTy8dERNwHHa+/44hZMd4aFIhYy07sxHW/BiXeAlHSD1oN6QMLgyg AT/VIf25BsW1z3OuQHP6DQIDP++dlvmFzm4TJZj9EvBVJUazGRVgoI3Xa2pf5ycylS28mX4ZjCL 5Jxd0QW8KowqPGw== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The driver debug prints DSI related timings as raw register values in hex. It is much more useful to see the "logical" value of the timing, not the register value. Change the prints to print the values separately, in case a single register contains multiple values, and use %u to have it in a more human consumable form. Signed-off-by: Tomi Valkeinen Reviewed-by: Peter Ujfalusi --- drivers/gpu/drm/bridge/tc358768.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc3= 58768.c index 9b633038af33..0ef51d04bb21 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -739,57 +739,59 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) =20 /* LP11 > 100us for D-PHY Rx Init */ val =3D tc358768_ns_to_cnt(100 * 1000, dsibclk_nsk) - 1; - dev_dbg(priv->dev, "LINEINITCNT: 0x%x\n", val); + dev_dbg(priv->dev, "LINEINITCNT: %u\n", val); tc358768_write(priv, TC358768_LINEINITCNT, val); =20 /* LPTimeCnt > 50ns */ val =3D tc358768_ns_to_cnt(50, dsibclk_nsk) - 1; lptxcnt =3D val; - dev_dbg(priv->dev, "LPTXTIMECNT: 0x%x\n", val); + dev_dbg(priv->dev, "LPTXTIMECNT: %u\n", val); tc358768_write(priv, TC358768_LPTXTIMECNT, val); =20 /* 38ns < TCLK_PREPARE < 95ns */ val =3D tc358768_ns_to_cnt(65, dsibclk_nsk) - 1; + dev_dbg(priv->dev, "TCLK_PREPARECNT %u\n", val); /* TCLK_PREPARE + TCLK_ZERO > 300ns */ val2 =3D tc358768_ns_to_cnt(300 - tc358768_to_ns(2 * ui_nsk), dsibclk_nsk) - 2; + dev_dbg(priv->dev, "TCLK_ZEROCNT %u\n", val2); val |=3D val2 << 8; - dev_dbg(priv->dev, "TCLK_HEADERCNT: 0x%x\n", val); tc358768_write(priv, TC358768_TCLK_HEADERCNT, val); =20 /* TCLK_TRAIL > 60ns AND TEOT <=3D 105 ns + 12*UI */ raw_val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), dsibclk_n= sk) - 5; val =3D clamp(raw_val, 0, 127); - dev_dbg(priv->dev, "TCLK_TRAILCNT: 0x%x\n", val); + dev_dbg(priv->dev, "TCLK_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_TRAILCNT, val); =20 /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */ val =3D 50 + tc358768_to_ns(4 * ui_nsk); val =3D tc358768_ns_to_cnt(val, dsibclk_nsk) - 1; + dev_dbg(priv->dev, "THS_PREPARECNT %u\n", val); /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */ raw_val =3D tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), dsibclk_= nsk) - 10; val2 =3D clamp(raw_val, 0, 127); + dev_dbg(priv->dev, "THS_ZEROCNT %u\n", val2); val |=3D val2 << 8; - dev_dbg(priv->dev, "THS_HEADERCNT: 0x%x\n", val); tc358768_write(priv, TC358768_THS_HEADERCNT, val); =20 /* TWAKEUP > 1ms in lptxcnt steps */ val =3D tc358768_ns_to_cnt(1020000, dsibclk_nsk); val =3D val / (lptxcnt + 1) - 1; - dev_dbg(priv->dev, "TWAKEUP: 0x%x\n", val); + dev_dbg(priv->dev, "TWAKEUP: %u\n", val); tc358768_write(priv, TC358768_TWAKEUP, val); =20 /* TCLK_POSTCNT > 60ns + 52*UI */ val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(52 * ui_nsk), dsibclk_nsk) - 3; - dev_dbg(priv->dev, "TCLK_POSTCNT: 0x%x\n", val); + dev_dbg(priv->dev, "TCLK_POSTCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_POSTCNT, val); =20 /* max(60ns + 4*UI, 8*UI) < THS_TRAILCNT < 105ns + 12*UI */ raw_val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(18 * ui_nsk), dsibclk_nsk) - 4; val =3D clamp(raw_val, 0, 15); - dev_dbg(priv->dev, "THS_TRAILCNT: 0x%x\n", val); + dev_dbg(priv->dev, "THS_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_THS_TRAILCNT, val); =20 val =3D BIT(0); @@ -803,10 +805,11 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */ val =3D tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk * 4); val =3D tc358768_ns_to_cnt(val, dsibclk_nsk) / 4 - 1; + dev_dbg(priv->dev, "TXTAGOCNT: %u\n", val); val2 =3D tc358768_ns_to_cnt(tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk), dsibclk_nsk) - 2; + dev_dbg(priv->dev, "RXTASURECNT: %u\n", val2); val =3D val << 16 | val2; - dev_dbg(priv->dev, "BTACNTRL1: 0x%x\n", val); tc358768_write(priv, TC358768_BTACNTRL1, val); =20 /* START[0] */ --=20 2.34.1 From nobody Thu Sep 11 14:52:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48B4EC001DF for ; Fri, 4 Aug 2023 10:45:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231590AbjHDKpJ (ORCPT ); Fri, 4 Aug 2023 06:45:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46702 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231533AbjHDKou (ORCPT ); Fri, 4 Aug 2023 06:44:50 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4582349CB for ; Fri, 4 Aug 2023 03:44:48 -0700 (PDT) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id CA8792E4; Fri, 4 Aug 2023 12:43:38 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1691145819; bh=TDI9Cw23pqxLneDtSVZkuUlDvO2vp0pomzNNIvZxHCc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=tDBX70oTEiRrV57weoEqw73RKdubUeomLY50iaZDIUuYnD5fIK3tLhuZkcYvfvZOR LjDa3/d8fQzia7oUxEoCr/vLv83a1b47XMOBrcLkUdqHnzr67jj8hrJzzBke2LXibu teQ4GbumgqhQAr+mJXL03vAXFhP9YLYaHlV6l1Pc= From: Tomi Valkeinen Date: Fri, 04 Aug 2023 13:44:11 +0300 Subject: [PATCH 06/11] drm/bridge: tc358768: Use dev for dbg prints, not priv->dev MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230804-tc358768-v1-6-1afd44b7826b@ideasonboard.com> References: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> In-Reply-To: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Francesco Dolcini Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Aradhya Bhatia , Tomi Valkeinen X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=6214; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=TDI9Cw23pqxLneDtSVZkuUlDvO2vp0pomzNNIvZxHCc=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBkzNaSpke1QciS+X445m7BNs2NHAURVJkC9xUl7 bvewAkTfvWJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZMzWkgAKCRD6PaqMvJYe 9QBQD/94UvRBDpwfWCu6SsfgrgZxRQgWwFWY/1TYnp28tDiRs1sGvVRNGBHXYBepsXysFxqUQtA RJmM/kTxIEyJVO9GWOeSO3vh2auPQl2RQrt4pe7m7mk49HOXhv0u/EM8zOgFNK7H382WZ1DFrgI fx2NKN2/UhTSN7pUK0In2jnEhMHMetgwj95iDJN0iJDsoEwWcu1wVEOHO38ATHCNoeJ7WKb+2Nb I83bfG6mai2Pf/v9QGKnOj/Kpj6K6PoRW3P8IiySzJxDOM6pe26k1SsrgD+Oy69yOUe6ZLiDZfu 9AwhfJwwYnczDF9S5Ugj+P1LenHkx7kbp6VbvRO7wiyFcXGi0oo/RLr7SGCvz53jul6/jswHyPv +LA/6jkdYsqDM0YZICZZyygFbq9REbOF3f3RvVI9B9pnnxW9GO7r7ADK1vVEEZtHjVc1X02f8TD iTGqA6sYD26WRgtfvdMVx73Hsk7ia2AU/kHKUQBMmDQwXeoLgUOl63icr6AUzLnDsRax+G+R6gJ AmTzLxuE5zqPBAkqqNnMX0EZaaTkqVnpLqKBU2bB7rra/dr1JIUMo3CkE/j9TGxtJwFTmmwyZ5Y IIgYpWUa7s18O0HEgWJ1eg8ZwijhrwF54a/RD/Aopw+ioXebY6xJTNU0gteQ4bnXkcpDzx8i9jQ MGdpV22P8tTuPKQ== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Simplify the code by capturing the priv->dev value to dev variable, and use it. Signed-off-by: Tomi Valkeinen Reviewed-by: Peter Ujfalusi --- drivers/gpu/drm/bridge/tc358768.c | 41 ++++++++++++++++++++---------------= ---- 1 file changed, 21 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc3= 58768.c index 0ef51d04bb21..3266c08d9bf1 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -651,9 +651,10 @@ static void tc358768_bridge_pre_enable(struct drm_brid= ge *bridge) const u32 internal_delay =3D 40; int ret, i; struct videomode vm; + struct device *dev =3D priv->dev; =20 if (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { - dev_warn_once(priv->dev, "Non-continuous mode unimplemented, falling bac= k to continuous\n"); + dev_warn_once(dev, "Non-continuous mode unimplemented, falling back to c= ontinuous\n"); mode_flags &=3D ~MIPI_DSI_CLOCK_NON_CONTINUOUS; } =20 @@ -661,7 +662,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridg= e *bridge) =20 ret =3D tc358768_sw_reset(priv); if (ret) { - dev_err(priv->dev, "Software reset failed: %d\n", ret); + dev_err(dev, "Software reset failed: %d\n", ret); tc358768_hw_disable(priv); return; } @@ -669,7 +670,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridg= e *bridge) mode =3D &bridge->encoder->crtc->state->adjusted_mode; ret =3D tc358768_setup_pll(priv, mode); if (ret) { - dev_err(priv->dev, "PLL setup failed: %d\n", ret); + dev_err(dev, "PLL setup failed: %d\n", ret); tc358768_hw_disable(priv); return; } @@ -709,7 +710,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridg= e *bridge) data_type =3D MIPI_DSI_PACKED_PIXEL_STREAM_16; break; default: - dev_err(priv->dev, "Invalid data format (%u)\n", + dev_err(dev, "Invalid data format (%u)\n", dsi_dev->format); tc358768_hw_disable(priv); return; @@ -733,65 +734,65 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) dsibclk); dsiclk_nsk =3D (u32)div_u64((u64)1000000000 * TC358768_PRECISION, dsiclk); ui_nsk =3D dsiclk_nsk / 2; - dev_dbg(priv->dev, "dsiclk_nsk: %u\n", dsiclk_nsk); - dev_dbg(priv->dev, "ui_nsk: %u\n", ui_nsk); - dev_dbg(priv->dev, "dsibclk_nsk: %u\n", dsibclk_nsk); + dev_dbg(dev, "dsiclk_nsk: %u\n", dsiclk_nsk); + dev_dbg(dev, "ui_nsk: %u\n", ui_nsk); + dev_dbg(dev, "dsibclk_nsk: %u\n", dsibclk_nsk); =20 /* LP11 > 100us for D-PHY Rx Init */ val =3D tc358768_ns_to_cnt(100 * 1000, dsibclk_nsk) - 1; - dev_dbg(priv->dev, "LINEINITCNT: %u\n", val); + dev_dbg(dev, "LINEINITCNT: %u\n", val); tc358768_write(priv, TC358768_LINEINITCNT, val); =20 /* LPTimeCnt > 50ns */ val =3D tc358768_ns_to_cnt(50, dsibclk_nsk) - 1; lptxcnt =3D val; - dev_dbg(priv->dev, "LPTXTIMECNT: %u\n", val); + dev_dbg(dev, "LPTXTIMECNT: %u\n", val); tc358768_write(priv, TC358768_LPTXTIMECNT, val); =20 /* 38ns < TCLK_PREPARE < 95ns */ val =3D tc358768_ns_to_cnt(65, dsibclk_nsk) - 1; - dev_dbg(priv->dev, "TCLK_PREPARECNT %u\n", val); + dev_dbg(dev, "TCLK_PREPARECNT %u\n", val); /* TCLK_PREPARE + TCLK_ZERO > 300ns */ val2 =3D tc358768_ns_to_cnt(300 - tc358768_to_ns(2 * ui_nsk), dsibclk_nsk) - 2; - dev_dbg(priv->dev, "TCLK_ZEROCNT %u\n", val2); + dev_dbg(dev, "TCLK_ZEROCNT %u\n", val2); val |=3D val2 << 8; tc358768_write(priv, TC358768_TCLK_HEADERCNT, val); =20 /* TCLK_TRAIL > 60ns AND TEOT <=3D 105 ns + 12*UI */ raw_val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), dsibclk_n= sk) - 5; val =3D clamp(raw_val, 0, 127); - dev_dbg(priv->dev, "TCLK_TRAILCNT: %u\n", val); + dev_dbg(dev, "TCLK_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_TRAILCNT, val); =20 /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */ val =3D 50 + tc358768_to_ns(4 * ui_nsk); val =3D tc358768_ns_to_cnt(val, dsibclk_nsk) - 1; - dev_dbg(priv->dev, "THS_PREPARECNT %u\n", val); + dev_dbg(dev, "THS_PREPARECNT %u\n", val); /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */ raw_val =3D tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), dsibclk_= nsk) - 10; val2 =3D clamp(raw_val, 0, 127); - dev_dbg(priv->dev, "THS_ZEROCNT %u\n", val2); + dev_dbg(dev, "THS_ZEROCNT %u\n", val2); val |=3D val2 << 8; tc358768_write(priv, TC358768_THS_HEADERCNT, val); =20 /* TWAKEUP > 1ms in lptxcnt steps */ val =3D tc358768_ns_to_cnt(1020000, dsibclk_nsk); val =3D val / (lptxcnt + 1) - 1; - dev_dbg(priv->dev, "TWAKEUP: %u\n", val); + dev_dbg(dev, "TWAKEUP: %u\n", val); tc358768_write(priv, TC358768_TWAKEUP, val); =20 /* TCLK_POSTCNT > 60ns + 52*UI */ val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(52 * ui_nsk), dsibclk_nsk) - 3; - dev_dbg(priv->dev, "TCLK_POSTCNT: %u\n", val); + dev_dbg(dev, "TCLK_POSTCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_POSTCNT, val); =20 /* max(60ns + 4*UI, 8*UI) < THS_TRAILCNT < 105ns + 12*UI */ raw_val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(18 * ui_nsk), dsibclk_nsk) - 4; val =3D clamp(raw_val, 0, 15); - dev_dbg(priv->dev, "THS_TRAILCNT: %u\n", val); + dev_dbg(dev, "THS_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_THS_TRAILCNT, val); =20 val =3D BIT(0); @@ -805,10 +806,10 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */ val =3D tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk * 4); val =3D tc358768_ns_to_cnt(val, dsibclk_nsk) / 4 - 1; - dev_dbg(priv->dev, "TXTAGOCNT: %u\n", val); + dev_dbg(dev, "TXTAGOCNT: %u\n", val); val2 =3D tc358768_ns_to_cnt(tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk), dsibclk_nsk) - 2; - dev_dbg(priv->dev, "RXTASURECNT: %u\n", val2); + dev_dbg(dev, "RXTASURECNT: %u\n", val2); val =3D val << 16 | val2; tc358768_write(priv, TC358768_BTACNTRL1, val); =20 @@ -902,7 +903,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridg= e *bridge) =20 ret =3D tc358768_clear_error(priv); if (ret) { - dev_err(priv->dev, "Bridge pre_enable failed: %d\n", ret); + dev_err(dev, "Bridge pre_enable failed: %d\n", ret); tc358768_bridge_disable(bridge); tc358768_bridge_post_disable(bridge); } --=20 2.34.1 From nobody Thu Sep 11 14:52:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0249C00528 for ; Fri, 4 Aug 2023 10:45:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230303AbjHDKpL (ORCPT ); Fri, 4 Aug 2023 06:45:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231535AbjHDKou (ORCPT ); Fri, 4 Aug 2023 06:44:50 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D12B49D6 for ; Fri, 4 Aug 2023 03:44:48 -0700 (PDT) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id E3F1712E4; Fri, 4 Aug 2023 12:43:39 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1691145820; bh=Z33kVdpZefR4T4jHN2TcfkOhn6sG3FUQswblV1pZ7fI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=cHtA/ikZSPUMXiwKutlgFnMOpC173aa8kIGA7QGqxZWegVQrNwVgb+rLmcGoWFh6e /Koa9D0GSfLAmyYFBNreiQSM5dPf1UriZWvUR4/uYoxVa7tVxvIH8pCtnnVb+rUyqj mV3ZXe9BNoyfVdV26Ha+7WzexlSkx8G/j3kbJeHg= From: Tomi Valkeinen Date: Fri, 04 Aug 2023 13:44:12 +0300 Subject: [PATCH 07/11] drm/bridge: tc358768: Rename dsibclk to hsbyteclk MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230804-tc358768-v1-7-1afd44b7826b@ideasonboard.com> References: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> In-Reply-To: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Francesco Dolcini Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Aradhya Bhatia , Tomi Valkeinen X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=7306; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=Z33kVdpZefR4T4jHN2TcfkOhn6sG3FUQswblV1pZ7fI=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBkzNaThNg+d7lEAoswYIxJMzYYMiMGqrtH+deZe fIT6teBN1mJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZMzWkwAKCRD6PaqMvJYe 9Q4eD/wI506iloc5UhJvk5OJX1jmdwK7cTpLn7Rl8obueJ4FAbsfHnS2cYsc70qrzIRaH1qtvSm RMmnrKekU1DMZqprAnFJDV39AJVP7ln5+Ol7Wd6k9bIiyNRqS4PEBBH9Jrnbo9og3h0sf5CewTN JHQ0dM3kH5eIYwpOC7MBw1Q2kt1ZFo1hWgF6FskssU1hdQrv357ENlmJtTI2twPRzvglOkeWrcy 6Mp1yzvQSWF/p2sifDIm9TqnLUeWrtFFGKIRW7m4/rg4NUVVWHtb9ONNZ5f9UZnZznnFLEwsOij Wlx6fbeRyKksqz2a7OCXocC89wGyi++qHPZz14+Nm8ncqWOCqbhRJF7SlngT2NUnFqaA0TG/U4b L3gyJPx0zICHxfxSM8lqJfnEoHJpxyXQtNgNBZg5PUPMM7xsbF+pBghhyK/+JfNNPh8d9M667Nq fJdyD8p7Co16zlZozEtp+tJFojf+5+LML37UnExQVrbKjHldszLGFnBwIwk/fLKW6Fnx+WFvWVl or4nZNxzAMScOOAArPQxhuiM7VAGhecI375JfZsnTsvULBTGtj0EUUQ2cmeSm9YjyATgqgnr+tg 8cSCSYdb039A5aSZd7bMbAP6+w3ZrccuOaqTEfywUOc1NW/YPvNn8tfsAGMidfVcYY3MMr/0TXd Ud8Hhb1X61zlSWQ== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Toshiba documentation talks about HSByteClk when referring to the DSI HS byte clock, whereas the driver uses 'dsibclk' name. Also, in a few places the driver calculates the byte clock from the DSI clock, even if the byte clock is already available in a variable. To align the driver with the documentation, change the 'dsibclk' variable to 'hsbyteclk'. This also make it easier to visually separate 'dsibclk' and 'dsiclk' variables. Signed-off-by: Tomi Valkeinen Reviewed-by: Peter Ujfalusi --- drivers/gpu/drm/bridge/tc358768.c | 48 +++++++++++++++++++----------------= ---- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc3= 58768.c index 3266c08d9bf1..db45b4a982c0 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -604,7 +604,7 @@ static int tc358768_setup_pll(struct tc358768_priv *pri= v, =20 dev_dbg(priv->dev, "PLL: refclk %lu, fbd %u, prd %u, frs %u\n", clk_get_rate(priv->refclk), fbd, prd, frs); - dev_dbg(priv->dev, "PLL: pll_clk: %u, DSIClk %u, DSIByteClk %u\n", + dev_dbg(priv->dev, "PLL: pll_clk: %u, DSIClk %u, HSByteClk %u\n", priv->dsiclk * 2, priv->dsiclk, priv->dsiclk / 4); dev_dbg(priv->dev, "PLL: pclk %u (panel: %u)\n", tc358768_pll_to_pclk(priv, priv->dsiclk * 2), @@ -646,8 +646,8 @@ static void tc358768_bridge_pre_enable(struct drm_bridg= e *bridge) u32 val, val2, lptxcnt, hact, data_type; s32 raw_val; const struct drm_display_mode *mode; - u32 dsibclk_nsk, dsiclk_nsk, ui_nsk; - u32 dsiclk, dsibclk, video_start; + u32 hsbyteclk_nsk, dsiclk_nsk, ui_nsk; + u32 dsiclk, hsbyteclk, video_start; const u32 internal_delay =3D 40; int ret, i; struct videomode vm; @@ -678,7 +678,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridg= e *bridge) drm_display_mode_to_videomode(mode, &vm); =20 dsiclk =3D priv->dsiclk; - dsibclk =3D dsiclk / 4; + hsbyteclk =3D dsiclk / 4; =20 /* Data Format Control Register */ val =3D BIT(2) | BIT(1) | BIT(0); /* rdswap_en | dsitx_en | txdt_en */ @@ -730,67 +730,67 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) tc358768_write(priv, TC358768_D0W_CNTRL + i * 4, 0x0000); =20 /* DSI Timings */ - dsibclk_nsk =3D (u32)div_u64((u64)1000000000 * TC358768_PRECISION, - dsibclk); + hsbyteclk_nsk =3D (u32)div_u64((u64)1000000000 * TC358768_PRECISION, + hsbyteclk); dsiclk_nsk =3D (u32)div_u64((u64)1000000000 * TC358768_PRECISION, dsiclk); ui_nsk =3D dsiclk_nsk / 2; dev_dbg(dev, "dsiclk_nsk: %u\n", dsiclk_nsk); dev_dbg(dev, "ui_nsk: %u\n", ui_nsk); - dev_dbg(dev, "dsibclk_nsk: %u\n", dsibclk_nsk); + dev_dbg(dev, "hsbyteclk_nsk: %u\n", hsbyteclk_nsk); =20 /* LP11 > 100us for D-PHY Rx Init */ - val =3D tc358768_ns_to_cnt(100 * 1000, dsibclk_nsk) - 1; + val =3D tc358768_ns_to_cnt(100 * 1000, hsbyteclk_nsk) - 1; dev_dbg(dev, "LINEINITCNT: %u\n", val); tc358768_write(priv, TC358768_LINEINITCNT, val); =20 /* LPTimeCnt > 50ns */ - val =3D tc358768_ns_to_cnt(50, dsibclk_nsk) - 1; + val =3D tc358768_ns_to_cnt(50, hsbyteclk_nsk) - 1; lptxcnt =3D val; dev_dbg(dev, "LPTXTIMECNT: %u\n", val); tc358768_write(priv, TC358768_LPTXTIMECNT, val); =20 /* 38ns < TCLK_PREPARE < 95ns */ - val =3D tc358768_ns_to_cnt(65, dsibclk_nsk) - 1; + val =3D tc358768_ns_to_cnt(65, hsbyteclk_nsk) - 1; dev_dbg(dev, "TCLK_PREPARECNT %u\n", val); /* TCLK_PREPARE + TCLK_ZERO > 300ns */ val2 =3D tc358768_ns_to_cnt(300 - tc358768_to_ns(2 * ui_nsk), - dsibclk_nsk) - 2; + hsbyteclk_nsk) - 2; dev_dbg(dev, "TCLK_ZEROCNT %u\n", val2); val |=3D val2 << 8; tc358768_write(priv, TC358768_TCLK_HEADERCNT, val); =20 /* TCLK_TRAIL > 60ns AND TEOT <=3D 105 ns + 12*UI */ - raw_val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), dsibclk_n= sk) - 5; + raw_val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), hsbyteclk= _nsk) - 5; val =3D clamp(raw_val, 0, 127); dev_dbg(dev, "TCLK_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_TRAILCNT, val); =20 /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */ val =3D 50 + tc358768_to_ns(4 * ui_nsk); - val =3D tc358768_ns_to_cnt(val, dsibclk_nsk) - 1; + val =3D tc358768_ns_to_cnt(val, hsbyteclk_nsk) - 1; dev_dbg(dev, "THS_PREPARECNT %u\n", val); /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */ - raw_val =3D tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), dsibclk_= nsk) - 10; + raw_val =3D tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), hsbytecl= k_nsk) - 10; val2 =3D clamp(raw_val, 0, 127); dev_dbg(dev, "THS_ZEROCNT %u\n", val2); val |=3D val2 << 8; tc358768_write(priv, TC358768_THS_HEADERCNT, val); =20 /* TWAKEUP > 1ms in lptxcnt steps */ - val =3D tc358768_ns_to_cnt(1020000, dsibclk_nsk); + val =3D tc358768_ns_to_cnt(1020000, hsbyteclk_nsk); val =3D val / (lptxcnt + 1) - 1; dev_dbg(dev, "TWAKEUP: %u\n", val); tc358768_write(priv, TC358768_TWAKEUP, val); =20 /* TCLK_POSTCNT > 60ns + 52*UI */ val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(52 * ui_nsk), - dsibclk_nsk) - 3; + hsbyteclk_nsk) - 3; dev_dbg(dev, "TCLK_POSTCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_POSTCNT, val); =20 /* max(60ns + 4*UI, 8*UI) < THS_TRAILCNT < 105ns + 12*UI */ raw_val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(18 * ui_nsk), - dsibclk_nsk) - 4; + hsbyteclk_nsk) - 4; val =3D clamp(raw_val, 0, 15); dev_dbg(dev, "THS_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_THS_TRAILCNT, val); @@ -804,11 +804,11 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? 0 : BIT(0)); =20 /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */ - val =3D tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk * 4); - val =3D tc358768_ns_to_cnt(val, dsibclk_nsk) / 4 - 1; + val =3D tc358768_to_ns((lptxcnt + 1) * hsbyteclk_nsk * 4); + val =3D tc358768_ns_to_cnt(val, hsbyteclk_nsk) / 4 - 1; dev_dbg(dev, "TXTAGOCNT: %u\n", val); - val2 =3D tc358768_ns_to_cnt(tc358768_to_ns((lptxcnt + 1) * dsibclk_nsk), - dsibclk_nsk) - 2; + val2 =3D tc358768_ns_to_cnt(tc358768_to_ns((lptxcnt + 1) * hsbyteclk_nsk), + hsbyteclk_nsk) - 2; dev_dbg(dev, "RXTASURECNT: %u\n", val2); val =3D val << 16 | val2; tc358768_write(priv, TC358768_BTACNTRL1, val); @@ -831,13 +831,13 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) =20 /* hsw * byteclk * ndl / pclk */ val =3D (u32)div_u64(vm.hsync_len * - ((u64)priv->dsiclk / 4) * priv->dsi_lanes, + (u64)hsbyteclk * priv->dsi_lanes, vm.pixelclock); tc358768_write(priv, TC358768_DSI_HSW, val); =20 /* hbp * byteclk * ndl / pclk */ val =3D (u32)div_u64(vm.hback_porch * - ((u64)priv->dsiclk / 4) * priv->dsi_lanes, + (u64)hsbyteclk * priv->dsi_lanes, vm.pixelclock); tc358768_write(priv, TC358768_DSI_HBPR, val); } else { @@ -856,7 +856,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridg= e *bridge) =20 /* (hsw + hbp) * byteclk * ndl / pclk */ val =3D (u32)div_u64((vm.hsync_len + vm.hback_porch) * - ((u64)priv->dsiclk / 4) * priv->dsi_lanes, + (u64)hsbyteclk * priv->dsi_lanes, vm.pixelclock); tc358768_write(priv, TC358768_DSI_HSW, val); =20 --=20 2.34.1 From nobody Thu Sep 11 14:52:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54598C001DF for ; Fri, 4 Aug 2023 10:45:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231598AbjHDKpf (ORCPT ); Fri, 4 Aug 2023 06:45:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231565AbjHDKpB (ORCPT ); Fri, 4 Aug 2023 06:45:01 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1ADEC49EF for ; Fri, 4 Aug 2023 03:44:52 -0700 (PDT) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id EB3772A4B; Fri, 4 Aug 2023 12:43:40 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1691145821; bh=ELgigWtoD/WjDlm4NjUr8bRyAjoxE3TF/Vb3awGuK/o=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=QYTeoUI6Z1KP9jf5JNFolFg1oOnCxfAWxOwnaejdsgSk3mgHhAE9UzhfeIem3ckTq mFQDX06n3asaAk/PsPidPV7dL/88XCfsI/8gS2GM4Mc5FW3MnXSoF5/J2crh6Yiapb CxGU1JUmovBYRcEeUU0N2DWGNJBfpRtpliEc7Oc8= From: Tomi Valkeinen Date: Fri, 04 Aug 2023 13:44:13 +0300 Subject: [PATCH 08/11] drm/bridge: tc358768: Clean up clock period code MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230804-tc358768-v1-8-1afd44b7826b@ideasonboard.com> References: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> In-Reply-To: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Francesco Dolcini Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Aradhya Bhatia , Tomi Valkeinen X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=6503; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=ELgigWtoD/WjDlm4NjUr8bRyAjoxE3TF/Vb3awGuK/o=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBkzNaTuuWogQSf6kACTFvu2u3h7ud5VB+1iSfB+ k8sp2aRBLyJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZMzWkwAKCRD6PaqMvJYe 9WLGEACZmidk7hLfu+CoMCAeSUbSFXTWFRD210fCVc+r7o1kzbQJ/IIZP+NmbUiaUkYAvl4l8bh n/Z7K5Hibr/Rq3RXPz2sSxGt3Mh0DpmFgH6DMkUjMUo5EPlVpn3jBuYT4lur0ecSVqjyAYp8DlB glUi5hLQMlFBc2zFaBBhXHeKkCpBG2WqXyzyoLkmvHcBgyY4LckKCgOJVZZMqLWLbobG6Ejgd8Q pwtC0iEZ8g20aBsnueri2dInvpDOSZsEejQX4JyW+YeCiwZN+WlnTnaOy9lIZBijHWabj+zAfOX CKjnR/eveGG6+X0DUVSFCvC9LIkZe27C3Up00ScFfooujkl0bd0fO08UsZ+z0Lp/d9t32Zyw/F4 6FYdILNlhHhBjZEy3DXeX3wgsBv3K82lCGLKvGVPLaQ6sn6fPmyWmBxA4rAl6r3DfSrMOfnCNOx ZzErsEJe0MUnCtQR+DohVWAtRRNZLk9mtauS7LqsXasQamN9SjIrvt/vbOnRnyuqM5QGISLQa51 r3cVq3e3MkXs5+bE6cx3/2SKfNz6abb/YXbldBamUl/Iij8olzW8izYZgpWV2oN/zlV/+Jvjs55 GNbr3qXNBL6SIW6f3DAE6xGZavfBiYYc7efnlCe7UXXo4HTEm3Z1c6yZvNXcw5H8X5HFdJO5sMn u6K+UZWWB+ufaRg== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The driver defines TC358768_PRECISION as 1000, and uses "nsk" to refer to clock periods. The original author does not remember where all this came from. Effectively the driver is using picoseconds as the unit for clock periods, yet referring to them by "nsk". Clean this up by just saying the periods are in picoseconds. Signed-off-by: Tomi Valkeinen Reviewed-by: Peter Ujfalusi --- drivers/gpu/drm/bridge/tc358768.c | 60 +++++++++++++++++++----------------= ---- 1 file changed, 29 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc3= 58768.c index db45b4a982c0..9411b0fb471e 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -15,6 +15,7 @@ #include #include #include +#include =20 #include #include @@ -627,15 +628,14 @@ static int tc358768_setup_pll(struct tc358768_priv *p= riv, return tc358768_clear_error(priv); } =20 -#define TC358768_PRECISION 1000 -static u32 tc358768_ns_to_cnt(u32 ns, u32 period_nsk) +static u32 tc358768_ns_to_cnt(u32 ns, u32 period_ps) { - return (ns * TC358768_PRECISION + period_nsk) / period_nsk; + return (ns * 1000 + period_ps) / period_ps; } =20 -static u32 tc358768_to_ns(u32 nsk) +static u32 tc358768_ps_to_ns(u32 ps) { - return (nsk / TC358768_PRECISION); + return ps / 1000; } =20 static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) @@ -646,7 +646,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridg= e *bridge) u32 val, val2, lptxcnt, hact, data_type; s32 raw_val; const struct drm_display_mode *mode; - u32 hsbyteclk_nsk, dsiclk_nsk, ui_nsk; + u32 hsbyteclk_ps, dsiclk_ps, ui_ps; u32 dsiclk, hsbyteclk, video_start; const u32 internal_delay =3D 40; int ret, i; @@ -730,67 +730,65 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) tc358768_write(priv, TC358768_D0W_CNTRL + i * 4, 0x0000); =20 /* DSI Timings */ - hsbyteclk_nsk =3D (u32)div_u64((u64)1000000000 * TC358768_PRECISION, - hsbyteclk); - dsiclk_nsk =3D (u32)div_u64((u64)1000000000 * TC358768_PRECISION, dsiclk); - ui_nsk =3D dsiclk_nsk / 2; - dev_dbg(dev, "dsiclk_nsk: %u\n", dsiclk_nsk); - dev_dbg(dev, "ui_nsk: %u\n", ui_nsk); - dev_dbg(dev, "hsbyteclk_nsk: %u\n", hsbyteclk_nsk); + hsbyteclk_ps =3D (u32)div_u64(PICO, hsbyteclk); + dsiclk_ps =3D (u32)div_u64(PICO, dsiclk); + ui_ps =3D dsiclk_ps / 2; + dev_dbg(dev, "dsiclk: %u ps, ui %u ps, hsbyteclk %u ps\n", dsiclk_ps, + ui_ps, hsbyteclk_ps); =20 /* LP11 > 100us for D-PHY Rx Init */ - val =3D tc358768_ns_to_cnt(100 * 1000, hsbyteclk_nsk) - 1; + val =3D tc358768_ns_to_cnt(100 * 1000, hsbyteclk_ps) - 1; dev_dbg(dev, "LINEINITCNT: %u\n", val); tc358768_write(priv, TC358768_LINEINITCNT, val); =20 /* LPTimeCnt > 50ns */ - val =3D tc358768_ns_to_cnt(50, hsbyteclk_nsk) - 1; + val =3D tc358768_ns_to_cnt(50, hsbyteclk_ps) - 1; lptxcnt =3D val; dev_dbg(dev, "LPTXTIMECNT: %u\n", val); tc358768_write(priv, TC358768_LPTXTIMECNT, val); =20 /* 38ns < TCLK_PREPARE < 95ns */ - val =3D tc358768_ns_to_cnt(65, hsbyteclk_nsk) - 1; + val =3D tc358768_ns_to_cnt(65, hsbyteclk_ps) - 1; dev_dbg(dev, "TCLK_PREPARECNT %u\n", val); /* TCLK_PREPARE + TCLK_ZERO > 300ns */ - val2 =3D tc358768_ns_to_cnt(300 - tc358768_to_ns(2 * ui_nsk), - hsbyteclk_nsk) - 2; + val2 =3D tc358768_ns_to_cnt(300 - tc358768_ps_to_ns(2 * ui_ps), + hsbyteclk_ps) - 2; dev_dbg(dev, "TCLK_ZEROCNT %u\n", val2); val |=3D val2 << 8; tc358768_write(priv, TC358768_TCLK_HEADERCNT, val); =20 /* TCLK_TRAIL > 60ns AND TEOT <=3D 105 ns + 12*UI */ - raw_val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), hsbyteclk= _nsk) - 5; + raw_val =3D tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(2 * ui_ps), hsbytec= lk_ps) - 5; val =3D clamp(raw_val, 0, 127); dev_dbg(dev, "TCLK_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_TRAILCNT, val); =20 /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */ - val =3D 50 + tc358768_to_ns(4 * ui_nsk); - val =3D tc358768_ns_to_cnt(val, hsbyteclk_nsk) - 1; + val =3D 50 + tc358768_ps_to_ns(4 * ui_ps); + val =3D tc358768_ns_to_cnt(val, hsbyteclk_ps) - 1; dev_dbg(dev, "THS_PREPARECNT %u\n", val); /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */ - raw_val =3D tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), hsbytecl= k_nsk) - 10; + raw_val =3D tc358768_ns_to_cnt(145 - tc358768_ps_to_ns(3 * ui_ps), hsbyte= clk_ps) - 10; val2 =3D clamp(raw_val, 0, 127); dev_dbg(dev, "THS_ZEROCNT %u\n", val2); val |=3D val2 << 8; tc358768_write(priv, TC358768_THS_HEADERCNT, val); =20 /* TWAKEUP > 1ms in lptxcnt steps */ - val =3D tc358768_ns_to_cnt(1020000, hsbyteclk_nsk); + val =3D tc358768_ns_to_cnt(1020000, hsbyteclk_ps); val =3D val / (lptxcnt + 1) - 1; dev_dbg(dev, "TWAKEUP: %u\n", val); tc358768_write(priv, TC358768_TWAKEUP, val); =20 /* TCLK_POSTCNT > 60ns + 52*UI */ - val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(52 * ui_nsk), - hsbyteclk_nsk) - 3; + val =3D tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(52 * ui_ps), + hsbyteclk_ps) - 3; dev_dbg(dev, "TCLK_POSTCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_POSTCNT, val); =20 /* max(60ns + 4*UI, 8*UI) < THS_TRAILCNT < 105ns + 12*UI */ - raw_val =3D tc358768_ns_to_cnt(60 + tc358768_to_ns(18 * ui_nsk), - hsbyteclk_nsk) - 4; + raw_val =3D tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(18 * ui_ps), + hsbyteclk_ps) - 4; val =3D clamp(raw_val, 0, 15); dev_dbg(dev, "THS_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_THS_TRAILCNT, val); @@ -804,11 +802,11 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? 0 : BIT(0)); =20 /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */ - val =3D tc358768_to_ns((lptxcnt + 1) * hsbyteclk_nsk * 4); - val =3D tc358768_ns_to_cnt(val, hsbyteclk_nsk) / 4 - 1; + val =3D tc358768_ps_to_ns((lptxcnt + 1) * hsbyteclk_ps * 4); + val =3D tc358768_ns_to_cnt(val, hsbyteclk_ps) / 4 - 1; dev_dbg(dev, "TXTAGOCNT: %u\n", val); - val2 =3D tc358768_ns_to_cnt(tc358768_to_ns((lptxcnt + 1) * hsbyteclk_nsk), - hsbyteclk_nsk) - 2; + val2 =3D tc358768_ns_to_cnt(tc358768_ps_to_ns((lptxcnt + 1) * hsbyteclk_p= s), + hsbyteclk_ps) - 2; dev_dbg(dev, "RXTASURECNT: %u\n", val2); val =3D val << 16 | val2; tc358768_write(priv, TC358768_BTACNTRL1, val); --=20 2.34.1 From nobody Thu Sep 11 14:52:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4890CC001DF for ; Fri, 4 Aug 2023 10:45:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231633AbjHDKpb (ORCPT ); Fri, 4 Aug 2023 06:45:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231558AbjHDKoy (ORCPT ); Fri, 4 Aug 2023 06:44:54 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A13349F2 for ; Fri, 4 Aug 2023 03:44:52 -0700 (PDT) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id F2C942B6A; Fri, 4 Aug 2023 12:43:41 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1691145822; bh=V/DMo8p5jJ8+UtiQ3KTL91bfgqjlzonLkdA5+0U3ogc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=QQDrQw2zsdZc2behvl1P1HZYOJm5BRjBhPLP4HW8UoUklhgQOib+VkcfdAdacF5sP U3lE+2lnXRBNCW5C3HGf9nNrM9GHkxT24BWlve/ulCYmuf9cHVRkGB2Ir9Bj41wJQJ c5nGUHluGuSnyiYk3ZgaxRX4x/lQellgHqWz0mzA= From: Tomi Valkeinen Date: Fri, 04 Aug 2023 13:44:14 +0300 Subject: [PATCH 09/11] drm/bridge: tc358768: Fix tc358768_ns_to_cnt() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230804-tc358768-v1-9-1afd44b7826b@ideasonboard.com> References: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> In-Reply-To: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Francesco Dolcini Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Aradhya Bhatia , Tomi Valkeinen X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=900; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=V/DMo8p5jJ8+UtiQ3KTL91bfgqjlzonLkdA5+0U3ogc=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBkzNaTNhDk+zBX+nctIEkqq6764yQTt3//SgEa4 LXEPMvQJ2iJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZMzWkwAKCRD6PaqMvJYe 9f9cD/4vJ0wTQJ84zUrVTjnCcNpInCDTRekKAhZydWgGkY/wt7GfIkXDTZh9wN49zcFXHeTDH/a 3qZEA+WTOpJEw6oFxy4uMC/sP5y13aCG7HMeaAccxYh+Euqc5NrSE+bcJ3JCror4+CWKtBJJHrr QG/Ol9aJYit3s1o5r6QQ/PaUI5j1diao0NxADE4b9fzVJiDcVbsAszjYWDs34cHxqySM3QbBNUH OB7f1W7dxHb25zddImzuzdq03UplxmDGTRFB65JeENBsqkR4+G0wiXJzXNBoBDUokWh/rgSo9Ew o2qgbELY7nGucvTh9GqKdYFnk5wU7+V5ABn4g9J1FzL/872wScuXyu4Lyb2cX9gMuOGAp9UbkbE BKPkfGiBm5p2Hi5VvHbaYOuWOw8laaBjoDRhRnPvftsBOgzBAip8sp3sWA3OF5eexN6FbMkOd/J nJlrNujDBoAIEuB13Gfdhe1ooryBOMb/Of7yEOqhCSEPfzdrHggvulrw851yqXkb8BSp0Om0MI6 cjWo4oUwBwXa2gkOtWLRWcArQsDyJX5Gf3wEu++8kXNdqBX8abt4YH7hLB7Zqw7/DWf5P2qsTmV 8ay6GL0DuZe4jDypl4V2bSJ0aXiHyFGdeLZ9oKZ/jKEnTE9s1WX7Og9f+6OsZm+uJS8MXLhw1ar VDeOYwZfH60M/dw== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The tc358768_ns_to_cnt() is, most likely, supposed to do a div-round-up operation, but it misses subtracting one from the dividend. Fix this by just using DIV_ROUND_UP(). Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver") Signed-off-by: Tomi Valkeinen Reviewed-by: Peter Ujfalusi --- drivers/gpu/drm/bridge/tc358768.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc3= 58768.c index 9411b0fb471e..dc2241c18dde 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -630,7 +630,7 @@ static int tc358768_setup_pll(struct tc358768_priv *pri= v, =20 static u32 tc358768_ns_to_cnt(u32 ns, u32 period_ps) { - return (ns * 1000 + period_ps) / period_ps; + return DIV_ROUND_UP(ns * 1000, period_ps); } =20 static u32 tc358768_ps_to_ns(u32 ps) --=20 2.34.1 From nobody Thu Sep 11 14:52:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D8D0C001DF for ; Fri, 4 Aug 2023 10:45:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231673AbjHDKpo (ORCPT ); Fri, 4 Aug 2023 06:45:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47514 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231602AbjHDKpZ (ORCPT ); Fri, 4 Aug 2023 06:45:25 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DFCB349FA for ; Fri, 4 Aug 2023 03:44:54 -0700 (PDT) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 07798188E; Fri, 4 Aug 2023 12:43:42 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1691145823; bh=mzuNNrlR1ZEml0Ert0BP5I69sb5mNHms4gIhBN+F6LM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=iDJynuOGxKruA16kvC/vwbx+D5LWAu0ecDwmXSDPqRH1BV+IN185nIYn9Q3EdKCpJ FSvKi2AHm7sPwju8YuI7GZlpGyhYVrOffAuVUU9eAj1P2wH7kO3XpcyMr3YdXtQThM i5L9UENxzqpLiMvWhtzS1wvur5LsjxyrqsnvM4xo= From: Tomi Valkeinen Date: Fri, 04 Aug 2023 13:44:15 +0300 Subject: [PATCH 10/11] drm/bridge: tc358768: Attempt to fix DSI horizontal timings MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230804-tc358768-v1-10-1afd44b7826b@ideasonboard.com> References: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> In-Reply-To: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Francesco Dolcini Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Aradhya Bhatia , Tomi Valkeinen X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=11714; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=mzuNNrlR1ZEml0Ert0BP5I69sb5mNHms4gIhBN+F6LM=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBkzNaUZkI+X2XFkRCR1GnPjwqHx6GhUR5BLGn2Y /kmo1d+q8mJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZMzWlAAKCRD6PaqMvJYe 9azmD/42tL4IOGpRdSwhJ7/oX04fozZ9uwRKjXGhT5ci/yDf5zpY9RAhjHTVo2+49H7zYw7H3rD IYf2yG55vYjbUaLf2n/V7N4OE6b0WJ2vmayssavjWor6ZtgIUJQ9n4VfPN1FSUEUuWzV9XftQW6 UZsl7WjeNltAxFGItdhk2J8XsXwCvaB3iOoeKlNw/rInyDHN5zC4a71VnnHgGe6rG6rX2Vr32C6 66N61NvQBguWYzxip14NIvcxrkjPe9ettX1x6Mg1ynsUaH5ve4A9NfBzuUHloM8COYz+fe4Lz9l XeqxxVviORN7mli+DH9Z7bEYM4hHTo7iKwImFA2QYZVb6wUHPX5TJaqtTpezhrXJA5ToqYmANxh qaSnYajlznLqU6TNXRMIR5nct/30i8r9SUq+simVGB0M5HIXnZmtnjKEbpKFt6vP/uj4L5KBevX utOKsFF0TEAct0Jif4chziSC88hxf0BzW7e3beuA5NIwTyIdKirpvVjNYmVR4ICYG7k3QLHdGM8 NN/C7cR8reS+VQrhn/OyTKYVY+9QN8+EDMpZTVLTrVT/tSSR6tzW4paxCe4ejHRcWlIWqR1bt/r BFyTyRSf4tmfipxUCM4M2P94gF+P22kRxKXuTBNrGn8ortkerob6L7L10HIqHprjJs3zsjlA81c e/ViFET1V7J75XA== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The DSI horizontal timing calculations done by the driver seem to often lead to underflows or overflows, depending on the videomode. There are two main things the current driver doesn't seem to get right: DSI HSW and HFP, and VSDly. However, even following Toshiba's documentation it seems we don't always get a working display. This patch attempts to fix the horizontal timings for DSI event mode, and on a system with a DSI->HDMI encoder, a lot of standard HDMI modes now seem to work. The work relies on Toshiba's documentation, but also quite a bit on empirical testing. This also adds timing related debug prints to make it easier to improve on this later. The DSI pulse mode has only been tested with a fixed-resolution panel, which limits the testing of different modes on DSI pulse mode. However, as the VSDly calculation also affects pulse mode, so this might cause a regression. Signed-off-by: Tomi Valkeinen Reviewed-by: Peter Ujfalusi --- drivers/gpu/drm/bridge/tc358768.c | 211 +++++++++++++++++++++++++++++++++-= ---- 1 file changed, 183 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc3= 58768.c index dc2241c18dde..ea19de5509ed 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -157,6 +158,7 @@ struct tc358768_priv { u32 frs; /* PLL Freqency range for HSCK (post divider) */ =20 u32 dsiclk; /* pll_clk / 2 */ + u32 pclk; /* incoming pclk rate */ }; =20 static inline struct tc358768_priv *dsi_host_to_tc358768(struct mipi_dsi_h= ost @@ -380,6 +382,7 @@ static int tc358768_calc_pll(struct tc358768_priv *priv, priv->prd =3D best_prd; priv->frs =3D frs; priv->dsiclk =3D best_pll / 2; + priv->pclk =3D mode->clock * 1000; =20 return 0; } @@ -638,6 +641,28 @@ static u32 tc358768_ps_to_ns(u32 ps) return ps / 1000; } =20 +static u32 tc358768_dpi_to_ns(u32 val, u32 pclk) +{ + return (u32)div_u64((u64)val * NANO, pclk); +} + +/* Convert value in DPI pixel clock units to DSI byte count */ +static u32 tc358768_dpi_to_dsi_bytes(struct tc358768_priv *priv, u32 val) +{ + u64 m =3D (u64)val * priv->dsiclk / 4 * priv->dsi_lanes; + u64 n =3D priv->pclk; + + return (u32)div_u64(m + n - 1, n); +} + +static u32 tc358768_dsi_bytes_to_ns(struct tc358768_priv *priv, u32 val) +{ + u64 m =3D (u64)val * NANO; + u64 n =3D priv->dsiclk / 4 * priv->dsi_lanes; + + return (u32)div_u64(m, n); +} + static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) { struct tc358768_priv *priv =3D bridge_to_tc358768(bridge); @@ -647,11 +672,19 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) s32 raw_val; const struct drm_display_mode *mode; u32 hsbyteclk_ps, dsiclk_ps, ui_ps; - u32 dsiclk, hsbyteclk, video_start; - const u32 internal_delay =3D 40; + u32 dsiclk, hsbyteclk; int ret, i; struct videomode vm; struct device *dev =3D priv->dev; + /* In pixelclock units */ + u32 dpi_htot, dpi_data_start; + /* In byte units */ + u32 dsi_dpi_htot, dsi_dpi_data_start; + u32 dsi_hsw, dsi_hbp, dsi_hact, dsi_hfp; + const u32 dsi_hss =3D 4; /* HSS is a short packet (4 bytes) */ + /* In hsbyteclk units */ + u32 dsi_vsdly; + const u32 internal_dly =3D 40; =20 if (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { dev_warn_once(dev, "Non-continuous mode unimplemented, falling back to c= ontinuous\n"); @@ -686,27 +719,23 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) case MIPI_DSI_FMT_RGB888: val |=3D (0x3 << 4); hact =3D vm.hactive * 3; - video_start =3D (vm.hsync_len + vm.hback_porch) * 3; data_type =3D MIPI_DSI_PACKED_PIXEL_STREAM_24; break; case MIPI_DSI_FMT_RGB666: val |=3D (0x4 << 4); hact =3D vm.hactive * 3; - video_start =3D (vm.hsync_len + vm.hback_porch) * 3; data_type =3D MIPI_DSI_PACKED_PIXEL_STREAM_18; break; =20 case MIPI_DSI_FMT_RGB666_PACKED: val |=3D (0x4 << 4) | BIT(3); hact =3D vm.hactive * 18 / 8; - video_start =3D (vm.hsync_len + vm.hback_porch) * 18 / 8; data_type =3D MIPI_DSI_PIXEL_STREAM_3BYTE_18; break; =20 case MIPI_DSI_FMT_RGB565: val |=3D (0x5 << 4); hact =3D vm.hactive * 2; - video_start =3D (vm.hsync_len + vm.hback_porch) * 2; data_type =3D MIPI_DSI_PACKED_PIXEL_STREAM_16; break; default: @@ -716,9 +745,150 @@ static void tc358768_bridge_pre_enable(struct drm_bri= dge *bridge) return; } =20 + /* + * There are three important things to make TC358768 work correctly, + * which are not trivial to manage: + * + * 1. Keep the DPI line-time and the DSI line-time as close to each + * other as possible. + * 2. TC358768 goes to LP mode after each line's active area. The DSI + * HFP period has to be long enough for entering and exiting LP mode. + * But it is not clear how to calculate this. + * 3. VSDly (video start delay) has to be long enough to ensure that the + * DSI TX does not start transmitting util we have started receiving + * pixel data from the DPI input. It is not clear how to calculate + * this either. + */ + + dpi_htot =3D vm.hactive + vm.hfront_porch + vm.hsync_len + vm.hback_porch; + dpi_data_start =3D vm.hsync_len + vm.hback_porch; + + dev_dbg(dev, "dpi horiz timing (pclk): %u + %u + %u + %u =3D %u\n", + vm.hsync_len, vm.hback_porch, vm.hactive, vm.hfront_porch, + dpi_htot); + + dev_dbg(dev, "dpi horiz timing (ns): %u + %u + %u + %u =3D %u\n", + tc358768_dpi_to_ns(vm.hsync_len, vm.pixelclock), + tc358768_dpi_to_ns(vm.hback_porch, vm.pixelclock), + tc358768_dpi_to_ns(vm.hactive, vm.pixelclock), + tc358768_dpi_to_ns(vm.hfront_porch, vm.pixelclock), + tc358768_dpi_to_ns(dpi_htot, vm.pixelclock)); + + dev_dbg(dev, "dpi data start (ns): %u + %u =3D %u\n", + tc358768_dpi_to_ns(vm.hsync_len, vm.pixelclock), + tc358768_dpi_to_ns(vm.hback_porch, vm.pixelclock), + tc358768_dpi_to_ns(dpi_data_start, vm.pixelclock)); + + dsi_dpi_htot =3D tc358768_dpi_to_dsi_bytes(priv, dpi_htot); + dsi_dpi_data_start =3D tc358768_dpi_to_dsi_bytes(priv, dpi_data_start); + + if (dsi_dev->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) { + dsi_hsw =3D tc358768_dpi_to_dsi_bytes(priv, vm.hsync_len); + dsi_hbp =3D tc358768_dpi_to_dsi_bytes(priv, vm.hback_porch); + } else { + /* HBP is included in HSW in event mode */ + dsi_hbp =3D 0; + dsi_hsw =3D tc358768_dpi_to_dsi_bytes(priv, + vm.hsync_len + vm.hback_porch); + + /* + * The pixel packet includes the actual pixel data, and: + * DSI packet header =3D 4 bytes + * DCS code =3D 1 byte + * DSI packet footer =3D 2 bytes + */ + dsi_hact =3D hact + 4 + 1 + 2; + + dsi_hfp =3D dsi_dpi_htot - dsi_hact - dsi_hsw - dsi_hss; + + /* + * Here we should check if HFP is long enough for entering LP + * and exiting LP, but it's not clear how to calculate that. + * Instead, this is a naive algorithm that just adjusts the HFP + * and HSW so that HFP is (at least) roughly 2/3 of the total + * blanking time. + */ + if (dsi_hfp < (dsi_hfp + dsi_hsw + dsi_hss) * 2 / 3) { + u32 old_hfp =3D dsi_hfp; + u32 old_hsw =3D dsi_hsw; + u32 tot =3D dsi_hfp + dsi_hsw + dsi_hss; + + dsi_hsw =3D tot / 3; + + /* + * Seems like sometimes HSW has to be divisible by num-lanes, but + * not always... + */ + dsi_hsw =3D roundup(dsi_hsw, priv->dsi_lanes); + + dsi_hfp =3D dsi_dpi_htot - dsi_hact - dsi_hsw - dsi_hss; + + dev_dbg(dev, + "hfp too short, adjusting dsi hfp and dsi hsw from %u, %u to %u, %u\n", + old_hfp, old_hsw, dsi_hfp, dsi_hsw); + } + + dev_dbg(dev, + "dsi horiz timing (bytes): %u, %u + %u + %u + %u =3D %u\n", + dsi_hss, dsi_hsw, dsi_hbp, dsi_hact, dsi_hfp, + dsi_hss + dsi_hsw + dsi_hbp + dsi_hact + dsi_hfp); + + dev_dbg(dev, "dsi horiz timing (ns): %u + %u + %u + %u + %u =3D %u\n", + tc358768_dsi_bytes_to_ns(priv, dsi_hss), + tc358768_dsi_bytes_to_ns(priv, dsi_hsw), + tc358768_dsi_bytes_to_ns(priv, dsi_hbp), + tc358768_dsi_bytes_to_ns(priv, dsi_hact), + tc358768_dsi_bytes_to_ns(priv, dsi_hfp), + tc358768_dsi_bytes_to_ns(priv, dsi_hss + dsi_hsw + dsi_hbp + dsi_hact += dsi_hfp)); + } + + /* VSDly calculation */ + + /* Start with the HW internal delay */ + dsi_vsdly =3D internal_dly; + + /* Convert to byte units as the other variables are in byte units */ + dsi_vsdly *=3D priv->dsi_lanes; + + /* Do we need more delay, in addition to the internal? */ + if (dsi_dpi_data_start > dsi_vsdly + dsi_hss + dsi_hsw + dsi_hbp) { + dsi_vsdly =3D dsi_dpi_data_start - dsi_hss - dsi_hsw - dsi_hbp; + dsi_vsdly =3D roundup(dsi_vsdly, priv->dsi_lanes); + } + + dev_dbg(dev, "dsi data start (bytes) %u + %u + %u + %u =3D %u\n", + dsi_vsdly, dsi_hss, dsi_hsw, dsi_hbp, + dsi_vsdly + dsi_hss + dsi_hsw + dsi_hbp); + + dev_dbg(dev, "dsi data start (ns) %u + %u + %u + %u =3D %u\n", + tc358768_dsi_bytes_to_ns(priv, dsi_vsdly), + tc358768_dsi_bytes_to_ns(priv, dsi_hss), + tc358768_dsi_bytes_to_ns(priv, dsi_hsw), + tc358768_dsi_bytes_to_ns(priv, dsi_hbp), + tc358768_dsi_bytes_to_ns(priv, dsi_vsdly + dsi_hss + dsi_hsw + dsi_hbp)); + + /* Convert back to hsbyteclk */ + dsi_vsdly /=3D priv->dsi_lanes; + + /* + * The docs say that there is an internal delay of 40 cycles. + * However, we get underflows if we follow that rule. If we + * instead ignore the internal delay, things work. So either + * the docs are wrong or the calculations are wrong. + * + * As a temporary fix, add the internal delay here, to counter + * the subtraction when writing the register. + */ + dsi_vsdly +=3D internal_dly; + + /* Clamp to the register max */ + if (dsi_vsdly - internal_dly > 0x3ff) { + dev_warn(dev, "VSDly too high, underflows likely\n"); + dsi_vsdly =3D 0x3ff + internal_dly; + } + /* VSDly[9:0] */ - video_start =3D max(video_start, internal_delay + 1) - internal_delay; - tc358768_write(priv, TC358768_VSDLY, video_start); + tc358768_write(priv, TC358768_VSDLY, dsi_vsdly - internal_dly); =20 tc358768_write(priv, TC358768_DATAFMT, val); tc358768_write(priv, TC358768_DSITX_DT, data_type); @@ -826,18 +996,6 @@ static void tc358768_bridge_pre_enable(struct drm_brid= ge *bridge) =20 /* vbp */ tc358768_write(priv, TC358768_DSI_VBPR, vm.vback_porch); - - /* hsw * byteclk * ndl / pclk */ - val =3D (u32)div_u64(vm.hsync_len * - (u64)hsbyteclk * priv->dsi_lanes, - vm.pixelclock); - tc358768_write(priv, TC358768_DSI_HSW, val); - - /* hbp * byteclk * ndl / pclk */ - val =3D (u32)div_u64(vm.hback_porch * - (u64)hsbyteclk * priv->dsi_lanes, - vm.pixelclock); - tc358768_write(priv, TC358768_DSI_HBPR, val); } else { /* Set event mode */ tc358768_write(priv, TC358768_DSI_EVENT, 1); @@ -851,16 +1009,13 @@ static void tc358768_bridge_pre_enable(struct drm_br= idge *bridge) =20 /* vbp (not used in event mode) */ tc358768_write(priv, TC358768_DSI_VBPR, 0); + } =20 - /* (hsw + hbp) * byteclk * ndl / pclk */ - val =3D (u32)div_u64((vm.hsync_len + vm.hback_porch) * - (u64)hsbyteclk * priv->dsi_lanes, - vm.pixelclock); - tc358768_write(priv, TC358768_DSI_HSW, val); + /* hsw (bytes) */ + tc358768_write(priv, TC358768_DSI_HSW, dsi_hsw); =20 - /* hbp (not used in event mode) */ - tc358768_write(priv, TC358768_DSI_HBPR, 0); - } + /* hbp (bytes) */ + tc358768_write(priv, TC358768_DSI_HBPR, dsi_hbp); =20 /* hact (bytes) */ tc358768_write(priv, TC358768_DSI_HACT, hact); --=20 2.34.1 From nobody Thu Sep 11 14:52:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A95EAC001DF for ; Fri, 4 Aug 2023 10:45:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231684AbjHDKpq (ORCPT ); Fri, 4 Aug 2023 06:45:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231609AbjHDKp0 (ORCPT ); Fri, 4 Aug 2023 06:45:26 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F08B84C06 for ; Fri, 4 Aug 2023 03:44:55 -0700 (PDT) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 0FFA81AB3; Fri, 4 Aug 2023 12:43:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1691145824; bh=NVGv48ZsaW1J2ePUXosAluIgk8qR+1DrF7efAr7lM4w=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=dGDYFKiRY3ejkAX1kWBtrueu0SEW5lxRwH92ud9Fe8DbjpkvBgjWLhXcumV9/AJfF KF19+EBtC0ql19kWEcAO9xd1NdMKirgUIF5Ax3zAbA57x3H0cZ9iKndFzEVAVhzD3f +vSaM3Qz6n0tbhbNt7mDycPPs3CPG8wv26aLTXdk= From: Tomi Valkeinen Date: Fri, 04 Aug 2023 13:44:16 +0300 Subject: [PATCH 11/11] drm/bridge: tc358768: Add DRM_BRIDGE_ATTACH_NO_CONNECTOR support MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20230804-tc358768-v1-11-1afd44b7826b@ideasonboard.com> References: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> In-Reply-To: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Francesco Dolcini Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Aradhya Bhatia , Tomi Valkeinen X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=3311; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=NVGv48ZsaW1J2ePUXosAluIgk8qR+1DrF7efAr7lM4w=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBkzNaUTL0ctCqlqan7C6QJgIPS0jOOK19pqZh0f tnCtHFYzGWJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZMzWlAAKCRD6PaqMvJYe 9Z3oD/9GvdukB96G4adIbYXsQ7SSiIRzmYQYNiFOUQW55h6eof6UJRwPyXL+5wiOP9/MyFGtsLv Uk32KzqAHGJChrf2erw9ZGghKeZG0M/UQ8GJeQ+BjTSMGgOh0ySP/+bSgqvic65dsayZ5Fmg11b CVhophTt8Q4uCahRYBjQgc06ueGYQPKj8Qw0p6kJY1D3KhLvHxCDjQj4i+gFd9++hbPBw+wg0zc +n4vi3WG/S7vytZLqJvhZV3pKqteZw+SRNYux7kWeLOpQ2QIBOntlPm6KJi7ymcsAYBYFusDwiz 6Lscmd9PudbiBvPA+8vCcIZUaMuBNkZLYIlUtMtrBZHb9qlzKyRpoKtOeB0hql8j16N0b4DTg4C x7MR3m3NjuqvTdloSLRHfydtvDH9MJQhUdkxQRIPO++KLyQX9uVsN4OFnYfockwKfsSGvSxQQX6 YKAb5vw0FCx00uBHGxjZoFlhCBphTFmen4hmo9qU8+8wfP2dLt6Xj9189q8KSTUueFOX+gGJZGS 7tC54hRSst9FBUaZYC00YPgXkjAlWMcdNARl2zQXEJU/jJFWHjt22UXsiftwPgdei9SjR8fiamp 6cci8rii7FfrhOWFYz2a+31j4hZGvVaxW6Dnqxwl5aJPzLMFy7lGfj5Ap/TuxpQiywsljV50Aez Yqj74AJoa4QYsSw== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/bridge/tc358768.c | 64 +++++++++++++++++++++++++++--------= ---- 1 file changed, 45 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc3= 58768.c index ea19de5509ed..a567f136ddc7 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -131,8 +131,17 @@ static const char * const tc358768_supplies[] =3D { =20 struct tc358768_dsi_output { struct mipi_dsi_device *dev; + + /* Legacy field if DRM_BRIDGE_ATTACH_NO_CONNECTOR is not used */ struct drm_panel *panel; - struct drm_bridge *bridge; + + /* + * If DRM_BRIDGE_ATTACH_NO_CONNECTOR is not used and a panel is attached + * to tc358768, 'next_bridge' contains the bridge the driver created + * with drm_panel_bridge_add_typed(). Otherwise 'next_bridge' contains + * the next bridge the driver found. + */ + struct drm_bridge *next_bridge; }; =20 struct tc358768_priv { @@ -391,8 +400,6 @@ static int tc358768_dsi_host_attach(struct mipi_dsi_hos= t *host, struct mipi_dsi_device *dev) { struct tc358768_priv *priv =3D dsi_host_to_tc358768(host); - struct drm_bridge *bridge; - struct drm_panel *panel; struct device_node *ep; int ret; =20 @@ -420,21 +427,7 @@ static int tc358768_dsi_host_attach(struct mipi_dsi_ho= st *host, return -ENOTSUPP; } =20 - ret =3D drm_of_find_panel_or_bridge(host->dev->of_node, 1, 0, &panel, - &bridge); - if (ret) - return ret; - - if (panel) { - bridge =3D drm_panel_bridge_add_typed(panel, - DRM_MODE_CONNECTOR_DSI); - if (IS_ERR(bridge)) - return PTR_ERR(bridge); - } - priv->output.dev =3D dev; - priv->output.bridge =3D bridge; - priv->output.panel =3D panel; =20 priv->dsi_lanes =3D dev->lanes; priv->dsi_bpp =3D mipi_dsi_pixel_format_to_bpp(dev->format); @@ -463,7 +456,7 @@ static int tc358768_dsi_host_detach(struct mipi_dsi_hos= t *host, =20 drm_bridge_remove(&priv->bridge); if (priv->output.panel) - drm_panel_bridge_remove(priv->output.bridge); + drm_panel_bridge_remove(priv->output.next_bridge); =20 return 0; } @@ -544,7 +537,40 @@ static int tc358768_bridge_attach(struct drm_bridge *b= ridge, return -ENOTSUPP; } =20 - return drm_bridge_attach(bridge->encoder, priv->output.bridge, bridge, + if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR) { + struct device_node *node; + + /* Get the next bridge, connected to port@1. */ + node =3D of_graph_get_remote_node(priv->dev->of_node, 1, -1); + if (!node) + return -ENODEV; + + priv->output.next_bridge =3D of_drm_find_bridge(node); + of_node_put(node); + if (!priv->output.next_bridge) + return -EPROBE_DEFER; + } else { + struct drm_bridge *bridge; + struct drm_panel *panel; + int ret; + + ret =3D drm_of_find_panel_or_bridge(priv->dev->of_node, 1, 0, + &panel, &bridge); + if (ret) + return ret; + + if (panel) { + bridge =3D drm_panel_bridge_add_typed(panel, + DRM_MODE_CONNECTOR_DSI); + if (IS_ERR(bridge)) + return PTR_ERR(bridge); + } + + priv->output.next_bridge =3D bridge; + priv->output.panel =3D panel; + } + + return drm_bridge_attach(bridge->encoder, priv->output.next_bridge, bridg= e, flags); } =20 --=20 2.34.1