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Signed-off-by: Charlie Jenkins --- arch/riscv/kernel/patch.c | 3 +- arch/riscv/kernel/probes/kprobes.c | 13 +++---- arch/riscv/kernel/probes/simulate-insn.c | 61 +++++++---------------------= ---- arch/riscv/kernel/probes/uprobes.c | 5 +-- 4 files changed, 25 insertions(+), 57 deletions(-) diff --git a/arch/riscv/kernel/patch.c b/arch/riscv/kernel/patch.c index 575e71d6c8ae..df51f5155673 100644 --- a/arch/riscv/kernel/patch.c +++ b/arch/riscv/kernel/patch.c @@ -12,6 +12,7 @@ #include #include #include +#include #include =20 struct patch_insn { @@ -118,7 +119,7 @@ static int patch_text_cb(void *data) =20 if (atomic_inc_return(&patch->cpu_count) =3D=3D num_online_cpus()) { for (i =3D 0; ret =3D=3D 0 && i < patch->ninsns; i++) { - len =3D GET_INSN_LENGTH(patch->insns[i]); + len =3D INSN_LEN(patch->insns[i]); ret =3D patch_text_nosync(patch->addr + i * len, &patch->insns[i], len); } diff --git a/arch/riscv/kernel/probes/kprobes.c b/arch/riscv/kernel/probes/= kprobes.c index 2f08c14a933d..501c6ae4d803 100644 --- a/arch/riscv/kernel/probes/kprobes.c +++ b/arch/riscv/kernel/probes/kprobes.c @@ -12,6 +12,7 @@ #include #include #include +#include =20 #include "decode-insn.h" =20 @@ -24,7 +25,7 @@ post_kprobe_handler(struct kprobe *, struct kprobe_ctlblk= *, struct pt_regs *); static void __kprobes arch_prepare_ss_slot(struct kprobe *p) { u32 insn =3D __BUG_INSN_32; - unsigned long offset =3D GET_INSN_LENGTH(p->opcode); + unsigned long offset =3D INSN_LEN(p->opcode); =20 p->ainsn.api.restore =3D (unsigned long)p->addr + offset; =20 @@ -58,7 +59,7 @@ static bool __kprobes arch_check_kprobe(struct kprobe *p) if (tmp =3D=3D addr) return true; =20 - tmp +=3D GET_INSN_LENGTH(*(u16 *)tmp); + tmp +=3D INSN_LEN(*(u16 *)tmp); } =20 return false; @@ -76,7 +77,7 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) =20 /* copy instruction */ p->opcode =3D (kprobe_opcode_t)(*insn++); - if (GET_INSN_LENGTH(p->opcode) =3D=3D 4) + if (INSN_LEN(p->opcode) =3D=3D 4) p->opcode |=3D (kprobe_opcode_t)(*insn) << 16; =20 /* decode instruction */ @@ -117,8 +118,8 @@ void *alloc_insn_page(void) /* install breakpoint in text */ void __kprobes arch_arm_kprobe(struct kprobe *p) { - u32 insn =3D (p->opcode & __INSN_LENGTH_MASK) =3D=3D __INSN_LENGTH_32 ? - __BUG_INSN_32 : __BUG_INSN_16; + u32 insn =3D INSN_IS_C(p->opcode) ? + __BUG_INSN_16 : __BUG_INSN_32; =20 patch_text(p->addr, &insn, 1); } @@ -344,7 +345,7 @@ kprobe_single_step_handler(struct pt_regs *regs) struct kprobe *cur =3D kprobe_running(); =20 if (cur && (kcb->kprobe_status & (KPROBE_HIT_SS | KPROBE_REENTER)) && - ((unsigned long)&cur->ainsn.api.insn[0] + GET_INSN_LENGTH(cur->opcode= ) =3D=3D addr)) { + ((unsigned long)&cur->ainsn.api.insn[0] + INSN_LEN(cur->opcode) =3D= =3D addr)) { kprobes_restore_local_irqflag(kcb, regs); post_kprobe_handler(cur, kcb, regs); return true; diff --git a/arch/riscv/kernel/probes/simulate-insn.c b/arch/riscv/kernel/p= robes/simulate-insn.c index 994edb4bd16a..f9671bb864a3 100644 --- a/arch/riscv/kernel/probes/simulate-insn.c +++ b/arch/riscv/kernel/probes/simulate-insn.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ =20 +#include #include #include #include @@ -16,19 +17,16 @@ bool __kprobes simulate_jal(u32 opcode, unsigned long a= ddr, struct pt_regs *regs * 1 10 1 8 5 JAL/J */ bool ret; - u32 imm; - u32 index =3D (opcode >> 7) & 0x1f; + s32 imm; + u32 index =3D riscv_insn_extract_rd(opcode); =20 ret =3D rv_insn_reg_set_val((unsigned long *)regs, index, addr + 4); if (!ret) return ret; =20 - imm =3D ((opcode >> 21) & 0x3ff) << 1; - imm |=3D ((opcode >> 20) & 0x1) << 11; - imm |=3D ((opcode >> 12) & 0xff) << 12; - imm |=3D ((opcode >> 31) & 0x1) << 20; + imm =3D riscv_insn_extract_jtype_imm(opcode); =20 - instruction_pointer_set(regs, addr + sign_extend32((imm), 20)); + instruction_pointer_set(regs, addr + imm); =20 return ret; } @@ -42,9 +40,9 @@ bool __kprobes simulate_jalr(u32 opcode, unsigned long ad= dr, struct pt_regs *reg */ bool ret; unsigned long base_addr; - u32 imm =3D (opcode >> 20) & 0xfff; - u32 rd_index =3D (opcode >> 7) & 0x1f; - u32 rs1_index =3D (opcode >> 15) & 0x1f; + s32 imm =3D riscv_insn_extract_itype_imm(opcode); + u32 rd_index =3D riscv_insn_extract_rd(opcode); + u32 rs1_index =3D riscv_insn_extract_rs1(opcode); =20 ret =3D rv_insn_reg_get_val((unsigned long *)regs, rs1_index, &base_addr); if (!ret) @@ -54,25 +52,11 @@ bool __kprobes simulate_jalr(u32 opcode, unsigned long = addr, struct pt_regs *reg if (!ret) return ret; =20 - instruction_pointer_set(regs, (base_addr + sign_extend32((imm), 11))&~1); + instruction_pointer_set(regs, (base_addr + imm) & ~1); =20 return ret; } =20 -#define auipc_rd_idx(opcode) \ - ((opcode >> 7) & 0x1f) - -#define auipc_imm(opcode) \ - ((((opcode) >> 12) & 0xfffff) << 12) - -#if __riscv_xlen =3D=3D 64 -#define auipc_offset(opcode) sign_extend64(auipc_imm(opcode), 31) -#elif __riscv_xlen =3D=3D 32 -#define auipc_offset(opcode) auipc_imm(opcode) -#else -#error "Unexpected __riscv_xlen" -#endif - bool __kprobes simulate_auipc(u32 opcode, unsigned long addr, struct pt_re= gs *regs) { /* @@ -82,35 +66,16 @@ bool __kprobes simulate_auipc(u32 opcode, unsigned long= addr, struct pt_regs *re * 20 5 7 */ =20 - u32 rd_idx =3D auipc_rd_idx(opcode); - unsigned long rd_val =3D addr + auipc_offset(opcode); + u32 rd_idx =3D riscv_insn_extract_rd(opcode); + unsigned long rd_val =3D addr + riscv_insn_extract_utype_imm(opcode); =20 if (!rv_insn_reg_set_val((unsigned long *)regs, rd_idx, rd_val)) return false; =20 instruction_pointer_set(regs, addr + 4); - return true; } =20 -#define branch_rs1_idx(opcode) \ - (((opcode) >> 15) & 0x1f) - -#define branch_rs2_idx(opcode) \ - (((opcode) >> 20) & 0x1f) - -#define branch_funct3(opcode) \ - (((opcode) >> 12) & 0x7) - -#define branch_imm(opcode) \ - (((((opcode) >> 8) & 0xf ) << 1) | \ - ((((opcode) >> 25) & 0x3f) << 5) | \ - ((((opcode) >> 7) & 0x1 ) << 11) | \ - ((((opcode) >> 31) & 0x1 ) << 12)) - -#define branch_offset(opcode) \ - sign_extend32((branch_imm(opcode)), 12) - bool __kprobes simulate_branch(u32 opcode, unsigned long addr, struct pt_r= egs *regs) { /* @@ -135,8 +100,8 @@ bool __kprobes simulate_branch(u32 opcode, unsigned lon= g addr, struct pt_regs *r !rv_insn_reg_get_val((unsigned long *)regs, riscv_insn_extract_rs2(op= code), &rs2_val)) return false; =20 - offset_tmp =3D branch_offset(opcode); - switch (branch_funct3(opcode)) { + offset_tmp =3D riscv_insn_extract_btype_imm(opcode); + switch (riscv_insn_extract_funct3(opcode)) { case RVG_FUNCT3_BEQ: offset =3D (rs1_val =3D=3D rs2_val) ? offset_tmp : 4; break; diff --git a/arch/riscv/kernel/probes/uprobes.c b/arch/riscv/kernel/probes/= uprobes.c index 194f166b2cc4..f2511cbaf931 100644 --- a/arch/riscv/kernel/probes/uprobes.c +++ b/arch/riscv/kernel/probes/uprobes.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only =20 +#include #include #include #include @@ -29,7 +30,7 @@ int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe,= struct mm_struct *mm, =20 opcode =3D *(probe_opcode_t *)(&auprobe->insn[0]); =20 - auprobe->insn_size =3D GET_INSN_LENGTH(opcode); + auprobe->insn_size =3D INSN_LEN(opcode); =20 switch (riscv_probe_decode_insn(&opcode, &auprobe->api)) { case INSN_REJECTED: @@ -166,7 +167,7 @@ void arch_uprobe_copy_ixol(struct page *page, unsigned = long vaddr, =20 /* Add ebreak behind opcode to simulate singlestep */ if (vaddr) { - dst +=3D GET_INSN_LENGTH(*(probe_opcode_t *)src); + dst +=3D INSN_LEN(*(probe_opcode_t *)src); *(uprobe_opcode_t *)dst =3D __BUG_INSN_32; } =20 --=20 2.34.1